KR101088926B1 - 쓰루-칩 연결부들을 지닌 프론트-엔드 공정처리된 웨이퍼 - Google Patents

쓰루-칩 연결부들을 지닌 프론트-엔드 공정처리된 웨이퍼 Download PDF

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KR101088926B1
KR101088926B1 KR1020097014823A KR20097014823A KR101088926B1 KR 101088926 B1 KR101088926 B1 KR 101088926B1 KR 1020097014823 A KR1020097014823 A KR 1020097014823A KR 20097014823 A KR20097014823 A KR 20097014823A KR 101088926 B1 KR101088926 B1 KR 101088926B1
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South Korea
Prior art keywords
vias
semiconductor wafer
forming
electrically conductive
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KR1020097014823A
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English (en)
Korean (ko)
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KR20090094371A (ko
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존 트레자
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쿠퍼 에셋 엘티디. 엘.엘.씨.
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Publication of KR20090094371A publication Critical patent/KR20090094371A/ko
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
KR1020097014823A 2006-12-29 2007-12-28 쓰루-칩 연결부들을 지닌 프론트-엔드 공정처리된 웨이퍼 KR101088926B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US88267106P 2006-12-29 2006-12-29
US60/882,671 2006-12-29
PCT/US2007/089061 WO2008083284A2 (fr) 2006-12-29 2007-12-28 Tranche traitée au niveau de l'extrémité frontale ayant des connexions traversant les puces

Publications (2)

Publication Number Publication Date
KR20090094371A KR20090094371A (ko) 2009-09-04
KR101088926B1 true KR101088926B1 (ko) 2011-12-01

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KR1020097014823A KR101088926B1 (ko) 2006-12-29 2007-12-28 쓰루-칩 연결부들을 지닌 프론트-엔드 공정처리된 웨이퍼

Country Status (5)

Country Link
EP (1) EP2097924A4 (fr)
JP (2) JP2010515275A (fr)
KR (1) KR101088926B1 (fr)
CN (1) CN101663742B (fr)
WO (1) WO2008083284A2 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102007044685B3 (de) * 2007-09-19 2009-04-02 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Elektronisches System und Verfahren zur Herstellung eines dreidimensionalen elektronischen Systems
FR2987937B1 (fr) * 2012-03-12 2014-03-28 Altatech Semiconductor Procede de realisation de plaquettes semi-conductrices
JP5925006B2 (ja) * 2012-03-26 2016-05-25 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法

Citations (4)

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Publication number Priority date Publication date Assignee Title
US20010030366A1 (en) 2000-03-08 2001-10-18 Hiroshi Nakano Semiconducting system and production method
US20050218488A1 (en) 2004-03-31 2005-10-06 Mie Matsuo Electronic component having micro-electrical mechanical system
US20060281363A1 (en) * 2005-06-14 2006-12-14 John Trezza Remote chip attachment
US20070048896A1 (en) 2005-08-30 2007-03-01 International Business Machines Corporation Conductive through via structure and process for electronic device carriers

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JPH03218653A (ja) * 1989-11-13 1991-09-26 Mitsubishi Electric Corp エアーブリッジ金属配線を具えた半導体装置およびその製造方法
EP1351288B1 (fr) * 2002-04-05 2015-10-28 STMicroelectronics Srl Procédé pour fabriquer une interconnexion isolée à travers un corps semi-conducteur et dispositif semi-conducteur correspondant
JP4285629B2 (ja) * 2002-04-25 2009-06-24 富士通株式会社 集積回路を搭載するインターポーザ基板の作製方法
JP3748844B2 (ja) * 2002-09-25 2006-02-22 Ｎｅｃエレクトロニクス株式会社 半導体集積回路およびそのテスト方法
WO2004064159A1 (fr) * 2003-01-15 2004-07-29 Fujitsu Limited Dispositif a semi-conducteur, appareil a semi-conducteur a montage tridimensionnel, procede de production du dispositif a semi-conducteur
JP4322508B2 (ja) * 2003-01-15 2009-09-02 新光電気工業株式会社 半導体装置の製造方法
SE526366C3 (sv) * 2003-03-21 2005-10-26 Silex Microsystems Ab Elektriska anslutningar i substrat
JP3891299B2 (ja) * 2003-05-06 2007-03-14 セイコーエプソン株式会社 半導体装置の製造方法、半導体装置、半導体デバイス、電子機器
JP4340517B2 (ja) * 2003-10-30 2009-10-07 Ｏｋｉセミコンダクタ株式会社 半導体装置及びその製造方法
TWI228295B (en) * 2003-11-10 2005-02-21 Shih-Hsien Tseng IC structure and a manufacturing method
JP4114660B2 (ja) * 2003-12-16 2008-07-09 セイコーエプソン株式会社 半導体装置の製造方法、半導体装置、回路基板、電子機器
KR100569590B1 (ko) * 2003-12-30 2006-04-10 매그나칩 반도체 유한회사 고주파 반도체 장치 및 그 제조방법
JPWO2005086216A1 (ja) * 2004-03-09 2008-01-24 独立行政法人科学技術振興機構 半導体素子及び半導体素子の製造方法
JP4492196B2 (ja) * 2004-04-16 2010-06-30 セイコーエプソン株式会社 半導体装置の製造方法、回路基板、並びに電子機器
US7249992B2 (en) * 2004-07-02 2007-07-31 Strasbaugh Method, apparatus and system for use in processing wafers
JP2006049557A (ja) * 2004-08-04 2006-02-16 Seiko Epson Corp 半導体装置
JP5354765B2 (ja) * 2004-08-20 2013-11-27 カミヤチョウ アイピー ホールディングス 三次元積層構造を持つ半導体装置の製造方法
JP4524156B2 (ja) * 2004-08-30 2010-08-11 新光電気工業株式会社 半導体装置及びその製造方法
US7767493B2 (en) * 2005-06-14 2010-08-03 John Trezza Post & penetration interconnection

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010030366A1 (en) 2000-03-08 2001-10-18 Hiroshi Nakano Semiconducting system and production method
US20050218488A1 (en) 2004-03-31 2005-10-06 Mie Matsuo Electronic component having micro-electrical mechanical system
US20060281363A1 (en) * 2005-06-14 2006-12-14 John Trezza Remote chip attachment
US20070048896A1 (en) 2005-08-30 2007-03-01 International Business Machines Corporation Conductive through via structure and process for electronic device carriers

Also Published As

Publication number Publication date
WO2008083284A2 (fr) 2008-07-10
EP2097924A4 (fr) 2012-01-04
JP5686851B2 (ja) 2015-03-18
CN101663742B (zh) 2013-11-06
KR20090094371A (ko) 2009-09-04
WO2008083284A3 (fr) 2008-08-21
EP2097924A2 (fr) 2009-09-09
CN101663742A (zh) 2010-03-03
JP2010515275A (ja) 2010-05-06
JP2013175786A (ja) 2013-09-05

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