KR100886620B1 - 복합물 웨이퍼 제조방법 및 사용한 도우너 기판의리싸이클링 방법 - Google Patents
복합물 웨이퍼 제조방법 및 사용한 도우너 기판의리싸이클링 방법 Download PDFInfo
- Publication number
- KR100886620B1 KR100886620B1 KR1020070000569A KR20070000569A KR100886620B1 KR 100886620 B1 KR100886620 B1 KR 100886620B1 KR 1020070000569 A KR1020070000569 A KR 1020070000569A KR 20070000569 A KR20070000569 A KR 20070000569A KR 100886620 B1 KR100886620 B1 KR 100886620B1
- Authority
- KR
- South Korea
- Prior art keywords
- donor substrate
- initial donor
- rapid thermal
- heat treatment
- rapid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/12—Preparing bulk and homogeneous wafers
- H10P90/16—Preparing bulk and homogeneous wafers by reclaiming or re-processing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/1914—Preparing SOI wafers using bonding
- H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
Landscapes
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
- Formation Of Insulating Films (AREA)
- Separation, Recovery Or Treatment Of Waste Materials Containing Plastics (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EPEP06290421 | 2006-03-14 | ||
| EP06290421.4A EP1835533B1 (en) | 2006-03-14 | 2006-03-14 | Method for manufacturing compound material wafers and method for recycling a used donor substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20070093798A KR20070093798A (ko) | 2007-09-19 |
| KR100886620B1 true KR100886620B1 (ko) | 2009-03-05 |
Family
ID=36940653
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020070000569A Active KR100886620B1 (ko) | 2006-03-14 | 2007-01-03 | 복합물 웨이퍼 제조방법 및 사용한 도우너 기판의리싸이클링 방법 |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7405136B2 (https=) |
| EP (1) | EP1835533B1 (https=) |
| JP (1) | JP4928932B2 (https=) |
| KR (1) | KR100886620B1 (https=) |
| CN (1) | CN100541759C (https=) |
| SG (1) | SG136030A1 (https=) |
| TW (1) | TWI334165B (https=) |
Families Citing this family (32)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4715470B2 (ja) * | 2005-11-28 | 2011-07-06 | 株式会社Sumco | 剥離ウェーハの再生加工方法及びこの方法により再生加工された剥離ウェーハ |
| JP5314838B2 (ja) * | 2006-07-14 | 2013-10-16 | 信越半導体株式会社 | 剥離ウェーハを再利用する方法 |
| JP5289805B2 (ja) * | 2007-05-10 | 2013-09-11 | 株式会社半導体エネルギー研究所 | 半導体装置製造用基板の作製方法 |
| US7781308B2 (en) * | 2007-12-03 | 2010-08-24 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
| CN101504930B (zh) * | 2008-02-06 | 2013-10-16 | 株式会社半导体能源研究所 | Soi衬底的制造方法 |
| DE102008027521B4 (de) * | 2008-06-10 | 2017-07-27 | Infineon Technologies Austria Ag | Verfahren zum Herstellen einer Halbleiterschicht |
| US8871610B2 (en) * | 2008-10-02 | 2014-10-28 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
| JP5410769B2 (ja) * | 2009-01-30 | 2014-02-05 | グローバルウェーハズ・ジャパン株式会社 | シリコンウェーハの熱処理方法 |
| US8198172B2 (en) * | 2009-02-25 | 2012-06-12 | Micron Technology, Inc. | Methods of forming integrated circuits using donor and acceptor substrates |
| JP5607399B2 (ja) * | 2009-03-24 | 2014-10-15 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法 |
| SG183670A1 (en) * | 2009-04-22 | 2012-09-27 | Semiconductor Energy Lab | Method of manufacturing soi substrate |
| US8318588B2 (en) * | 2009-08-25 | 2012-11-27 | Semiconductor Energy Laboratory Co., Ltd. | Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate |
| SG178179A1 (en) * | 2009-10-09 | 2012-03-29 | Semiconductor Energy Lab | Reprocessing method of semiconductor substrate, manufacturing method of reprocessed semiconductor substrate, and manufacturing method of soi substrate |
| SG173283A1 (en) * | 2010-01-26 | 2011-08-29 | Semiconductor Energy Lab | Method for manufacturing soi substrate |
| US9269854B2 (en) * | 2010-09-10 | 2016-02-23 | VerLASE TECHNOLOGIES LLC | Methods of fabricating optoelectronic devices using layers detached from semiconductor donors and devices made thereby |
| US9123529B2 (en) | 2011-06-21 | 2015-09-01 | Semiconductor Energy Laboratory Co., Ltd. | Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate |
| FR2987166B1 (fr) * | 2012-02-16 | 2017-05-12 | Soitec Silicon On Insulator | Procede de transfert d'une couche |
| FR2987682B1 (fr) | 2012-03-05 | 2014-11-21 | Soitec Silicon On Insulator | Procede de test d'une structure semi-conducteur sur isolant et application dudit test pour la fabrication d'une telle structure |
| US8747598B2 (en) * | 2012-04-25 | 2014-06-10 | Gtat Corporation | Method of forming a permanently supported lamina |
| FR2999801B1 (fr) | 2012-12-14 | 2014-12-26 | Soitec Silicon On Insulator | Procede de fabrication d'une structure |
| US9082692B2 (en) * | 2013-01-02 | 2015-07-14 | Micron Technology, Inc. | Engineered substrate assemblies with epitaxial templates and related systems, methods, and devices |
| TW201444118A (zh) * | 2013-05-03 | 2014-11-16 | Univ Dayeh | 具有氮化鎵磊晶層的藍寶石基板的回收方法 |
| JP6100200B2 (ja) * | 2014-04-24 | 2017-03-22 | 信越半導体株式会社 | 貼り合わせsoiウェーハの製造方法 |
| FR3051968B1 (fr) | 2016-05-25 | 2018-06-01 | Soitec | Procede de fabrication d'un substrat semi-conducteur a haute resistivite |
| FI128442B (en) * | 2017-06-21 | 2020-05-15 | Turun Yliopisto | Silicon-on-insulator construction with crystalline silica |
| FR3076069B1 (fr) * | 2017-12-22 | 2021-11-26 | Commissariat Energie Atomique | Procede de transfert d'une couche utile |
| FR3076070B1 (fr) * | 2017-12-22 | 2019-12-27 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Procede de transfert d'une couche utile |
| DE102018122979B4 (de) * | 2018-06-13 | 2023-11-02 | Infineon Technologies Ag | Verfahren zum bilden einer silicium-isolator-schicht und halbleitervorrichtung mit derselben |
| CN110223995B (zh) * | 2019-06-14 | 2021-11-02 | 芯盟科技有限公司 | 一种图像传感器的形成方法、图像传感器及电子设备 |
| JPWO2024201649A1 (https=) * | 2023-03-27 | 2024-10-03 | ||
| TWI903867B (zh) * | 2024-11-15 | 2025-11-01 | 中國砂輪企業股份有限公司 | 複合基板及其製造方法 |
| TWI903868B (zh) * | 2024-11-15 | 2025-11-01 | 中國砂輪企業股份有限公司 | 複合基板及其製造方法 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010101763A (ko) * | 1999-11-29 | 2001-11-14 | 와다 다다시 | 박리 웨이퍼의 재생처리방법 및 재생처리된 박리 웨이퍼 |
| KR20010109790A (ko) * | 2000-06-02 | 2001-12-12 | 이 창 세 | 에스오아이 웨이퍼 제조 방법 |
| KR20050013398A (ko) * | 2003-07-28 | 2005-02-04 | 주식회사 실트론 | 실리콘 단결정 웨이퍼 및 soi 웨이퍼의 제조방법 |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3932369B2 (ja) | 1998-04-09 | 2007-06-20 | 信越半導体株式会社 | 剥離ウエーハを再利用する方法および再利用に供されるシリコンウエーハ |
| JPH11307747A (ja) | 1998-04-17 | 1999-11-05 | Nec Corp | Soi基板およびその製造方法 |
| JP3500063B2 (ja) | 1998-04-23 | 2004-02-23 | 信越半導体株式会社 | 剥離ウエーハを再利用する方法および再利用に供されるシリコンウエーハ |
| JP3697106B2 (ja) * | 1998-05-15 | 2005-09-21 | キヤノン株式会社 | 半導体基板の作製方法及び半導体薄膜の作製方法 |
| US6436846B1 (en) * | 1998-09-03 | 2002-08-20 | Siemens Aktiengesellscharft | Combined preanneal/oxidation step using rapid thermal processing |
| KR100701341B1 (ko) * | 1999-03-16 | 2007-03-29 | 신에쯔 한도타이 가부시키가이샤 | 실리콘 웨이퍼의 제조방법 및 실리콘 웨이퍼 |
| JP2001144275A (ja) * | 1999-08-27 | 2001-05-25 | Shin Etsu Handotai Co Ltd | 貼り合わせsoiウエーハの製造方法および貼り合わせsoiウエーハ |
| FR2838865B1 (fr) * | 2002-04-23 | 2005-10-14 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat avec couche utile sur support de resistivite elevee |
| US7074623B2 (en) | 2002-06-07 | 2006-07-11 | Amberwave Systems Corporation | Methods of forming strained-semiconductor-on-insulator finFET device structures |
| JP2004193515A (ja) * | 2002-12-13 | 2004-07-08 | Shin Etsu Handotai Co Ltd | Soiウエーハの製造方法 |
| US20040187769A1 (en) * | 2003-03-27 | 2004-09-30 | Yoshirou Aoki | Method of producing SOI wafer |
| JP4869544B2 (ja) * | 2003-04-14 | 2012-02-08 | 株式会社Sumco | Soi基板の製造方法 |
| FR2857982B1 (fr) | 2003-07-24 | 2007-05-18 | Soitec Silicon On Insulator | Procede de fabrication d'une couche epitaxiee |
| DE10336271B4 (de) * | 2003-08-07 | 2008-02-07 | Siltronic Ag | Siliciumscheibe und Verfahren zu deren Herstellung |
| FR2867310B1 (fr) | 2004-03-05 | 2006-05-26 | Soitec Silicon On Insulator | Technique d'amelioration de la qualite d'une couche mince prelevee |
| FR2867607B1 (fr) * | 2004-03-10 | 2006-07-14 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat pour la microelectronique, l'opto-electronique et l'optique avec limitaton des lignes de glissement et substrat correspondant |
| JP4715470B2 (ja) * | 2005-11-28 | 2011-07-06 | 株式会社Sumco | 剥離ウェーハの再生加工方法及びこの方法により再生加工された剥離ウェーハ |
-
2006
- 2006-03-14 EP EP06290421.4A patent/EP1835533B1/en not_active Expired - Lifetime
- 2006-06-21 US US11/472,693 patent/US7405136B2/en active Active
- 2006-12-22 TW TW095148607A patent/TWI334165B/zh active
- 2006-12-25 JP JP2006348136A patent/JP4928932B2/ja active Active
-
2007
- 2007-01-03 KR KR1020070000569A patent/KR100886620B1/ko active Active
- 2007-01-17 CN CNB2007100019671A patent/CN100541759C/zh active Active
- 2007-01-29 SG SG200700657-0A patent/SG136030A1/en unknown
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010101763A (ko) * | 1999-11-29 | 2001-11-14 | 와다 다다시 | 박리 웨이퍼의 재생처리방법 및 재생처리된 박리 웨이퍼 |
| KR20010109790A (ko) * | 2000-06-02 | 2001-12-12 | 이 창 세 | 에스오아이 웨이퍼 제조 방법 |
| KR20050013398A (ko) * | 2003-07-28 | 2005-02-04 | 주식회사 실트론 | 실리콘 단결정 웨이퍼 및 soi 웨이퍼의 제조방법 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2007251129A (ja) | 2007-09-27 |
| TWI334165B (en) | 2010-12-01 |
| EP1835533B1 (en) | 2020-06-03 |
| JP4928932B2 (ja) | 2012-05-09 |
| CN100541759C (zh) | 2009-09-16 |
| US20070216042A1 (en) | 2007-09-20 |
| EP1835533A1 (en) | 2007-09-19 |
| CN101038890A (zh) | 2007-09-19 |
| SG136030A1 (en) | 2007-10-29 |
| KR20070093798A (ko) | 2007-09-19 |
| TW200741821A (en) | 2007-11-01 |
| US7405136B2 (en) | 2008-07-29 |
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