JPWO2024201649A1 - - Google Patents

Info

Publication number
JPWO2024201649A1
JPWO2024201649A1 JP2025509280A JP2025509280A JPWO2024201649A1 JP WO2024201649 A1 JPWO2024201649 A1 JP WO2024201649A1 JP 2025509280 A JP2025509280 A JP 2025509280A JP 2025509280 A JP2025509280 A JP 2025509280A JP WO2024201649 A1 JPWO2024201649 A1 JP WO2024201649A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2025509280A
Other languages
Japanese (ja)
Other versions
JPWO2024201649A5 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2024201649A1 publication Critical patent/JPWO2024201649A1/ja
Publication of JPWO2024201649A5 publication Critical patent/JPWO2024201649A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/11Separation of active layers from substrates
    • H10P95/112Separation of active layers from substrates leaving a reusable substrate, e.g. epitaxial lift off
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325Silicon carbide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P10/00Bonding of wafers, substrates or parts of devices
    • H10P10/12Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates
    • H10P10/128Bonding of semiconductor wafers or semiconductor substrates to semiconductor wafers or semiconductor substrates by direct semiconductor to semiconductor bonding
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
JP2025509280A 2023-03-27 2023-03-27 Pending JPWO2024201649A1 (https=)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2023/012178 WO2024201649A1 (ja) 2023-03-27 2023-03-27 半導体デバイスの製造方法および接合ウェハ

Publications (2)

Publication Number Publication Date
JPWO2024201649A1 true JPWO2024201649A1 (https=) 2024-10-03
JPWO2024201649A5 JPWO2024201649A5 (https=) 2025-06-05

Family

ID=92904161

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2025509280A Pending JPWO2024201649A1 (https=) 2023-03-27 2023-03-27

Country Status (5)

Country Link
JP (1) JPWO2024201649A1 (https=)
KR (1) KR20250150609A (https=)
CN (1) CN120981885A (https=)
DE (1) DE112023006051T5 (https=)
WO (1) WO2024201649A1 (https=)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007149907A (ja) * 2005-11-28 2007-06-14 Sumco Corp 剥離ウェーハの再生加工方法及びこの方法により再生加工された剥離ウェーハ
JP2007251129A (ja) * 2006-03-14 2007-09-27 Soi Tec Silicon On Insulator Technologies Sa 複合材料ウェハの製造方法および使用済みドナー基板のリサイクル方法
WO2014125688A1 (ja) * 2013-02-18 2014-08-21 住友電気工業株式会社 Iii族窒化物複合基板およびその製造方法、積層iii族窒化物複合基板、ならびにiii族窒化物半導体デバイスおよびその製造方法
JP2021158248A (ja) * 2020-03-27 2021-10-07 住友金属鉱山株式会社 接合基板の製造方法
JP2022504927A (ja) * 2018-10-16 2022-01-13 マサチューセッツ インスティテュート オブ テクノロジー 昇華させられたsic基板上のカーボンバッファを用いたエピタキシャル成長テンプレート

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102017119568B4 (de) 2017-08-25 2024-01-04 Infineon Technologies Ag Siliziumkarbidbauelemente und Verfahren zum Herstellen von Siliziumkarbidbauelementen

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007149907A (ja) * 2005-11-28 2007-06-14 Sumco Corp 剥離ウェーハの再生加工方法及びこの方法により再生加工された剥離ウェーハ
JP2007251129A (ja) * 2006-03-14 2007-09-27 Soi Tec Silicon On Insulator Technologies Sa 複合材料ウェハの製造方法および使用済みドナー基板のリサイクル方法
WO2014125688A1 (ja) * 2013-02-18 2014-08-21 住友電気工業株式会社 Iii族窒化物複合基板およびその製造方法、積層iii族窒化物複合基板、ならびにiii族窒化物半導体デバイスおよびその製造方法
JP2022504927A (ja) * 2018-10-16 2022-01-13 マサチューセッツ インスティテュート オブ テクノロジー 昇華させられたsic基板上のカーボンバッファを用いたエピタキシャル成長テンプレート
JP2021158248A (ja) * 2020-03-27 2021-10-07 住友金属鉱山株式会社 接合基板の製造方法

Also Published As

Publication number Publication date
DE112023006051T5 (de) 2026-02-05
CN120981885A (zh) 2025-11-18
KR20250150609A (ko) 2025-10-20
WO2024201649A1 (ja) 2024-10-03

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