JPWO2024201649A5 - - Google Patents

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Publication number
JPWO2024201649A5
JPWO2024201649A5 JP2025509280A JP2025509280A JPWO2024201649A5 JP WO2024201649 A5 JPWO2024201649 A5 JP WO2024201649A5 JP 2025509280 A JP2025509280 A JP 2025509280A JP 2025509280 A JP2025509280 A JP 2025509280A JP WO2024201649 A5 JPWO2024201649 A5 JP WO2024201649A5
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JP
Japan
Prior art keywords
wafer
divided
wafers
manufacturing
bonded wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2025509280A
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English (en)
Japanese (ja)
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JPWO2024201649A1 (https=
Filing date
Publication date
Application filed filed Critical
Priority claimed from PCT/JP2023/012178 external-priority patent/WO2024201649A1/ja
Publication of JPWO2024201649A1 publication Critical patent/JPWO2024201649A1/ja
Publication of JPWO2024201649A5 publication Critical patent/JPWO2024201649A5/ja
Pending legal-status Critical Current

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JP2025509280A 2023-03-27 2023-03-27 Pending JPWO2024201649A1 (https=)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2023/012178 WO2024201649A1 (ja) 2023-03-27 2023-03-27 半導体デバイスの製造方法および接合ウェハ

Publications (2)

Publication Number Publication Date
JPWO2024201649A1 JPWO2024201649A1 (https=) 2024-10-03
JPWO2024201649A5 true JPWO2024201649A5 (https=) 2025-06-05

Family

ID=92904161

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2025509280A Pending JPWO2024201649A1 (https=) 2023-03-27 2023-03-27

Country Status (5)

Country Link
JP (1) JPWO2024201649A1 (https=)
KR (1) KR20250150609A (https=)
CN (1) CN120981885A (https=)
DE (1) DE112023006051T5 (https=)
WO (1) WO2024201649A1 (https=)

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4715470B2 (ja) * 2005-11-28 2011-07-06 株式会社Sumco 剥離ウェーハの再生加工方法及びこの方法により再生加工された剥離ウェーハ
EP1835533B1 (en) * 2006-03-14 2020-06-03 Soitec Method for manufacturing compound material wafers and method for recycling a used donor substrate
US9923063B2 (en) * 2013-02-18 2018-03-20 Sumitomo Electric Industries, Ltd. Group III nitride composite substrate and method for manufacturing the same, laminated group III nitride composite substrate, and group III nitride semiconductor device and method for manufacturing the same
DE102017119568B4 (de) 2017-08-25 2024-01-04 Infineon Technologies Ag Siliziumkarbidbauelemente und Verfahren zum Herstellen von Siliziumkarbidbauelementen
CN112839813A (zh) * 2018-10-16 2021-05-25 麻省理工学院 在升华的sic基底上使用碳缓冲的外延生长模板
JP7512641B2 (ja) * 2020-03-27 2024-07-09 住友金属鉱山株式会社 接合基板の製造方法

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