KR100852187B1 - 효과적인 시스템 인 패키지 구성을 위한 핀 구성 변경 회로 - Google Patents
효과적인 시스템 인 패키지 구성을 위한 핀 구성 변경 회로 Download PDFInfo
- Publication number
- KR100852187B1 KR100852187B1 KR1020070007684A KR20070007684A KR100852187B1 KR 100852187 B1 KR100852187 B1 KR 100852187B1 KR 1020070007684 A KR1020070007684 A KR 1020070007684A KR 20070007684 A KR20070007684 A KR 20070007684A KR 100852187 B1 KR100852187 B1 KR 100852187B1
- Authority
- KR
- South Korea
- Prior art keywords
- pins
- memory
- selector
- base chip
- pin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020070007684A KR100852187B1 (ko) | 2007-01-25 | 2007-01-25 | 효과적인 시스템 인 패키지 구성을 위한 핀 구성 변경 회로 |
| US12/005,258 US7729152B2 (en) | 2007-01-25 | 2007-12-26 | Pin configuration changing circuit, base chip and system in package including the same |
| TW097101173A TW200832667A (en) | 2007-01-25 | 2008-01-11 | Pin configuration changing circuit, base chip and system in package including the same |
| JP2008010913A JP5235425B2 (ja) | 2007-01-25 | 2008-01-21 | 効果的なシステムインパッケージ構成のためのピン構成変更回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020070007684A KR100852187B1 (ko) | 2007-01-25 | 2007-01-25 | 효과적인 시스템 인 패키지 구성을 위한 핀 구성 변경 회로 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20080070093A KR20080070093A (ko) | 2008-07-30 |
| KR100852187B1 true KR100852187B1 (ko) | 2008-08-13 |
Family
ID=39725852
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020070007684A Expired - Fee Related KR100852187B1 (ko) | 2007-01-25 | 2007-01-25 | 효과적인 시스템 인 패키지 구성을 위한 핀 구성 변경 회로 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7729152B2 (https=) |
| JP (1) | JP5235425B2 (https=) |
| KR (1) | KR100852187B1 (https=) |
| TW (1) | TW200832667A (https=) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20100108697A (ko) | 2009-03-30 | 2010-10-08 | 삼성전자주식회사 | 데이터 출력 패드들의 스왑 기능을 갖는 반도체 메모리 장치 |
| US8782336B2 (en) * | 2010-05-11 | 2014-07-15 | Marvell World Trade Ltd. | Hybrid storage system with control module embedded solid-state memory |
| KR20120086952A (ko) * | 2011-01-27 | 2012-08-06 | 에스케이하이닉스 주식회사 | 반도체 메모리칩 및 이를 이용한 멀티칩 패키지 |
| JP6315185B2 (ja) * | 2014-03-25 | 2018-04-25 | セイコーエプソン株式会社 | 物理量検出用回路、物理量検出装置、電子機器及び移動体 |
| US20220102333A1 (en) * | 2020-09-29 | 2022-03-31 | Alibaba Group Holding Limited | Configurable computer memory architecture |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100244824B1 (ko) | 1996-01-31 | 2000-02-15 | 니시무로 타이죠 | 반도체집적회로장치 |
| JP2003014816A (ja) | 2001-06-28 | 2003-01-15 | Ando Electric Co Ltd | 半導体試験装置のピンレジスタ回路 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5835395A (en) * | 1991-02-07 | 1998-11-10 | Texas Instruments Incorporated | Eprom pinout option |
| US6160718A (en) * | 1998-12-08 | 2000-12-12 | Viking Components | Multi-chip package with stacked chips and interconnect bumps |
| JP3813758B2 (ja) * | 1999-04-12 | 2006-08-23 | エルピーダメモリ株式会社 | 半導体記憶装置 |
| US6632705B1 (en) * | 1999-10-13 | 2003-10-14 | Samsung Electronics Co., Ltd. | Memory modules and packages using different orientations and terminal assignments |
| KR100458869B1 (ko) * | 2002-04-17 | 2004-12-03 | 삼성전자주식회사 | 부착 방향이 자유로운 반도체 칩 패키지 |
| JP4025584B2 (ja) | 2002-05-31 | 2007-12-19 | エルピーダメモリ株式会社 | 半導体記憶装置 |
| US6876562B2 (en) * | 2002-10-17 | 2005-04-05 | Micron Technology, Inc. | Apparatus and method for mounting microelectronic devices on a mirrored board assembly |
| JP2005243132A (ja) * | 2004-02-26 | 2005-09-08 | Renesas Technology Corp | 半導体装置 |
| JP4674850B2 (ja) * | 2005-02-25 | 2011-04-20 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| US7633764B2 (en) * | 2005-04-27 | 2009-12-15 | Broadcom Corporation | Ball grid array configuration for reducing path distances |
| JP2007193923A (ja) * | 2006-01-23 | 2007-08-02 | Fujitsu Ltd | 半導体デバイス |
-
2007
- 2007-01-25 KR KR1020070007684A patent/KR100852187B1/ko not_active Expired - Fee Related
- 2007-12-26 US US12/005,258 patent/US7729152B2/en not_active Expired - Fee Related
-
2008
- 2008-01-11 TW TW097101173A patent/TW200832667A/zh unknown
- 2008-01-21 JP JP2008010913A patent/JP5235425B2/ja not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100244824B1 (ko) | 1996-01-31 | 2000-02-15 | 니시무로 타이죠 | 반도체집적회로장치 |
| JP2003014816A (ja) | 2001-06-28 | 2003-01-15 | Ando Electric Co Ltd | 半導体試験装置のピンレジスタ回路 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2008182231A (ja) | 2008-08-07 |
| JP5235425B2 (ja) | 2013-07-10 |
| US7729152B2 (en) | 2010-06-01 |
| KR20080070093A (ko) | 2008-07-30 |
| TW200832667A (en) | 2008-08-01 |
| US20080212351A1 (en) | 2008-09-04 |
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