KR100784868B1 - 반도체 장치 및 그 제조 방법 - Google Patents

반도체 장치 및 그 제조 방법 Download PDF

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Publication number
KR100784868B1
KR100784868B1 KR1020060021439A KR20060021439A KR100784868B1 KR 100784868 B1 KR100784868 B1 KR 100784868B1 KR 1020060021439 A KR1020060021439 A KR 1020060021439A KR 20060021439 A KR20060021439 A KR 20060021439A KR 100784868 B1 KR100784868 B1 KR 100784868B1
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KR
South Korea
Prior art keywords
gate
pattern
device isolation
region
isolation layer
Prior art date
Application number
KR1020060021439A
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English (en)
Korean (ko)
Other versions
KR20060135486A (ko
Inventor
이운경
최정혁
이동준
송재혁
Original Assignee
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Priority to US11/425,444 priority Critical patent/US7687860B2/en
Priority to TW095122791A priority patent/TWI300608B/zh
Priority to CN2006100908318A priority patent/CN1885559B/zh
Priority to JP2006175704A priority patent/JP2007005814A/ja
Publication of KR20060135486A publication Critical patent/KR20060135486A/ko
Application granted granted Critical
Publication of KR100784868B1 publication Critical patent/KR100784868B1/ko

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors

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  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
KR1020060021439A 2005-06-24 2006-03-07 반도체 장치 및 그 제조 방법 KR100784868B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
US11/425,444 US7687860B2 (en) 2005-06-24 2006-06-21 Semiconductor device including impurity regions having different cross-sectional shapes
TW095122791A TWI300608B (en) 2005-06-24 2006-06-23 Semiconductor device and method for forming the same
CN2006100908318A CN1885559B (zh) 2005-06-24 2006-06-26 半导体器件及其形成方法
JP2006175704A JP2007005814A (ja) 2005-06-24 2006-06-26 半導体装置及びその製造方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020050055227 2005-06-24
KR20050055227 2005-06-24

Publications (2)

Publication Number Publication Date
KR20060135486A KR20060135486A (ko) 2006-12-29
KR100784868B1 true KR100784868B1 (ko) 2007-12-14

Family

ID=37583613

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020060021439A KR100784868B1 (ko) 2005-06-24 2006-03-07 반도체 장치 및 그 제조 방법

Country Status (3)

Country Link
KR (1) KR100784868B1 (zh)
CN (1) CN1885559B (zh)
TW (1) TWI300608B (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7785963B2 (en) 2008-02-22 2010-08-31 Macronix International Co., Ltd. Method for fabricating inverted T-shaped floating gate memory
CN104217946A (zh) * 2013-05-30 2014-12-17 中芯国际集成电路制造(上海)有限公司 FinFET的制备方法
CN104916640B (zh) * 2014-03-13 2018-07-20 中芯国际集成电路制造(上海)有限公司 一种半浮栅存储器结构
TWI565035B (zh) * 2014-04-11 2017-01-01 旺宏電子股份有限公司 記憶單元及其製造方法
KR102468776B1 (ko) * 2015-09-21 2022-11-22 삼성전자주식회사 폴리실리콘 습식 식각용 조성물 및 이를 이용한 반도체 소자의 제조 방법
TWI622133B (zh) * 2017-05-17 2018-04-21 Powerchip Technology Corporation 記憶體結構及其製作方法
US12063776B2 (en) 2022-04-06 2024-08-13 Taiwan Semiconductor Manufacturing Company., Ltd. Flash memory layout to eliminate floating gate bridge

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010091532A (ko) * 2000-03-16 2001-10-23 윤종용 스플릿 게이트형 플래쉬 메모리
KR20040037327A (ko) * 2002-10-28 2004-05-07 삼성전자주식회사 비대칭적인 소오스 및 드레인 영역을 갖는 비휘발성메모리 장치 및 그 제조방법
JP2004214510A (ja) 2003-01-07 2004-07-29 Toshiba Corp 不揮発性半導体記憶装置とその製造方法
KR20050011501A (ko) * 2003-07-23 2005-01-29 동부아남반도체 주식회사 플래시 메모리 소자의 셀 및 그 제조 방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010091532A (ko) * 2000-03-16 2001-10-23 윤종용 스플릿 게이트형 플래쉬 메모리
KR20040037327A (ko) * 2002-10-28 2004-05-07 삼성전자주식회사 비대칭적인 소오스 및 드레인 영역을 갖는 비휘발성메모리 장치 및 그 제조방법
JP2004214510A (ja) 2003-01-07 2004-07-29 Toshiba Corp 不揮発性半導体記憶装置とその製造方法
KR20050011501A (ko) * 2003-07-23 2005-01-29 동부아남반도체 주식회사 플래시 메모리 소자의 셀 및 그 제조 방법

Also Published As

Publication number Publication date
CN1885559A (zh) 2006-12-27
KR20060135486A (ko) 2006-12-29
TWI300608B (en) 2008-09-01
TW200707652A (en) 2007-02-16
CN1885559B (zh) 2010-11-10

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