KR100683594B1 - 반도체 디바이스 제조 방법 - Google Patents

반도체 디바이스 제조 방법 Download PDF

Info

Publication number
KR100683594B1
KR100683594B1 KR1020047021195A KR20047021195A KR100683594B1 KR 100683594 B1 KR100683594 B1 KR 100683594B1 KR 1020047021195 A KR1020047021195 A KR 1020047021195A KR 20047021195 A KR20047021195 A KR 20047021195A KR 100683594 B1 KR100683594 B1 KR 100683594B1
Authority
KR
South Korea
Prior art keywords
gate electrode
doping
gate
electrode layer
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020047021195A
Other languages
English (en)
Korean (ko)
Other versions
KR20050008856A (ko
Inventor
웨이드 에이. 크럴
데일 시. 자콥슨
Original Assignee
세미이큅, 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 세미이큅, 인코포레이티드 filed Critical 세미이큅, 인코포레이티드
Publication of KR20050008856A publication Critical patent/KR20050008856A/ko
Application granted granted Critical
Publication of KR100683594B1 publication Critical patent/KR100683594B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28035Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28105Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor next to the insulator having a lateral composition or doping variation, or being formed laterally by more than one deposition step
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28114Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T, inverted-T
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0221Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/601Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/603Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/213Channel regions of field-effect devices
    • H10D62/221Channel regions of field-effect devices of FETs
    • H10D62/235Channel regions of field-effect devices of FETs of IGFETs
    • H10D62/299Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations
    • H10D62/307Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations the doping variations being parallel to the channel lengths
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/683Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being parallel to the channel plane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3215Doping the layers
    • H01L21/32155Doping polycristalline - or amorphous silicon layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
KR1020047021195A 2002-06-26 2003-06-18 반도체 디바이스 제조 방법 Expired - Fee Related KR100683594B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US39202302P 2002-06-26 2002-06-26
US39180202P 2002-06-26 2002-06-26
US60/391,802 2002-06-26
US60/392,023 2002-06-26
PCT/US2003/019085 WO2004003970A2 (en) 2002-06-26 2003-06-18 A semiconductor device and method of fabricating a semiconductor device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
KR1020067015937A Division KR100768500B1 (ko) 2002-06-26 2003-06-18 반도체 디바이스의 통합부로서 반도체 기판에 초박막접합을 형성하는 방법

Publications (2)

Publication Number Publication Date
KR20050008856A KR20050008856A (ko) 2005-01-21
KR100683594B1 true KR100683594B1 (ko) 2007-02-16

Family

ID=30003212

Family Applications (2)

Application Number Title Priority Date Filing Date
KR1020047021195A Expired - Fee Related KR100683594B1 (ko) 2002-06-26 2003-06-18 반도체 디바이스 제조 방법
KR1020067015937A Expired - Fee Related KR100768500B1 (ko) 2002-06-26 2003-06-18 반도체 디바이스의 통합부로서 반도체 기판에 초박막접합을 형성하는 방법

Family Applications After (1)

Application Number Title Priority Date Filing Date
KR1020067015937A Expired - Fee Related KR100768500B1 (ko) 2002-06-26 2003-06-18 반도체 디바이스의 통합부로서 반도체 기판에 초박막접합을 형성하는 방법

Country Status (7)

Country Link
US (2) US7723233B2 (enExample)
EP (1) EP1540720A4 (enExample)
JP (2) JP2005531158A (enExample)
KR (2) KR100683594B1 (enExample)
CN (2) CN101055838B (enExample)
AU (1) AU2003261078A1 (enExample)
WO (1) WO2004003970A2 (enExample)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100788474B1 (ko) * 2002-06-26 2007-12-24 세미이큅, 인코포레이티드 자기 요크 어셈블리
US6686595B2 (en) 2002-06-26 2004-02-03 Semequip Inc. Electron impact ion source
KR100683594B1 (ko) * 2002-06-26 2007-02-16 세미이큅, 인코포레이티드 반도체 디바이스 제조 방법
JP2005236210A (ja) * 2004-02-23 2005-09-02 Ricoh Co Ltd スタンダードセルレイアウト、スタンダードセルライブラリ並びに半導体集積回路及びその設計方法
KR100694660B1 (ko) * 2006-03-08 2007-03-13 삼성전자주식회사 트랜지스터 및 그 제조 방법
US7435638B2 (en) * 2006-05-26 2008-10-14 Texas Instruments Incorporated Dual poly deposition and through gate oxide implants
JP4560820B2 (ja) * 2006-06-20 2010-10-13 エルピーダメモリ株式会社 半導体装置の製造方法
CN101197284B (zh) * 2006-12-05 2010-06-02 上海华虹Nec电子有限公司 高压非对称横向结构扩散型场效应管的制作方法
WO2008156182A1 (ja) * 2007-06-18 2008-12-24 Nec Corporation 半導体装置及びその製造方法
JP5220549B2 (ja) * 2008-10-20 2013-06-26 本田技研工業株式会社 アウタロータ型多極発電機のステータ構造体
JP2010199520A (ja) * 2009-02-27 2010-09-09 Renesas Electronics Corp 半導体レーザ及び半導体レーザの製造方法
JP5714831B2 (ja) * 2010-03-18 2015-05-07 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
KR101129028B1 (ko) 2010-03-24 2012-03-23 주식회사 하이닉스반도체 반도체 소자의 패시베이션 어닐 공정 방법
CN101834141B (zh) * 2010-04-28 2015-03-04 复旦大学 一种不对称型源漏场效应晶体管的制备方法
CN102468147B (zh) * 2010-11-01 2017-11-28 中芯国际集成电路制造(上海)有限公司 一种半导体器件的栅极形成方法
US8598025B2 (en) * 2010-11-15 2013-12-03 Varian Semiconductor Equipment Associates, Inc. Doping of planar or three-dimensional structures at elevated temperatures
KR20120107762A (ko) * 2011-03-22 2012-10-04 삼성전자주식회사 반도체 소자의 제조 방법
US8569158B2 (en) 2011-03-31 2013-10-29 Tokyo Electron Limited Method for forming ultra-shallow doping regions by solid phase diffusion
US8580664B2 (en) 2011-03-31 2013-11-12 Tokyo Electron Limited Method for forming ultra-shallow boron doping regions by solid phase diffusion
US9263272B2 (en) 2012-04-24 2016-02-16 Taiwan Semiconductor Manufacturing Company, Ltd. Gate electrodes with notches and methods for forming the same
US9355888B2 (en) * 2012-10-01 2016-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. Implant isolated devices and method for forming the same
US9673245B2 (en) * 2012-10-01 2017-06-06 Taiwan Semiconductor Manufacturing Company, Ltd. Implant isolated devices and method for forming the same
US20140291761A1 (en) 2013-03-29 2014-10-02 International Business Machines Corporation Asymmetric Spacers
US9899224B2 (en) 2015-03-03 2018-02-20 Tokyo Electron Limited Method of controlling solid phase diffusion of boron dopants to form ultra-shallow doping regions
CN109494224B (zh) * 2017-09-08 2020-12-01 华邦电子股份有限公司 非挥发性存储器装置及其制造方法
KR101938843B1 (ko) 2018-05-18 2019-01-16 청오기초건설 주식회사 파일 야적 거치대

Family Cites Families (41)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4826179B1 (enExample) * 1968-09-30 1973-08-07
JPS5626145B2 (enExample) * 1973-06-27 1981-06-17
DE219243T1 (de) 1985-10-11 1987-09-24 Monolithic Memories, Inc., Santa Clara, Calif. Verfahren zur herstellung eines bipolaren transistors.
JPH01225117A (ja) 1988-03-04 1989-09-08 Nippon Telegr & Teleph Corp <Ntt> 半導体装置の製造方法及びその製造装置
JP2889295B2 (ja) 1989-07-17 1999-05-10 株式会社東芝 半導体装置及びその製造方法
FR2652448B1 (fr) 1989-09-28 1994-04-29 Commissariat Energie Atomique Procede de fabrication d'un circuit integre mis haute tension.
JPH0410620A (ja) 1990-04-27 1992-01-14 Sony Corp 半導体装置の製造方法
JPH04112544A (ja) 1990-08-31 1992-04-14 Sanyo Electric Co Ltd 半導体装置およびその製造方法
JP3129774B2 (ja) 1991-07-31 2001-01-31 日本電産コパル株式会社 発光装置
JP2652108B2 (ja) 1991-09-05 1997-09-10 三菱電機株式会社 電界効果トランジスタおよびその製造方法
JP2702338B2 (ja) * 1991-10-14 1998-01-21 三菱電機株式会社 半導体装置、及びその製造方法
JP2707977B2 (ja) * 1994-09-01 1998-02-04 日本電気株式会社 Mos型半導体装置およびその製造方法
KR0147870B1 (ko) * 1994-10-24 1998-11-02 문정환 반도체 소자의 콘택 전도층 형성방법
US5688706A (en) * 1996-08-01 1997-11-18 Vanguard International Semiconductor Corporation Method for fabricating a MOSFET device, with local channel doping, self aligned to a selectively deposited tungsten gate
US5817561A (en) 1996-09-30 1998-10-06 Motorola, Inc. Insulated gate semiconductor device and method of manufacture
JP3749924B2 (ja) * 1996-12-03 2006-03-01 富士通株式会社 イオン注入方法および半導体装置の製造方法
JP3660457B2 (ja) * 1996-12-26 2005-06-15 株式会社東芝 イオン発生装置及びイオン照射装置
KR100231607B1 (ko) * 1996-12-31 1999-11-15 김영환 반도체 소자의 초저접합 형성방법
AU5818198A (en) * 1997-01-10 1998-08-03 Drexel University Surface treatment of 312 ternary ceramic materials and products thereof
JP4010620B2 (ja) 1997-01-10 2007-11-21 横浜ゴム株式会社 路面の凍結抑制構造
US5837598A (en) * 1997-03-13 1998-11-17 Lsi Logic Corporation Diffusion barrier for polysilicon gate electrode of MOS device in integrated circuit structure, and method of making same
US5930634A (en) * 1997-04-21 1999-07-27 Advanced Micro Devices, Inc. Method of making an IGFET with a multilevel gate
US5885877A (en) * 1997-04-21 1999-03-23 Advanced Micro Devices, Inc. Composite gate electrode incorporating dopant diffusion-retarding barrier layer adjacent to underlying gate dielectric
JPH11103050A (ja) 1997-09-29 1999-04-13 Fujitsu Ltd 半導体装置及びその製造方法
JP2002518827A (ja) 1998-06-11 2002-06-25 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Mosトランジスタを含む半導体デバイスの製造方法
US6208004B1 (en) * 1998-08-19 2001-03-27 Philips Semiconductor, Inc. Semiconductor device with high-temperature-stable gate electrode for sub-micron applications and fabrication thereof
US6051456A (en) * 1998-12-21 2000-04-18 Motorola, Inc. Semiconductor component and method of manufacture
US6080630A (en) 1999-02-03 2000-06-27 Advanced Micro Devices, Inc. Method for forming a MOS device with self-compensating VT -implants
US6069061A (en) * 1999-02-08 2000-05-30 United Microelectronics Corp. Method for forming polysilicon gate
JP3277912B2 (ja) 1999-03-24 2002-04-22 日本電気株式会社 半導体装置の製造方法
JP3911585B2 (ja) * 1999-05-18 2007-05-09 富士通株式会社 半導体装置およびその製造方法
WO2000079601A1 (fr) * 1999-06-23 2000-12-28 Seiko Epson Corporation Dispositif a semi-conducteur et procede de fabrication dudit dispositif
US6297109B1 (en) 1999-08-19 2001-10-02 Chartered Semiconductor Manufacturing Ltd. Method to form shallow junction transistors while eliminating shorts due to junction spiking
US6288403B1 (en) 1999-10-11 2001-09-11 Axcelis Technologies, Inc. Decaborane ionizer
US6329704B1 (en) 1999-12-09 2001-12-11 International Business Machines Corporation Ultra-shallow junction dopant layer having a peak concentration within a dielectric layer
US6368926B1 (en) 2000-03-13 2002-04-09 Advanced Micro Devices, Inc. Method of forming a semiconductor device with source/drain regions having a deep vertical junction
US6333229B1 (en) 2000-03-13 2001-12-25 International Business Machines Corporation Method for manufacturing a field effect transitor (FET) having mis-aligned-gate structure
JP3594550B2 (ja) 2000-11-27 2004-12-02 シャープ株式会社 半導体装置の製造方法
US6693051B2 (en) * 2001-02-01 2004-02-17 Lucent Technologies Inc. Silicon oxide based gate dielectric layer
KR100683594B1 (ko) 2002-06-26 2007-02-16 세미이큅, 인코포레이티드 반도체 디바이스 제조 방법
JP4112544B2 (ja) 2004-09-15 2008-07-02 日精樹脂工業株式会社 成形監視システム

Also Published As

Publication number Publication date
US8236675B2 (en) 2012-08-07
US7723233B2 (en) 2010-05-25
CN101055838B (zh) 2011-12-14
JP2010161397A (ja) 2010-07-22
CN101055838A (zh) 2007-10-17
WO2004003970A2 (en) 2004-01-08
JP5437112B2 (ja) 2014-03-12
AU2003261078A8 (en) 2004-01-19
KR20050008856A (ko) 2005-01-21
KR100768500B1 (ko) 2007-10-19
CN100359652C (zh) 2008-01-02
WO2004003970A9 (en) 2004-07-15
JP2005531158A (ja) 2005-10-13
KR20060095580A (ko) 2006-08-31
WO2004003970A3 (en) 2004-06-03
US20060099812A1 (en) 2006-05-11
CN1663034A (zh) 2005-08-31
EP1540720A2 (en) 2005-06-15
EP1540720A4 (en) 2007-09-26
US20100022077A1 (en) 2010-01-28
AU2003261078A1 (en) 2004-01-19

Similar Documents

Publication Publication Date Title
KR100683594B1 (ko) 반도체 디바이스 제조 방법
JP4597531B2 (ja) チャネル領域のドーパント分布がレトログレードな半導体デバイスおよびそのような半導体デバイスの製造方法
KR100615657B1 (ko) 격자간 원자들을 생성하기 위한 준-비정질의 경사각 주입을 이용하여 강화된 횡방향 확산을 제공하는 채널 길이가 감소된 저농도로 도핑된 드레인 트랜지스터
US6124620A (en) Incorporating barrier atoms into a gate dielectric using gas cluster ion beam implantation
WO1998048457A1 (en) Method of making nmos and pmos devices with reduced masking steps
US20040104442A1 (en) Drain/source extension structure of a field effect transistor including doped high-k sidewall spacers
CN101621006A (zh) 利用锗预非晶处理来形成p-型轻度掺杂的漏极区的方法
EP0459398B1 (en) Manufacturing method of a channel in MOS semiconductor devices
US5874343A (en) CMOS integrated circuit and method for forming source/drain areas prior to forming lightly doped drains to optimize the thermal diffusivity thereof
KR101022854B1 (ko) 도핑된 고유전 측벽 스페이서들을 구비한 전계 효과트랜지스터의 드레인/소스 확장 구조
JPWO2009034699A1 (ja) 半導体装置の製造方法
US20080200020A1 (en) Semiconductor device and method of fabricating a semiconductor device
JP3529634B2 (ja) デバイスの製造方法
KR100508867B1 (ko) p채널형 모스 트랜지스터 및 상보형 모스 트랜지스터의제조 방법
JPH10214970A (ja) 半導体装置およびその製造方法
JP2001504998A (ja) Ldd構造をもつmosトランジスタを有する半導体素子の製造方法
EP1808885A1 (en) A semiconductor device and method of fabricating a semiconductor device
KR100319873B1 (ko) 고농도이온주입층의저온활성화방법
JP2781989B2 (ja) 半導体装置の製造方法
JPS6074663A (ja) 相補型半導体装置の製造方法
JPH11204783A (ja) 半導体装置およびその製造方法
KR20010017518A (ko) 모스전계효과트랜지스터 소자의 제조방법
KR970072206A (ko) 반도체 소자의 트랜지스터 제조 방법
KR20030055686A (ko) 반도체 소자의 금속 실리사이드막 제조방법
JPH08274309A (ja) Misトランジスタの製造方法

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

A107 Divisional application of patent
E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0104 Divisional application for international application

St.27 status event code: A-0-1-A10-A18-div-PA0104

St.27 status event code: A-0-1-A10-A16-div-PA0104

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

FPAY Annual fee payment

Payment date: 20130125

Year of fee payment: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

FPAY Annual fee payment

Payment date: 20140117

Year of fee payment: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20150210

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20150210

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000