JPS62295437A - 多層配線形成法 - Google Patents

多層配線形成法

Info

Publication number
JPS62295437A
JPS62295437A JP13864486A JP13864486A JPS62295437A JP S62295437 A JPS62295437 A JP S62295437A JP 13864486 A JP13864486 A JP 13864486A JP 13864486 A JP13864486 A JP 13864486A JP S62295437 A JPS62295437 A JP S62295437A
Authority
JP
Japan
Prior art keywords
film
glass
etching
wiring
wiring layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13864486A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0587146B2 (enrdf_load_stackoverflow
Inventor
Katsuyuki Yokoi
横井　勝之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yamaha Corp
Original Assignee
Yamaha Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yamaha Corp filed Critical Yamaha Corp
Priority to JP13864486A priority Critical patent/JPS62295437A/ja
Publication of JPS62295437A publication Critical patent/JPS62295437A/ja
Publication of JPH0587146B2 publication Critical patent/JPH0587146B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP13864486A 1986-06-14 1986-06-14 多層配線形成法 Granted JPS62295437A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13864486A JPS62295437A (ja) 1986-06-14 1986-06-14 多層配線形成法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13864486A JPS62295437A (ja) 1986-06-14 1986-06-14 多層配線形成法

Publications (2)

Publication Number Publication Date
JPS62295437A true JPS62295437A (ja) 1987-12-22
JPH0587146B2 JPH0587146B2 (enrdf_load_stackoverflow) 1993-12-15

Family

ID=15226822

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13864486A Granted JPS62295437A (ja) 1986-06-14 1986-06-14 多層配線形成法

Country Status (1)

Country Link
JP (1) JPS62295437A (enrdf_load_stackoverflow)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6386547A (ja) * 1986-09-30 1988-04-16 Pioneer Electronic Corp 多重配線基板の製造方法
JPS6386546A (ja) * 1986-09-30 1988-04-16 Pioneer Electronic Corp 多重配線基板の製造方法
JPS63164342A (ja) * 1986-12-26 1988-07-07 Matsushita Electric Ind Co Ltd 絶縁膜形成方法
JPH01243553A (ja) * 1988-03-25 1989-09-28 Seiko Epson Corp 半導体装置の製造方法
JPH02140957A (ja) * 1988-11-22 1990-05-30 Seiko Epson Corp 半導体装置の製造方法
JPH02172261A (ja) * 1988-12-25 1990-07-03 Nec Corp 半導体装置の製造方法
JPH02271630A (ja) * 1989-04-13 1990-11-06 Seiko Epson Corp 半導体装置の製造方法
JPH0350727A (ja) * 1989-07-18 1991-03-05 Seiko Epson Corp 半導体装置の製造方法
US5155576A (en) * 1990-03-28 1992-10-13 Nec Corporation Semiconductor integrated circuit having a multilayer wiring structure
JPH0897208A (ja) * 1995-08-11 1996-04-12 Nec Corp プラズマ化学気相成長法とその装置及び多層配線の製造方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5897848A (ja) * 1981-12-08 1983-06-10 Seiko Instr & Electronics Ltd 表面平滑化方法
JPS607737A (ja) * 1983-06-27 1985-01-16 Nec Corp 半導体装置の製造方法
JPS6035535A (ja) * 1983-08-08 1985-02-23 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPS60173856A (ja) * 1984-02-10 1985-09-07 Fujitsu Ltd 半導体装置の製造方法
JPS6165454A (ja) * 1984-09-07 1986-04-04 Fujitsu Ltd 半導体装置の製造方法
JPS61116858A (ja) * 1984-10-24 1986-06-04 Fujitsu Ltd 層間絶縁膜の形成方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5897848A (ja) * 1981-12-08 1983-06-10 Seiko Instr & Electronics Ltd 表面平滑化方法
JPS607737A (ja) * 1983-06-27 1985-01-16 Nec Corp 半導体装置の製造方法
JPS6035535A (ja) * 1983-08-08 1985-02-23 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPS60173856A (ja) * 1984-02-10 1985-09-07 Fujitsu Ltd 半導体装置の製造方法
JPS6165454A (ja) * 1984-09-07 1986-04-04 Fujitsu Ltd 半導体装置の製造方法
JPS61116858A (ja) * 1984-10-24 1986-06-04 Fujitsu Ltd 層間絶縁膜の形成方法

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6386547A (ja) * 1986-09-30 1988-04-16 Pioneer Electronic Corp 多重配線基板の製造方法
JPS6386546A (ja) * 1986-09-30 1988-04-16 Pioneer Electronic Corp 多重配線基板の製造方法
JPS63164342A (ja) * 1986-12-26 1988-07-07 Matsushita Electric Ind Co Ltd 絶縁膜形成方法
JPH01243553A (ja) * 1988-03-25 1989-09-28 Seiko Epson Corp 半導体装置の製造方法
JPH02140957A (ja) * 1988-11-22 1990-05-30 Seiko Epson Corp 半導体装置の製造方法
JPH02172261A (ja) * 1988-12-25 1990-07-03 Nec Corp 半導体装置の製造方法
JPH02271630A (ja) * 1989-04-13 1990-11-06 Seiko Epson Corp 半導体装置の製造方法
JPH0350727A (ja) * 1989-07-18 1991-03-05 Seiko Epson Corp 半導体装置の製造方法
US5155576A (en) * 1990-03-28 1992-10-13 Nec Corporation Semiconductor integrated circuit having a multilayer wiring structure
JPH0897208A (ja) * 1995-08-11 1996-04-12 Nec Corp プラズマ化学気相成長法とその装置及び多層配線の製造方法

Also Published As

Publication number Publication date
JPH0587146B2 (enrdf_load_stackoverflow) 1993-12-15

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