JPS61288455A - 多層半導体装置の製造方法 - Google Patents

多層半導体装置の製造方法

Info

Publication number
JPS61288455A
JPS61288455A JP60131009A JP13100985A JPS61288455A JP S61288455 A JPS61288455 A JP S61288455A JP 60131009 A JP60131009 A JP 60131009A JP 13100985 A JP13100985 A JP 13100985A JP S61288455 A JPS61288455 A JP S61288455A
Authority
JP
Japan
Prior art keywords
semiconductor device
multilayer semiconductor
multilayer
heat sink
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP60131009A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0528503B2 (enExample
Inventor
Takashi Kato
隆 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP60131009A priority Critical patent/JPS61288455A/ja
Priority to KR1019860004722A priority patent/KR900008973B1/ko
Priority to EP86304575A priority patent/EP0206696B1/en
Priority to DE8686304575T priority patent/DE3685612T2/de
Publication of JPS61288455A publication Critical patent/JPS61288455A/ja
Priority to US07/667,257 priority patent/US5051865A/en
Publication of JPH0528503B2 publication Critical patent/JPH0528503B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124Aluminium (Al) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/0651Wire or wire-like electrical connections from device to substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06527Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06551Conductive connections on the side of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06555Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06589Thermal management, e.g. cooling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01019Potassium [K]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/10251Elemental semiconductors, i.e. Group IV
    • H01L2924/10253Silicon [Si]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
JP60131009A 1985-06-17 1985-06-17 多層半導体装置の製造方法 Granted JPS61288455A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP60131009A JPS61288455A (ja) 1985-06-17 1985-06-17 多層半導体装置の製造方法
KR1019860004722A KR900008973B1 (ko) 1985-06-17 1986-06-13 다층 반도체장치
EP86304575A EP0206696B1 (en) 1985-06-17 1986-06-13 Multi-layer semiconductor device
DE8686304575T DE3685612T2 (de) 1985-06-17 1986-06-13 Mehrschicht-halbleiteranordnung.
US07/667,257 US5051865A (en) 1985-06-17 1991-03-11 Multi-layer semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60131009A JPS61288455A (ja) 1985-06-17 1985-06-17 多層半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS61288455A true JPS61288455A (ja) 1986-12-18
JPH0528503B2 JPH0528503B2 (enExample) 1993-04-26

Family

ID=15047836

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60131009A Granted JPS61288455A (ja) 1985-06-17 1985-06-17 多層半導体装置の製造方法

Country Status (5)

Country Link
US (1) US5051865A (enExample)
EP (1) EP0206696B1 (enExample)
JP (1) JPS61288455A (enExample)
KR (1) KR900008973B1 (enExample)
DE (1) DE3685612T2 (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6982489B2 (en) 2003-04-01 2006-01-03 Renesas Technology Corp. Semiconductor device having a plurality of laminated semiconductor elements with water absorbing resin films interposed therebetween
US7361944B2 (en) 2004-03-18 2008-04-22 Seiko Epson Corporation Electrical device with a plurality of thin-film device layers
WO2008139605A1 (ja) * 2007-05-14 2008-11-20 Kabushiki Kaisha Nihon Micronics 積層型パッケージ、及び、積層型パッケージの形成方法
US9401183B2 (en) 1997-04-04 2016-07-26 Glenn J. Leedy Stacked integrated memory device

Families Citing this family (59)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4954875A (en) * 1986-07-17 1990-09-04 Laser Dynamics, Inc. Semiconductor wafer array with electrically conductive compliant material
FR2634064A1 (fr) * 1988-07-05 1990-01-12 Thomson Csf Composant electronique a couche de conductivite thermique elevee
US5038201A (en) * 1988-11-08 1991-08-06 Westinghouse Electric Corp. Wafer scale integrated circuit apparatus
EP0476136A4 (en) * 1990-01-24 1992-04-22 Nauchno-Proizvodstvenny Tsentr Elektronnoi Mikrotekhnologii Akademii Nauk Ssr Three-dimensional electronic unit and method of construction
JP3058898B2 (ja) * 1990-09-03 2000-07-04 三菱電機株式会社 半導体装置及びその評価方法
JPH0817221B2 (ja) * 1990-11-13 1996-02-21 株式会社東芝 半導体装置及び半導体ウェーハの実装方法
US5847448A (en) * 1990-12-11 1998-12-08 Thomson-Csf Method and device for interconnecting integrated circuits in three dimensions
US5451550A (en) * 1991-02-20 1995-09-19 Texas Instruments Incorporated Method of laser CVD seal a die edge
JPH0513666A (ja) * 1991-06-29 1993-01-22 Sony Corp 複合半導体装置
US5202754A (en) * 1991-09-13 1993-04-13 International Business Machines Corporation Three-dimensional multichip packages and methods of fabrication
JPH0715969B2 (ja) * 1991-09-30 1995-02-22 インターナショナル・ビジネス・マシーンズ・コーポレイション マルチチツプ集積回路パツケージ及びそのシステム
US5691885A (en) * 1992-03-17 1997-11-25 Massachusetts Institute Of Technology Three-dimensional interconnect having modules with vertical top and bottom connectors
ATE145292T1 (de) * 1992-03-17 1996-11-15 Massachusetts Inst Technology Geringbenachbarte dreidimensionale verbindung.
DE4211899C2 (de) * 1992-04-09 1998-07-16 Daimler Benz Aerospace Ag Mikrosystem-Laseranordnung und Mikrosystem-Laser
JPH0779144B2 (ja) * 1992-04-21 1995-08-23 インターナショナル・ビジネス・マシーンズ・コーポレイション 耐熱性半導体チップ・パッケージ
US5343366A (en) * 1992-06-24 1994-08-30 International Business Machines Corporation Packages for stacked integrated circuit chip cubes
DE69330450T2 (de) * 1992-08-05 2001-11-08 Fujitsu Ltd., Kawasaki Dreidimensionaler Multichipmodul
US5854534A (en) * 1992-08-05 1998-12-29 Fujitsu Limited Controlled impedence interposer substrate
US5313097A (en) * 1992-11-16 1994-05-17 International Business Machines, Corp. High density memory module
US5502667A (en) * 1993-09-13 1996-03-26 International Business Machines Corporation Integrated multichip memory module structure
US5561622A (en) * 1993-09-13 1996-10-01 International Business Machines Corporation Integrated memory cube structure
US5596226A (en) * 1994-09-06 1997-01-21 International Business Machines Corporation Semiconductor chip having a chip metal layer and a transfer metal and corresponding electronic module
US5521434A (en) * 1994-10-17 1996-05-28 International Business Machines Corporation Semiconductor chip and electronic module with integrated surface interconnects/components
US5701037A (en) * 1994-11-15 1997-12-23 Siemens Aktiengesellschaft Arrangement for inductive signal transmission between the chip layers of a vertically integrated circuit
US5818112A (en) * 1994-11-15 1998-10-06 Siemens Aktiengesellschaft Arrangement for capacitive signal transmission between the chip layers of a vertically integrated circuit
US5609772A (en) * 1995-06-05 1997-03-11 International Business Machines Corporation Cube maskless lead open process using chemical mechanical polish/lead-tip expose process
US5719745A (en) * 1995-07-12 1998-02-17 International Business Machines Corporation Extended surface cooling for chip stack applications
US5648684A (en) * 1995-07-26 1997-07-15 International Business Machines Corporation Endcap chip with conductive, monolithic L-connect for multichip stack
DE19543540C1 (de) * 1995-11-22 1996-11-21 Siemens Ag Vertikal integriertes Halbleiterbauelement mit zwei miteinander verbundenen Substraten und Herstellungsverfahren dafür
US5763943A (en) * 1996-01-29 1998-06-09 International Business Machines Corporation Electronic modules with integral sensor arrays
US5952725A (en) 1996-02-20 1999-09-14 Micron Technology, Inc. Stacked semiconductor devices
US5673218A (en) 1996-03-05 1997-09-30 Shepard; Daniel R. Dual-addressed rectifier storage device
US6784023B2 (en) * 1996-05-20 2004-08-31 Micron Technology, Inc. Method of fabrication of stacked semiconductor devices
US5781413A (en) * 1996-09-30 1998-07-14 International Business Machines Corporation Method and apparatus for directing the input/output connection of integrated circuit chip cube configurations
US5815374A (en) * 1996-09-30 1998-09-29 International Business Machines Corporation Method and apparatus for redirecting certain input/output connections of integrated circuit chip configurations
US5835396A (en) * 1996-10-17 1998-11-10 Zhang; Guobiao Three-dimensional read-only memory
SE511425C2 (sv) * 1996-12-19 1999-09-27 Ericsson Telefon Ab L M Packningsanordning för integrerade kretsar
US6075287A (en) * 1997-04-03 2000-06-13 International Business Machines Corporation Integrated, multi-chip, thermally conductive packaging device and methodology
US5793103A (en) * 1997-05-08 1998-08-11 International Business Machines Corporation Insulated cube with exposed wire lead
JP3501644B2 (ja) * 1998-02-02 2004-03-02 日本電気株式会社 半導体パッケージの熱抵抗計算方法および記録媒体および熱抵抗計算装置
CA2338335A1 (en) * 1998-07-27 2000-02-10 Reveo, Inc. Three-dimensional packaging technology for multi-layered integrated circuits
JP2001352035A (ja) * 2000-06-07 2001-12-21 Sony Corp 多層半導体装置の組立治具及び多層半導体装置の製造方法
US6956757B2 (en) * 2000-06-22 2005-10-18 Contour Semiconductor, Inc. Low cost high density rectifier matrix memory
US6727422B2 (en) 2000-09-18 2004-04-27 Chris Macris Heat sink/heat spreader structures and methods of manufacture
US6818817B2 (en) 2000-09-18 2004-11-16 Chris Macris Heat dissipating silicon-on-insulator structures
US6743972B2 (en) 2000-09-18 2004-06-01 Chris Macris Heat dissipating IC devices
US20030002267A1 (en) * 2001-06-15 2003-01-02 Mantz Frank E. I/O interface structure
US6945054B1 (en) * 2002-10-04 2005-09-20 Richard S. Norman Method and apparatus for cooling microelectronic complexes including multiple discrete functional modules
US6856010B2 (en) * 2002-12-05 2005-02-15 Staktek Group L.P. Thin scale outline package
JP4554152B2 (ja) * 2002-12-19 2010-09-29 株式会社半導体エネルギー研究所 半導体チップの作製方法
US20040207990A1 (en) * 2003-04-21 2004-10-21 Rose Andrew C. Stair-step signal routing
US7999383B2 (en) 2006-07-21 2011-08-16 Bae Systems Information And Electronic Systems Integration Inc. High speed, high density, low power die interconnect system
US7813157B2 (en) * 2007-10-29 2010-10-12 Contour Semiconductor, Inc. Non-linear conductor memory
WO2009061834A1 (en) * 2007-11-05 2009-05-14 Contour Semiconductor, Inc. Low-cost, high-density rectifier matrix memory
US20090225621A1 (en) * 2008-03-05 2009-09-10 Shepard Daniel R Split decoder storage array and methods of forming the same
US20090296445A1 (en) * 2008-06-02 2009-12-03 Shepard Daniel R Diode decoder array with non-sequential layout and methods of forming the same
US8325556B2 (en) * 2008-10-07 2012-12-04 Contour Semiconductor, Inc. Sequencing decoder circuit
US8772920B2 (en) * 2011-07-13 2014-07-08 Oracle International Corporation Interconnection and assembly of three-dimensional chip packages
MY192051A (en) * 2016-12-29 2022-07-25 Intel Corp Stacked dice systems

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5839055A (ja) * 1981-08-31 1983-03-07 Matsushita Electric Ind Co Ltd 半導体装置
JPS5890744A (ja) * 1981-11-25 1983-05-30 Mitsubishi Electric Corp 半導体装置
JPS5891664A (ja) * 1981-11-26 1983-05-31 Mitsubishi Electric Corp 積層構造半導体装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3243660A (en) * 1966-03-29 Electroni c module as sbmbly
GB1083200A (en) * 1966-08-17 1967-09-13 Standard Telephones Cables Ltd Improvements in or relating to semiconductor devices
DE1591105A1 (de) * 1967-12-06 1970-09-24 Itt Ind Gmbh Deutsche Verfahren zum Herstellen von Festkoerperschaltungen
US3705332A (en) * 1970-06-25 1972-12-05 Howard L Parks Electrical circuit packaging structure and method of fabrication thereof
US3704455A (en) * 1971-02-01 1972-11-28 Alfred D Scarbrough 3d-coaxial memory construction and method of making
US4283754A (en) * 1979-03-26 1981-08-11 Bunker Ramo Corporation Cooling system for multiwafer high density circuit
US4546406A (en) * 1980-09-25 1985-10-08 Texas Instruments Incorporated Electronic circuit interconnection system
US4500905A (en) * 1981-09-30 1985-02-19 Tokyo Shibaura Denki Kabushiki Kaisha Stacked semiconductor device with sloping sides
US4628407A (en) * 1983-04-22 1986-12-09 Cray Research, Inc. Circuit module with enhanced heat transfer and distribution
US4514784A (en) * 1983-04-22 1985-04-30 Cray Research, Inc. Interconnected multiple circuit module
DE3381187D1 (de) * 1983-11-07 1990-03-08 Irvine Sensors Corp Detektoranordnungsstruktur und -herstellung.
JPS6118164A (ja) * 1984-07-04 1986-01-27 Mitsubishi Electric Corp 半導体装置
US4698662A (en) * 1985-02-05 1987-10-06 Gould Inc. Multichip thin film module

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5839055A (ja) * 1981-08-31 1983-03-07 Matsushita Electric Ind Co Ltd 半導体装置
JPS5890744A (ja) * 1981-11-25 1983-05-30 Mitsubishi Electric Corp 半導体装置
JPS5891664A (ja) * 1981-11-26 1983-05-31 Mitsubishi Electric Corp 積層構造半導体装置

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9401183B2 (en) 1997-04-04 2016-07-26 Glenn J. Leedy Stacked integrated memory device
US6982489B2 (en) 2003-04-01 2006-01-03 Renesas Technology Corp. Semiconductor device having a plurality of laminated semiconductor elements with water absorbing resin films interposed therebetween
US7361944B2 (en) 2004-03-18 2008-04-22 Seiko Epson Corporation Electrical device with a plurality of thin-film device layers
WO2008139605A1 (ja) * 2007-05-14 2008-11-20 Kabushiki Kaisha Nihon Micronics 積層型パッケージ、及び、積層型パッケージの形成方法
JPWO2008139605A1 (ja) * 2007-05-14 2010-07-29 株式会社日本マイクロニクス 積層型パッケージ、及び、積層型パッケージの形成方法

Also Published As

Publication number Publication date
EP0206696B1 (en) 1992-06-10
EP0206696A2 (en) 1986-12-30
EP0206696A3 (en) 1988-08-10
DE3685612T2 (de) 1993-01-28
KR900008973B1 (ko) 1990-12-15
DE3685612D1 (de) 1992-07-16
JPH0528503B2 (enExample) 1993-04-26
US5051865A (en) 1991-09-24
KR870000760A (ko) 1987-02-20

Similar Documents

Publication Publication Date Title
JPS61288455A (ja) 多層半導体装置の製造方法
JP3499202B2 (ja) 半導体装置の製造方法
TWI222731B (en) Semiconductor device
EP1119049A2 (en) Laminate type semiconductor apparatus
JP2003258166A (ja) 半導体装置
JPH0325023B2 (enExample)
JPS6355213B2 (enExample)
CN103632982A (zh) 配线板及配线板的制造方法
JP2002203939A (ja) 集積型電子部品及びその集積方法
JP2953899B2 (ja) 半導体装置
JPH1056099A (ja) 多層回路基板およびその製造方法
JP2002076589A5 (enExample)
JPH02187054A (ja) 混成集積回路部品の構造
JP7239051B2 (ja) 半導体装置およびその製造方法
JP7302669B2 (ja) 回路モジュールおよびその製造方法
JPS61288456A (ja) 多層半導体装置の製造方法
JPS58159361A (ja) 多層混成集積回路装置
CN113972200A (zh) 半导体结构及其制备方法
CN113571476B (zh) 一种芯片封装方法
JPH0232547A (ja) 半導体実装装置
TWI286456B (en) Multi-layer circuit board integrated with electronic elements and method for fabricating the same
JP3428083B2 (ja) 半導体装置の製造方法
JP3447025B2 (ja) 表面実装型電子部品及びその製造方法
JPH0333071Y2 (enExample)
JPH0613535A (ja) 電子部品搭載装置