JPS6012773A - 半導体素子の製造方法 - Google Patents

半導体素子の製造方法

Info

Publication number
JPS6012773A
JPS6012773A JP58119507A JP11950783A JPS6012773A JP S6012773 A JPS6012773 A JP S6012773A JP 58119507 A JP58119507 A JP 58119507A JP 11950783 A JP11950783 A JP 11950783A JP S6012773 A JPS6012773 A JP S6012773A
Authority
JP
Japan
Prior art keywords
layer
substrate
gaas
semiconductor
semiconductor layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58119507A
Other languages
English (en)
Japanese (ja)
Other versions
JPH028450B2 (enrdf_load_stackoverflow
Inventor
Seiji Nishi
清次 西
Haruhisa Kinoshita
木下 治久
Masahiro Akiyama
秋山 正博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP58119507A priority Critical patent/JPS6012773A/ja
Publication of JPS6012773A publication Critical patent/JPS6012773A/ja
Publication of JPH028450B2 publication Critical patent/JPH028450B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/40FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having 2D charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/472High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having lower bandgap active layer formed on top of wider bandgap layer, e.g. inverted HEMT

Landscapes

  • Junction Field-Effect Transistors (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
JP58119507A 1983-07-02 1983-07-02 半導体素子の製造方法 Granted JPS6012773A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58119507A JPS6012773A (ja) 1983-07-02 1983-07-02 半導体素子の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58119507A JPS6012773A (ja) 1983-07-02 1983-07-02 半導体素子の製造方法

Publications (2)

Publication Number Publication Date
JPS6012773A true JPS6012773A (ja) 1985-01-23
JPH028450B2 JPH028450B2 (enrdf_load_stackoverflow) 1990-02-23

Family

ID=14762969

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58119507A Granted JPS6012773A (ja) 1983-07-02 1983-07-02 半導体素子の製造方法

Country Status (1)

Country Link
JP (1) JPS6012773A (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01199474A (ja) * 1988-02-04 1989-08-10 Matsushita Electric Ind Co Ltd ヘテロ接合型電界効果トランジスタ
JPH02275642A (ja) * 1989-04-17 1990-11-09 Hitachi Cable Ltd 電界効果トランジスタ
JPH05198600A (ja) * 1991-08-21 1993-08-06 Hughes Aircraft Co 反転変調ドープされたヘテロ構造の製造方法
US6050217A (en) * 1997-08-26 2000-04-18 Murata Manufacturing Co., Ltd. Parallel plate plasma CVD apparatus

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5752126A (en) * 1980-09-16 1982-03-27 Oki Electric Ind Co Ltd Compound semiconductor device
JPS5913376A (ja) * 1982-07-13 1984-01-24 Nippon Telegr & Teleph Corp <Ntt> ヘテロ接合を有する半導体薄膜
JPS59106158A (ja) * 1982-12-10 1984-06-19 Fujitsu Ltd 半導体装置の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5752126A (en) * 1980-09-16 1982-03-27 Oki Electric Ind Co Ltd Compound semiconductor device
JPS5913376A (ja) * 1982-07-13 1984-01-24 Nippon Telegr & Teleph Corp <Ntt> ヘテロ接合を有する半導体薄膜
JPS59106158A (ja) * 1982-12-10 1984-06-19 Fujitsu Ltd 半導体装置の製造方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01199474A (ja) * 1988-02-04 1989-08-10 Matsushita Electric Ind Co Ltd ヘテロ接合型電界効果トランジスタ
JPH02275642A (ja) * 1989-04-17 1990-11-09 Hitachi Cable Ltd 電界効果トランジスタ
JPH05198600A (ja) * 1991-08-21 1993-08-06 Hughes Aircraft Co 反転変調ドープされたヘテロ構造の製造方法
US6050217A (en) * 1997-08-26 2000-04-18 Murata Manufacturing Co., Ltd. Parallel plate plasma CVD apparatus

Also Published As

Publication number Publication date
JPH028450B2 (enrdf_load_stackoverflow) 1990-02-23

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