JPH11506569A - エピタキシャル半導体領域を有する半導体装置の製造 - Google Patents
エピタキシャル半導体領域を有する半導体装置の製造Info
- Publication number
- JPH11506569A JPH11506569A JP9535077A JP53507797A JPH11506569A JP H11506569 A JPH11506569 A JP H11506569A JP 9535077 A JP9535077 A JP 9535077A JP 53507797 A JP53507797 A JP 53507797A JP H11506569 A JPH11506569 A JP H11506569A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- window
- crystal silicon
- silicon
- insulating material
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 86
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 239000010410 layer Substances 0.000 claims abstract description 191
- 239000000463 material Substances 0.000 claims abstract description 65
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 53
- 239000011810 insulating material Substances 0.000 claims abstract description 45
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 37
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 36
- 239000010703 silicon Substances 0.000 claims abstract description 36
- 238000000151 deposition Methods 0.000 claims abstract description 33
- 230000008021 deposition Effects 0.000 claims abstract description 26
- 239000013078 crystal Substances 0.000 claims abstract description 18
- 239000011241 protective layer Substances 0.000 claims abstract description 18
- 125000006850 spacer group Chemical group 0.000 claims abstract description 8
- 238000005530 etching Methods 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 18
- 238000005137 deposition process Methods 0.000 abstract description 9
- 235000012431 wafers Nutrition 0.000 description 41
- 239000004020 conductor Substances 0.000 description 13
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 8
- 238000006243 chemical reaction Methods 0.000 description 7
- 229910052581 Si3N4 Inorganic materials 0.000 description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 238000001020 plasma etching Methods 0.000 description 3
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- 229910021419 crystalline silicon Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 239000000460 chlorine Substances 0.000 description 1
- 229910052801 chlorine Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- MROCJMGDEKINLD-UHFFFAOYSA-N dichlorosilane Chemical compound Cl[SiH2]Cl MROCJMGDEKINLD-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66272—Silicon vertical transistors
- H01L29/66287—Silicon vertical transistors with a single crystalline emitter, collector or base including extrinsic, link or graft base formed on the silicon substrate, e.g. by epitaxy, recrystallisation, after insulating device isolation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/0245—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Bipolar Transistors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
Claims (1)
- 【特許請求の範囲】 1.− 絶縁材料の第1層と、非単結晶シリコンの第1層と、絶縁材料の第2層 とをこの順序でシリコンウェファの表面上に設け、 − 急峻な壁面を有する窓を絶縁材料の第2層と、非単結晶シリコンの第1 層とを通してエッチング形成して、絶縁材料の第1層を露出させ、 − 窓の壁面に保護層を設け、 − 窓内と、この窓に隣接する非単結晶シリコンの第1層の縁部の下側とで 第1絶縁層を選択的にエッチング除去して、非単結晶シリコンの第1層の縁部自 体とシリコンウェファの表面との双方を前記窓内と前記縁部の下側とで露出させ 、 − 半導体材料を選択的に堆積させて、エピタキシャル半導体領域をシリコ ンウェファの露出表面上に形成するとともにこのエピタキシャル半導体領域に接 続された多結晶半導体材料の縁部を非単結晶シリコンの第1層の露出縁部上に形 成し、 − 前記窓の壁面上の前記保護層上に絶縁用のスペーサ層を設け、 − 非単結晶シリコンの第2層を堆積し、 これによりエピタキシャル半導体領域を有する半導体装置を製造するに当たり 、 半導体材料の選択堆積の前に絶縁材料の第2層上に頂部層を設け、この頂部 層はその上に非単結晶半導体材料が半導体材料の選択堆積中に成長する材料を以 って構成することを特徴とする半導体装置の製造方法。 2.請求の範囲1に記載の半導体装置の製造方法において、絶縁材料の第2層上 に非単結晶シリコンの頂部層を設けることを特徴とする半導体装置の製造方法。 3.請求の範囲1又は2に記載の半導体装置の製造方法において、前記頂部層は 窓のエッチング前に絶縁材料の第2層上に予め設け、窓はこの頂部層をも通して エッチング形成することを特徴とする半導体装置の製造方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
NL96200861.1 | 1996-03-29 | ||
EP96200861 | 1996-03-29 | ||
PCT/IB1997/000248 WO1997037377A1 (en) | 1996-03-29 | 1997-03-13 | Manufacture of a semiconductor device with an epitaxial semiconductor zone |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH11506569A true JPH11506569A (ja) | 1999-06-08 |
JP4150076B2 JP4150076B2 (ja) | 2008-09-17 |
Family
ID=8223831
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP53507797A Expired - Fee Related JP4150076B2 (ja) | 1996-03-29 | 1997-03-13 | 半導体装置の製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US6368946B1 (ja) |
EP (1) | EP0834189B1 (ja) |
JP (1) | JP4150076B2 (ja) |
DE (1) | DE69729833T2 (ja) |
WO (1) | WO1997037377A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4722405B2 (ja) * | 2003-04-23 | 2011-07-13 | 三星電子株式会社 | トランジスタ製造方法 |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10005442A1 (de) * | 2000-02-08 | 2001-08-16 | Infineon Technologies Ag | Bipolartransistor |
US6444591B1 (en) * | 2000-09-30 | 2002-09-03 | Newport Fab, Llc | Method for reducing contamination prior to epitaxial growth and related structure |
US6696342B1 (en) * | 2001-06-15 | 2004-02-24 | National Semiconductor Corp. | Small emitter and base-collector bi-polar transistor |
JP2004538645A (ja) * | 2001-08-06 | 2004-12-24 | コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ | バイポーラトランジスタ、半導体デバイス、及びその製造方法 |
EP1428262A2 (en) * | 2001-09-21 | 2004-06-16 | Amberwave Systems Corporation | Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same |
US6933518B2 (en) | 2001-09-24 | 2005-08-23 | Amberwave Systems Corporation | RF circuits including transistors having strained material layers |
DE10249897B4 (de) * | 2002-10-25 | 2005-09-22 | Austriamicrosystems Ag | Selbstjustierendes Verfahren zur Herstellung eines Transistors |
DE10317098A1 (de) * | 2003-04-14 | 2004-07-22 | Infineon Technologies Ag | Verfahren zur Herstellung eines Bipolartransistors |
US7795605B2 (en) * | 2007-06-29 | 2010-09-14 | International Business Machines Corporation | Phase change material based temperature sensor |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4041518A (en) * | 1973-02-24 | 1977-08-09 | Hitachi, Ltd. | MIS semiconductor device and method of manufacturing the same |
US5296391A (en) * | 1982-03-24 | 1994-03-22 | Nec Corporation | Method of manufacturing a bipolar transistor having thin base region |
JPS61164262A (ja) * | 1985-01-17 | 1986-07-24 | Toshiba Corp | 半導体装置 |
JPS61166071A (ja) * | 1985-01-17 | 1986-07-26 | Toshiba Corp | 半導体装置及びその製造方法 |
DE3825701A1 (de) * | 1987-07-29 | 1989-02-09 | Toshiba Kawasaki Kk | Verfahren zur herstellung eines bipolaren transistors |
US4892837A (en) * | 1987-12-04 | 1990-01-09 | Hitachi, Ltd. | Method for manufacturing semiconductor integrated circuit device |
JP2728671B2 (ja) * | 1988-02-03 | 1998-03-18 | 株式会社東芝 | バイポーラトランジスタの製造方法 |
US5204276A (en) * | 1988-12-06 | 1993-04-20 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor device |
JPH03206621A (ja) * | 1990-01-09 | 1991-09-10 | Oki Electric Ind Co Ltd | 半導体集積回路装置の製造方法 |
DE59209271D1 (de) * | 1991-09-23 | 1998-05-14 | Siemens Ag | Verfahren zur Herstellung eines seitlich begrenzten, einkristallinen Gebietes in einem Bipolartransistor |
JP3156436B2 (ja) * | 1993-04-05 | 2001-04-16 | 日本電気株式会社 | ヘテロ接合バイポーラトランジスタ |
BE1007670A3 (nl) * | 1993-10-25 | 1995-09-12 | Philips Electronics Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting waarbij een halfgeleiderzone wordt gevormd door diffusie vanuit een strook polykristallijn silicium. |
JP2630237B2 (ja) * | 1993-12-22 | 1997-07-16 | 日本電気株式会社 | 半導体装置及びその製造方法 |
JP2720793B2 (ja) * | 1994-05-12 | 1998-03-04 | 日本電気株式会社 | 半導体装置の製造方法 |
US5620908A (en) * | 1994-09-19 | 1997-04-15 | Kabushiki Kaisha Toshiba | Manufacturing method of semiconductor device comprising BiCMOS transistor |
JP2629644B2 (ja) * | 1995-03-22 | 1997-07-09 | 日本電気株式会社 | 半導体装置の製造方法 |
-
1997
- 1997-03-13 DE DE69729833T patent/DE69729833T2/de not_active Expired - Fee Related
- 1997-03-13 JP JP53507797A patent/JP4150076B2/ja not_active Expired - Fee Related
- 1997-03-13 EP EP97903566A patent/EP0834189B1/en not_active Expired - Lifetime
- 1997-03-13 WO PCT/IB1997/000248 patent/WO1997037377A1/en active IP Right Grant
- 1997-03-24 US US08/822,747 patent/US6368946B1/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4722405B2 (ja) * | 2003-04-23 | 2011-07-13 | 三星電子株式会社 | トランジスタ製造方法 |
Also Published As
Publication number | Publication date |
---|---|
WO1997037377A1 (en) | 1997-10-09 |
US6368946B1 (en) | 2002-04-09 |
DE69729833D1 (de) | 2004-08-19 |
EP0834189A1 (en) | 1998-04-08 |
DE69729833T2 (de) | 2005-07-07 |
EP0834189B1 (en) | 2004-07-14 |
JP4150076B2 (ja) | 2008-09-17 |
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