JPH10162600A5 - - Google Patents

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Publication number
JPH10162600A5
JPH10162600A5 JP1996314699A JP31469996A JPH10162600A5 JP H10162600 A5 JPH10162600 A5 JP H10162600A5 JP 1996314699 A JP1996314699 A JP 1996314699A JP 31469996 A JP31469996 A JP 31469996A JP H10162600 A5 JPH10162600 A5 JP H10162600A5
Authority
JP
Japan
Prior art keywords
data
test
memory cells
generating
self
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1996314699A
Other languages
English (en)
Japanese (ja)
Other versions
JPH10162600A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP8314699A priority Critical patent/JPH10162600A/ja
Priority claimed from JP8314699A external-priority patent/JPH10162600A/ja
Priority to US08/841,368 priority patent/US5818772A/en
Priority to KR1019970018442A priority patent/KR100245946B1/ko
Publication of JPH10162600A publication Critical patent/JPH10162600A/ja
Publication of JPH10162600A5 publication Critical patent/JPH10162600A5/ja
Pending legal-status Critical Current

Links

JP8314699A 1996-11-26 1996-11-26 テスト機能内蔵半導体記憶装置 Pending JPH10162600A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP8314699A JPH10162600A (ja) 1996-11-26 1996-11-26 テスト機能内蔵半導体記憶装置
US08/841,368 US5818772A (en) 1996-11-26 1997-04-30 Semiconductor memory devices having a built-in test function
KR1019970018442A KR100245946B1 (ko) 1996-11-26 1997-05-13 테스트 기능 내장 반도체 기억 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8314699A JPH10162600A (ja) 1996-11-26 1996-11-26 テスト機能内蔵半導体記憶装置

Publications (2)

Publication Number Publication Date
JPH10162600A JPH10162600A (ja) 1998-06-19
JPH10162600A5 true JPH10162600A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 2004-10-21

Family

ID=18056493

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8314699A Pending JPH10162600A (ja) 1996-11-26 1996-11-26 テスト機能内蔵半導体記憶装置

Country Status (3)

Country Link
US (1) US5818772A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPH10162600A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR100245946B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (43)

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US6041426A (en) * 1995-04-07 2000-03-21 National Semiconductor Corporation Built in self test BIST for RAMS using a Johnson counter as a source of data
US5991213A (en) * 1997-04-30 1999-11-23 Texas Instruments Incorporated Short disturb test algorithm for built-in self-test
US5959912A (en) * 1997-04-30 1999-09-28 Texas Instruments Incorporated ROM embedded mask release number for built-in self-test
KR100468675B1 (ko) * 1997-07-25 2005-03-16 삼성전자주식회사 스태틱램자기테스트회로의어드레스발생기및어드레스발생방법
KR100466979B1 (ko) * 1997-12-26 2005-04-06 삼성전자주식회사 반도체 메모리 장치 및 그 장치의 프로그램 검증 방법
US5995731A (en) * 1997-12-29 1999-11-30 Motorola, Inc. Multiple BIST controllers for testing multiple embedded memory arrays
KR19990069337A (ko) * 1998-02-06 1999-09-06 윤종용 복합 반도체 메모리장치의자기 테스트 회로 및 이를 이용한 자기 테스트 방법
GB9805054D0 (en) * 1998-03-11 1998-05-06 Process Intelligence Limited Memory test system with buffer memory
US6049505A (en) 1998-05-22 2000-04-11 Micron Technology, Inc. Method and apparatus for generating memory addresses for testing memory devices
US6078637A (en) * 1998-06-29 2000-06-20 Cypress Semiconductor Corp. Address counter test mode for memory device
KR100289406B1 (ko) * 1998-08-31 2001-06-01 김영환 내장형메모리의테스트회로
US6550023B1 (en) * 1998-10-19 2003-04-15 Hewlett Packard Development Company, L.P. On-the-fly memory testing and automatic generation of bitmaps
KR100304700B1 (ko) * 1999-01-13 2001-09-26 윤종용 버퍼부를 내장하여 부하를 일정하게 하는 리던던시 회로
US6357018B1 (en) * 1999-01-26 2002-03-12 Dell Usa, L.P. Method and apparatus for determining continuity and integrity of a RAMBUS channel in a computer system
US6415403B1 (en) * 1999-01-29 2002-07-02 Global Unichip Corporation Programmable built in self test for embedded DRAM
US6647524B1 (en) * 1999-04-30 2003-11-11 Worldwide Semiconductor Manufacturing Corporation Built-in-self-test circuit for RAMBUS direct RDRAM
US6671836B1 (en) * 1999-09-23 2003-12-30 Rambus Inc. Method and apparatus for testing memory
JP3434762B2 (ja) * 1999-12-27 2003-08-11 エヌイーシーマイクロシステム株式会社 半導体集積回路
US6557127B1 (en) 2000-02-28 2003-04-29 Cadence Design Systems, Inc. Method and apparatus for testing multi-port memories
DE10016719A1 (de) 2000-04-04 2001-10-11 Infineon Technologies Ag Integrierter Speicher und Verfahren zur Funktionsprüfung von Speicherzellen eines integrierten Speichers
EP1331642A4 (en) * 2000-08-31 2008-03-19 Nec Electronics Corp SEMICONDUCTOR MEMORY COMPONENT, TEST METHOD AND TESTING
US6658610B1 (en) * 2000-09-25 2003-12-02 International Business Machines Corporation Compilable address magnitude comparator for memory array self-testing
US6871292B1 (en) * 2000-11-20 2005-03-22 Intersil Americas, Inc. Sequencer and method of selectively inhibiting clock signals to execute reduced instruction sequences in a re-programmable I/O interface
JP3569232B2 (ja) 2001-01-17 2004-09-22 Ｎｅｃマイクロシステム株式会社 シリアルアクセス機能付きアドレスマルチプレクサメモリのテスト方式
DE10120668A1 (de) * 2001-04-27 2002-11-07 Infineon Technologies Ag Verfahren zum Testen der Datenaustausch-Funktionsfähigkeit eines Speichers
US7073100B2 (en) * 2002-11-11 2006-07-04 International Business Machines Corporation Method for testing embedded DRAM arrays
JP2004246979A (ja) * 2003-02-14 2004-09-02 Fujitsu Ltd 半導体試験回路、半導体記憶装置および半導体試験方法
ITRM20030198A1 (it) * 2003-04-28 2004-10-29 Micron Technology Inc Monitor ad unita' di controllo basata su rom in un
JP4381750B2 (ja) 2003-08-28 2009-12-09 株式会社ルネサステクノロジ 半導体集積回路
US7089439B1 (en) * 2003-09-03 2006-08-08 T-Ram, Inc. Architecture and method for output clock generation on a high speed memory device
KR100594257B1 (ko) 2004-02-26 2006-06-30 삼성전자주식회사 내장형 셀프 테스트 회로를 가지는 ｓｏｃ 및 그 셀프테스트 방법
JP2006048754A (ja) * 2004-07-30 2006-02-16 Fujitsu Ltd 半導体装置
JP2006344345A (ja) * 2005-05-12 2006-12-21 Nec Electronics Corp 揮発性半導体記憶装置
US7405964B2 (en) * 2006-07-27 2008-07-29 Qimonda North America Corp. Integrated circuit to identify read disturb condition in memory cell
US20080077835A1 (en) * 2006-09-27 2008-03-27 Khoche A Jay Automatic Test Equipment Receiving Diagnostic Information from Devices with Built-in Self Test
US20080077834A1 (en) * 2006-09-27 2008-03-27 Ajay Khoche Deterministic Diagnostic Information Capture from Memory Devices with Built-in Self Test
US8448030B2 (en) * 2010-02-25 2013-05-21 Interra Systems Inc. Method and apparatus for optimizing address generation for simultaneously running proximity-based BIST algorithms
KR100979994B1 (ko) * 2010-06-25 2010-09-06 주식회사 케이디파워 태양전지모듈의 온도 검출 장치
US20120236660A1 (en) * 2011-03-16 2012-09-20 Nanya Technology Corp. Test system and test method for memory
JP6154228B2 (ja) * 2013-07-16 2017-06-28 ラピスセミコンダクタ株式会社 半導体装置
JP6920836B2 (ja) * 2017-03-14 2021-08-18 エイブリック株式会社 半導体装置
KR102468811B1 (ko) * 2018-09-07 2022-11-18 에스케이하이닉스 주식회사 Bist 회로를 포함하는 메모리 장치 및 이의 동작 방법
CN112331253B (zh) * 2020-10-30 2023-12-08 深圳市宏旺微电子有限公司 一种芯片的测试方法、终端和存储介质

Family Cites Families (2)

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Publication number Priority date Publication date Assignee Title
US5661729A (en) * 1995-04-28 1997-08-26 Song Corporation Semiconductor memory having built-in self-test circuit
US5568437A (en) * 1995-06-20 1996-10-22 Vlsi Technology, Inc. Built-in self test for integrated circuits having read/write memory

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