ITRM20030198A1 - Monitor ad unita' di controllo basata su rom in un - Google Patents
Monitor ad unita' di controllo basata su rom in unInfo
- Publication number
- ITRM20030198A1 ITRM20030198A1 IT000198A ITRM20030198A ITRM20030198A1 IT RM20030198 A1 ITRM20030198 A1 IT RM20030198A1 IT 000198 A IT000198 A IT 000198A IT RM20030198 A ITRM20030198 A IT RM20030198A IT RM20030198 A1 ITRM20030198 A1 IT RM20030198A1
- Authority
- IT
- Italy
- Prior art keywords
- rom
- control unit
- based control
- unit monitor
- monitor
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/12015—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details comprising clock generation or timing circuitry
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/14—Implementation of control logic, e.g. test mode decoders
- G11C29/16—Implementation of control logic, e.g. test mode decoders using microprogrammed units, e.g. state machines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/48—Arrangements in static stores specially adapted for testing by means external to the store, e.g. using direct memory access [DMA] or using auxiliary access paths
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C29/50004—Marginal testing, e.g. race, voltage or current testing of threshold voltage
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT000198A ITRM20030198A1 (it) | 2003-04-28 | 2003-04-28 | Monitor ad unita' di controllo basata su rom in un |
US10/696,973 US6977852B2 (en) | 2003-04-28 | 2003-10-30 | ROM-based controller monitor in a memory device |
US11/166,500 US7318181B2 (en) | 2003-04-28 | 2005-06-24 | ROM-based controller monitor in a memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT000198A ITRM20030198A1 (it) | 2003-04-28 | 2003-04-28 | Monitor ad unita' di controllo basata su rom in un |
Publications (2)
Publication Number | Publication Date |
---|---|
ITRM20030198A0 ITRM20030198A0 (it) | 2003-04-28 |
ITRM20030198A1 true ITRM20030198A1 (it) | 2004-10-29 |
Family
ID=29765782
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IT000198A ITRM20030198A1 (it) | 2003-04-28 | 2003-04-28 | Monitor ad unita' di controllo basata su rom in un |
Country Status (2)
Country | Link |
---|---|
US (2) | US6977852B2 (it) |
IT (1) | ITRM20030198A1 (it) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
ITMI20050063A1 (it) * | 2005-01-20 | 2006-07-21 | Atmel Corp | Metodo e sistema per la gestione di una richiesta di sospensione in una memoria flash |
JP4889961B2 (ja) * | 2005-05-06 | 2012-03-07 | ルネサスエレクトロニクス株式会社 | 半導体集積回路及びそのバーインテスト方法 |
KR100721581B1 (ko) * | 2005-09-29 | 2007-05-23 | 주식회사 하이닉스반도체 | 직렬 입/출력 인터페이스를 가진 멀티 포트 메모리 소자 |
JP4686350B2 (ja) * | 2005-12-09 | 2011-05-25 | 株式会社東芝 | 不揮発性半導体記憶装置及びその自己テスト方法 |
US20070136640A1 (en) * | 2005-12-14 | 2007-06-14 | Jarrar Anis M | Defect detection and repair in an embedded random access memory |
US7861122B2 (en) * | 2006-01-27 | 2010-12-28 | Apple Inc. | Monitoring health of non-volatile memory |
US20080288712A1 (en) | 2007-04-25 | 2008-11-20 | Cornwell Michael J | Accessing metadata with an external host |
US7913032B1 (en) | 2007-04-25 | 2011-03-22 | Apple Inc. | Initiating memory wear leveling |
US9702305B2 (en) | 2013-04-17 | 2017-07-11 | Micron Technology, Inc. | Multiple engine sequencer |
US10388393B2 (en) * | 2016-03-22 | 2019-08-20 | Micron Technology, Inc. | Apparatus and methods for debugging on a host and memory device |
US11074988B2 (en) | 2016-03-22 | 2021-07-27 | Micron Technology, Inc. | Apparatus and methods for debugging on a host and memory device |
KR20180033368A (ko) * | 2016-09-23 | 2018-04-03 | 삼성전자주식회사 | 케스-케이드 연결 구조로 레퍼런스 클록을 전달하는 스토리지 장치들을 포함하는 전자 장치 |
KR20190029316A (ko) * | 2017-09-12 | 2019-03-20 | 에스케이하이닉스 주식회사 | 마이크로 컨트롤러, 이를 포함하는 메모리 시스템 및 이의 동작방법 |
US11789071B2 (en) * | 2021-01-12 | 2023-10-17 | Texas Instruments Incorporated | High speed integrated circuit testing |
KR20230069661A (ko) * | 2021-11-12 | 2023-05-19 | 에스케이하이닉스 주식회사 | 메모리 시스템 및 이의 동작 방법 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5357627A (en) * | 1989-03-28 | 1994-10-18 | Olympus Optical Co., Ltd. | Microcomputer having a program correction function |
US5509134A (en) * | 1993-06-30 | 1996-04-16 | Intel Corporation | Method and apparatus for execution of operations in a flash memory array |
JP3193810B2 (ja) | 1993-08-31 | 2001-07-30 | 富士通株式会社 | 不揮発性半導体記憶装置及びその試験方法 |
JPH08180678A (ja) * | 1994-12-27 | 1996-07-12 | Hitachi Ltd | ダイナミック型ram |
JP2746222B2 (ja) | 1995-08-31 | 1998-05-06 | 日本電気株式会社 | 半導体記憶装置 |
US6144594A (en) | 1996-01-19 | 2000-11-07 | Stmicroelectronics, Inc. | Test mode activation and data override |
US20020071325A1 (en) * | 1996-04-30 | 2002-06-13 | Hii Kuong Hua | Built-in self-test arrangement for integrated circuit memory devices |
KR100492205B1 (ko) * | 1996-04-30 | 2005-09-14 | 텍사스 인스트루먼츠 인코포레이티드 | 집적회로메모리디바이스의내장자가테스트구성 |
JPH10162600A (ja) * | 1996-11-26 | 1998-06-19 | Mitsubishi Electric Corp | テスト機能内蔵半導体記憶装置 |
US5961653A (en) * | 1997-02-19 | 1999-10-05 | International Business Machines Corporation | Processor based BIST for an embedded memory |
US5875153A (en) * | 1997-04-30 | 1999-02-23 | Texas Instruments Incorporated | Internal/external clock option for built-in self test |
JP3153155B2 (ja) * | 1997-07-01 | 2001-04-03 | ローム株式会社 | 半導体メモリ |
US5995424A (en) * | 1997-07-16 | 1999-11-30 | Tanisys Technology, Inc. | Synchronous memory test system |
JP3948141B2 (ja) | 1998-09-24 | 2007-07-25 | 富士通株式会社 | 半導体記憶装置及びその制御方法 |
US6237115B1 (en) | 1999-03-08 | 2001-05-22 | Etron Technology, Inc. | Design for testability in very high speed memory |
JP4074029B2 (ja) * | 1999-06-28 | 2008-04-09 | 株式会社東芝 | フラッシュメモリ |
US6556480B2 (en) * | 2000-12-29 | 2003-04-29 | Stmicroelectronics S.R.L. | EEPROM circuit, in particular a microcontroller including read while write EEPROM for code and data storing |
US20040049724A1 (en) * | 2002-07-22 | 2004-03-11 | Colin Bill | Built-in-self-test (BIST) of flash memory cells and implementation of BIST interface |
US6847087B2 (en) * | 2002-10-31 | 2005-01-25 | Ememory Technology Inc. | Bi-directional Fowler-Nordheim tunneling flash memory |
-
2003
- 2003-04-28 IT IT000198A patent/ITRM20030198A1/it unknown
- 2003-10-30 US US10/696,973 patent/US6977852B2/en not_active Expired - Lifetime
-
2005
- 2005-06-24 US US11/166,500 patent/US7318181B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US6977852B2 (en) | 2005-12-20 |
US20050240851A1 (en) | 2005-10-27 |
US20040213060A1 (en) | 2004-10-28 |
ITRM20030198A0 (it) | 2003-04-28 |
US7318181B2 (en) | 2008-01-08 |
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