JPH08330446A - スタティックランダムアクセスメモリ素子及びその製造方法 - Google Patents

スタティックランダムアクセスメモリ素子及びその製造方法

Info

Publication number
JPH08330446A
JPH08330446A JP7286956A JP28695695A JPH08330446A JP H08330446 A JPH08330446 A JP H08330446A JP 7286956 A JP7286956 A JP 7286956A JP 28695695 A JP28695695 A JP 28695695A JP H08330446 A JPH08330446 A JP H08330446A
Authority
JP
Japan
Prior art keywords
layer
insulating layer
contact hole
memory device
access memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7286956A
Other languages
English (en)
Japanese (ja)
Inventor
Sancho Ri
燦 朝 李
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JPH08330446A publication Critical patent/JPH08330446A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element
    • H10B10/125—Static random access memory [SRAM] devices comprising a MOSFET load element the MOSFET being a thin film transistor [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/18—Peripheral circuit regions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903—FET configuration adapted for use as static memory cell
    • Y10S257/904—FET configuration adapted for use as static memory cell with passive components,, e.g. polysilicon resistors

Landscapes

  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
JP7286956A 1994-12-31 1995-11-06 スタティックランダムアクセスメモリ素子及びその製造方法 Pending JPH08330446A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR94-40680 1994-12-31
KR1019940040680A KR0145058B1 (ko) 1994-12-31 1994-12-31 스태틱 랜덤 억세스 메모리 소자 및 제조방법

Publications (1)

Publication Number Publication Date
JPH08330446A true JPH08330446A (ja) 1996-12-13

Family

ID=19406287

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7286956A Pending JPH08330446A (ja) 1994-12-31 1995-11-06 スタティックランダムアクセスメモリ素子及びその製造方法

Country Status (4)

Country Link
US (2) US5856706A (enExample)
JP (1) JPH08330446A (enExample)
KR (1) KR0145058B1 (enExample)
TW (1) TW297159B (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5789317A (en) * 1996-04-12 1998-08-04 Micron Technology, Inc. Low temperature reflow method for filling high aspect ratio contacts
US5994780A (en) * 1997-12-16 1999-11-30 Advanced Micro Devices, Inc. Semiconductor device with multiple contact sizes
JP3515363B2 (ja) * 1998-03-24 2004-04-05 株式会社東芝 半導体装置の製造方法
KR20000012252U (ko) * 1998-12-16 2000-07-05 전주범 압전소자를 사용한 커넥터
US6720660B1 (en) * 1998-12-22 2004-04-13 Seiko Epson Corporation Semiconductor device and method for manufacturing the same
JP3204316B2 (ja) * 1998-12-28 2001-09-04 日本電気株式会社 半導体装置の製造方法
US6521947B1 (en) 1999-01-28 2003-02-18 International Business Machines Corporation Method of integrating substrate contact on SOI wafers with STI process
US6165891A (en) * 1999-11-22 2000-12-26 Chartered Semiconductor Manufacturing Ltd. Damascene structure with reduced capacitance using a carbon nitride, boron nitride, or boron carbon nitride passivation layer, etch stop layer, and/or cap layer
KR100346832B1 (ko) * 2000-01-12 2002-08-03 삼성전자 주식회사 스태틱 랜덤 억세스 메모리 소자 및 그 제조 방법
KR100354440B1 (ko) * 2000-12-04 2002-09-28 삼성전자 주식회사 반도체 장치의 패턴 형성 방법
KR100378200B1 (ko) * 2001-05-22 2003-03-29 삼성전자주식회사 반도체 소자의 콘택 플러그 형성방법
US6621129B1 (en) * 2002-05-24 2003-09-16 Macronix International Co., Ltd. MROM memory cell structure for storing multi level bit information
KR20080076459A (ko) * 2007-02-16 2008-08-20 삼성전자주식회사 박막 트랜지스터 표시판 및 박막 트랜지스터 표시판의 제조방법
US7767496B2 (en) 2007-12-14 2010-08-03 Stats Chippac, Ltd. Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer
US8183095B2 (en) 2010-03-12 2012-05-22 Stats Chippac, Ltd. Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation
US9318441B2 (en) 2007-12-14 2016-04-19 Stats Chippac, Ltd. Semiconductor device and method of forming sacrificial adhesive over contact pads of semiconductor die
US8343809B2 (en) * 2010-03-15 2013-01-01 Stats Chippac, Ltd. Semiconductor device and method of forming repassivation layer with reduced opening to contact pad of semiconductor die
US8456002B2 (en) 2007-12-14 2013-06-04 Stats Chippac Ltd. Semiconductor device and method of forming insulating layer disposed over the semiconductor die for stress relief
US9548240B2 (en) 2010-03-15 2017-01-17 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming repassivation layer for robust low cost fan-out semiconductor package

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62229976A (ja) * 1986-03-31 1987-10-08 Toshiba Corp 半導体装置およびその製造方法
US5401994A (en) * 1991-05-21 1995-03-28 Sharp Kabushiki Kaisha Semiconductor device with a non-uniformly doped channel
EP0523856A3 (en) * 1991-06-28 1993-03-17 Sgs-Thomson Microelectronics, Inc. Method of via formation for multilevel interconnect integrated circuits
JP3065829B2 (ja) * 1992-12-25 2000-07-17 新日本製鐵株式会社 半導体装置
KR0161378B1 (ko) * 1994-06-13 1998-12-01 김광호 바이폴라 접합 트랜지스터 제조방법
US5576240A (en) * 1994-12-09 1996-11-19 Lucent Technologies Inc. Method for making a metal to metal capacitor
KR0161398B1 (ko) * 1995-03-13 1998-12-01 김광호 고내압 트랜지스터 및 그 제조방법
KR0176199B1 (ko) * 1996-03-19 1999-04-15 김광호 반도체 소자의 접촉창 형성방법
KR0183877B1 (ko) * 1996-06-07 1999-03-20 김광호 불휘발성 메모리 장치 및 그 제조방법
KR100267087B1 (en) * 1997-01-07 2000-10-02 Samsung Electronics Co Ltd Manufacturing method of capacitor device

Also Published As

Publication number Publication date
US6110773A (en) 2000-08-29
TW297159B (enExample) 1997-02-01
KR960026113A (ko) 1996-07-22
US5856706A (en) 1999-01-05
KR0145058B1 (ko) 1998-07-01

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