JPH0817189B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法

Info

Publication number
JPH0817189B2
JPH0817189B2 JP1006827A JP682789A JPH0817189B2 JP H0817189 B2 JPH0817189 B2 JP H0817189B2 JP 1006827 A JP1006827 A JP 1006827A JP 682789 A JP682789 A JP 682789A JP H0817189 B2 JPH0817189 B2 JP H0817189B2
Authority
JP
Japan
Prior art keywords
phase
semiconductor device
copper
bonding
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1006827A
Other languages
English (en)
Other versions
JPH02187042A (ja
Inventor
清昭 津村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP1006827A priority Critical patent/JPH0817189B2/ja
Priority to US07/392,553 priority patent/US5116783A/en
Priority to DE3938152A priority patent/DE3938152C2/de
Priority to KR1019890019300A priority patent/KR930006850B1/ko
Publication of JPH02187042A publication Critical patent/JPH02187042A/ja
Priority to US07/853,087 priority patent/US5229646A/en
Publication of JPH0817189B2 publication Critical patent/JPH0817189B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • H01L24/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、半導体素子の電極と外部リードとの配線
に金属細線を使用して、金ワイヤ以上の高信頼性を確保
できるようにした半導体装置の製造方法に関するもので
ある。
〔従来の技術〕
第2図,第3図は従来の半導体装置を示す断面図であ
り、これらの図において、11はSi基板、12はSiO2膜、13
はAl膜である。これらは半導体素子の電極部構造であ
り、14は前記Si基板11が接合されるリードフレームのダ
イスパッドで、接合材はエポキシ樹脂16またはAu−Si半
田17が使用されている。21は金属細線(銅ワイヤ)で、
この銅ワイヤ21は、先端を加熱することで溶融させ、銅
ボール22を生成し、これをキャピラリ・チップ(図示せ
ず)でAl膜13に押し当て、塑性変形させるとともに、超
音波エネルギーとSi基板11へ加わる熱エネルギー(250
℃〜400℃)により、Al膜13と圧着後の銅ボール22との
間に金属間化合物31〜33の合金層を生成させる。この金
属間化合物31〜33のうち、31はθ相(CuAl2)、32はη
相(CuAl)、33はγ相(Cu9Al4)である。半導体装
置としてはこの後、中空のセラミックに封止されるか、
エポキシ樹脂封止される。この断面の観察結果より、第
2図のθ相31は厚みのばらつきが大きく、不均一な合金
層であり、第3図のθ相31,η相32,γ相33は厚みの
ばらつきは小さく、均一な合金層が生成されていること
が判定できる。
また、合金層の評価方法として、接合部のAl膜13をリ
ン酸(H3PO4)でエッチング後、圧着した銅ボール22を
水酸化ナトリウム(NaOH)の水溶液で呈色させ、接合面
が褐色になることでθ相31の生成を観察して、合金層の
相の同定ができる。
第9図は、第2図の接合面の状態を示す図で、褐色に
呈色される部分(θ相)31が面全体になく不均一であ
り、褐色に呈色されない部分、すなわち合金層のθ相31
が生成していない銅の面が多く観察される。
第10図は同じく、第3図の接合面の状態を示す図で、
褐色に呈色される部分(θ相)31が面全体にあるもの
の、これ以外の白色または青色に呈色される部分も散在
して、合金層のθ相31が生成しているものの、η相32
またはγ相33も部分的に生成していることを示してい
る。
また、特開昭62−265729号公報に示された従来の半導
体装置は、その明細書の内容から、合金層がθ相,η
層,γ相の3種類が共存する第3図および第10図の状
態に近いものと推定される。
〔発明が解決しようとする課題〕
従来の半導体装置の接合部は、以上のような構造を持
ち、これをエポキシ樹脂で封止するか、または中空状態
でセラミック材により封止するかしている。
一般には、これを加速の信頼性試験を行って、半導体
装置の品質評価とする。セラミック封止の場合は特に問
題はないが、エポキシ樹脂封止の場合、とりわけ250℃
の恒温槽で高温保存を行うと、同じ配線を金ワイヤで行
った時に対して、品質のバラツキが大きく、また、高温
での寿命も金ワイヤの場合と同等で、銅ワイヤを使うメ
リットの1つである高温域への動作マージンを広げるこ
とができないという問題点があった。
この発明は、上記のような問題点を解決するためにな
されたもので、高温下のエポキシ樹脂の封止内部で生起
する銅・アルミ合金層の劣化を抑え、品質の均一な半導
体装置の製造方法を得ることを目的とする。
〔課題を解決するための手段〕
この発明に係る半導体装置は、半導体素子とリードフ
レームのダイスパッドを接合する接合材としてシリコー
ン樹脂を用いるとともに、前記電極と金属細線との接合
部の金属間化合物の主たる組成がCuAl2となるようにし
て前記アルミと金属細線とのボンディングを行うもので
ある。
〔作用〕
この発明においては、金属細線のAl膜との接合部に均
一なθ相が形成され、エポキシ樹脂による封止後の高温
保存においても劣化の進行が防止される。
〔実施例〕
以下、この発明について説明するが、まずその経緯に
ついて説明する。銅・アルミ合金系のエポキシ樹脂に封
止された状態での挙動を調査するために、単相バルクの
η相(CuAl),γ相(Cu9Al4),θ相(CuAl2)各
1組と、バルクAlとバルクCuを表面洗浄化後、圧延,熱
拡散させて作製したバルクを準備し、これらをエポキシ
樹脂中に封止後、高温保存し、その断面を観察した。
第4図(a)〜(c)は単相バルク、第5図は多層バ
ルクの断面観察結果を模式的に示したものである。
第4図の単相バルクでは、η相32〔第4図(b)〕
とγ相33〔第4図(a)〕はバルクの周囲に劣化した
η相34とη相35が観察されたが、θ相31の劣化は観
察されなかった。また、多相バルクについても、第5図
に示すようにバルクAl18,バルクCu23,θ相31は劣化せ
ず、η相34とγ相35は劣化した。
これらの解析結果から、銅・アルミ合金系の中には、
エポキシ樹脂封止後、高温保存を行った場合、選択的に
劣化が進行する合金相が存在することが判明した。
また、これらのことを実際のAl電極と銅ワイヤのボン
ディングの場合について観察した。すなわち、第3図に
示した半導体装置を250℃の恒温槽中に高温保存し、電
極と銅ワイヤ21の導通抵抗を測定することで、接合部の
劣化を判定し、この観察結果を第6図に20Hr後の接合部
の断面図として、第7図に30Hr後の接合部の断面図とし
て示す。
第6図は劣化が銅ボール22とAl膜13面の境界から銅ボ
ール22の内部へ向けて進行するとともに大きく広がり、
銅ボール22の周辺のAl膜13側にはθ相31が、また、劣化
の進行していない銅ボール22の内部には、η相32とγ
相33、周辺部には劣化したη相34と劣化したγ
35が観察される。
また、第7図は接合部の全てが完全に劣化している状
態が観察される。これらは250℃の高温保存では、劣化
と銅・アルミ合金層の成長が同時進行するために、バル
クで判明したη相32とγ相33の成長とともに劣化す
るη相34とγ相35も同時に広がったものと判断する
ことができる。なお、半導体装置としての寿命は第6図
と第7図の途中の状態で寿命が尽きる。
以上の実験結果をもとに、銅ワイヤ21を使用した半導
体装置の高温保存の信頼性を向上させるためには、均一
のθ相31のみを接合部に生成することであると結論づけ
た。
以下、この発明の一実施例を第1図について説明す
る。
第1図において、14はダイスパッドで、銅合金フレー
ムの一部で、これと半導体装置のSi基板11はシリコーン
樹脂15により接合されており、ここにおいて、従来と同
様のワイヤボンド方法により、Al膜13に圧着後の銅ボー
ル22との接合部に、θ相31のみの合金層を生成すること
ができる。これは、Al原子中にCu原子が2:1の比率で拡
散されるときにθ相(CuAl2)31が生成され、Cu原子とA
l原子を通常、一定の温度の下で加圧する場合に比べ
て、Cu原子がAl原子中へ拡散する速度が大きくなる時、
すなわち、Cu原子の温度がAl原子の温度よりも高いこ
と、またはAl原子の振動がCu原子の振動よりも大きいこ
とがθ相31を通常以上に生成させることになるものと思
われる。半導体装置としてはこの後、中空のセラミック
封止されるか、エポキシ樹脂封止される。
θ相31のみの合金層が生成された半導体装置を250℃
高温保存すると、初期において生成していないη相32
とγ相33が順次生成するとともに、周囲のエポキシ樹
脂の影響により、劣化が始まり、劣化と合金層の成長が
同時に進行する結果、第6図で示した状態で寿命が尽き
る。
また、θ相31の評価方法として、半製品を任意に抜き
取り、従来の技術で述べたリン酸によるエッチングと水
酸化ナトリウム水溶液による呈色で、接合面全体の80%
以上が褐色に呈色していることを確認し、安定な品質を
保ちながら、製造を行うことができる。第8図にθ相31
が、接合面全体に均一に生成した状態の模式図を示す。
この発明の特徴的な点は、半導体素子とダイスパッド
の接合を行うダイボンド材を最適化したことであり、第
1表に従来のエポキシ樹脂とAu−Si半田、今回のシリコ
ーン樹脂の特性比較を示す。
このうち、Au−Si半田はワイヤボンド時の加熱温度以
上の高温の使用に耐え、弾性率が高く、η相,γ
相,θ相のすべての合金系を生成しやすい。これに対
し、エポキシ樹脂は、ガラス転移点(Tg)が、ワイヤボ
ンド時の加熱温度以下で、Al膜と銅ボールの接合時に、
樹脂が劣化して弾性率の低下がおこり不均一なθ相しか
生成できない。しかし、シリコーン樹脂はガラス転移点
(Tg)がワイヤボンド時の加熱温度のはるか下の零下で
あるが、樹脂の劣化が起こらず、弾性率が安定している
ため、均一的なθ相を生成することができる。
したがって、上記ではシリコーン樹脂を使用したが、
室温から400℃までの弾性率が1.0×102kg/cm2以下のも
のであれば、他の材料でも同じ効果が得られる。
最後に、第11図は250℃高温保存時の半導体装置の信
頼性寿命の比較を示すグラフで、5が今回の発明、6は
従来のものを示す。従来20−30Hrの寿命が今回の発明に
より100−130Hrまで寿命を延ばすことができた。
〔発明の効果〕
以上説明したようにこの発明は、リードフレームのダ
イスバッドに接合された半導体素子の電極の主たる組成
がアルミであって、電極と外部リードとの配線が銅合金
の金属細線でボンディングされた後、樹脂封止される半
導体装置の製造方法において、半導体素子とリードフレ
ームのダイスパッドを接合する接合材としてシリコーン
樹脂を用いるとともに、電極と金属細線との接合部の金
属間化合物の主たる組成をCuAl2として前記アルミと金
属細線とのボンディングを行うようにしたので、高温信
頼性が向上した半導体装置を安定に製造できる効果があ
る。
【図面の簡単な説明】
第1図はこの発明の一実施例による半導体装置を示す断
面図、第2図および第3図は従来の半導体装置を示す断
面図、第4図は銅・アルミ合金系の単相バルクをエポキ
シ樹脂封止後、高温保存した実験サンプルの断面図、第
5図は銅・アルミのバルクを圧延後、熱処理して製造し
た多相バルクをエポキシ樹脂後、高温保存した実験サン
プルの断面図、第6図および第7図は、第3図の半導体
装置を高温保存した後の銅・アルミ接合部の断面図、第
8図〜第10図は、第1図〜第3図の銅ボールの接合面の
状態を示す模式図、第11図は高温信頼性試験における従
来の半導体装置とこの発明の半導体装置の保存時間と不
良発生率を示すワイブルプロットを示す図である。 図において、11はSi基板、12はSiO2膜、13はAl膜、14は
リードフレームのダイスパッド、15はシリコーン樹脂、
21は銅ワイヤ、22は圧着後の銅ボール、31はθ相(CuAl
2)である。 なお、各図中の同一符号は同一または相当部分を示す。

Claims (1)

    【特許請求の範囲】
  1. 【請求項1】リードフレームのダイスバッドに接合され
    た半導体素子の電極の主たる組成がアルミであって、前
    記電極と外部リードとの配線が銅合金の金属細線でボン
    ディングされた後、樹脂封止される半導体装置の製造方
    法において、前記半導体素子とリードフレームのダイス
    パッドを接合する接合材としてシリコーン樹脂を用いる
    とともに、前記電極と金属細線との接合部の金属間化合
    物の主たる組成をCuAl2として前記アルミと金属細線と
    のボンディングを行うことを特徴とする半導体装置の製
    造方法。
JP1006827A 1989-01-13 1989-01-13 半導体装置の製造方法 Expired - Lifetime JPH0817189B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP1006827A JPH0817189B2 (ja) 1989-01-13 1989-01-13 半導体装置の製造方法
US07/392,553 US5116783A (en) 1989-01-13 1989-08-11 Method of producing semiconductor device
DE3938152A DE3938152C2 (de) 1989-01-13 1989-11-16 Verfahren zur Herstellung eines Halbleiterbauelements
KR1019890019300A KR930006850B1 (ko) 1989-01-13 1989-12-22 반도체장치의 제조방법
US07/853,087 US5229646A (en) 1989-01-13 1992-03-17 Semiconductor device with a copper wires ball bonded to aluminum electrodes

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1006827A JPH0817189B2 (ja) 1989-01-13 1989-01-13 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPH02187042A JPH02187042A (ja) 1990-07-23
JPH0817189B2 true JPH0817189B2 (ja) 1996-02-21

Family

ID=11649054

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JP1006827A Expired - Lifetime JPH0817189B2 (ja) 1989-01-13 1989-01-13 半導体装置の製造方法

Country Status (4)

Country Link
US (1) US5116783A (ja)
JP (1) JPH0817189B2 (ja)
KR (1) KR930006850B1 (ja)
DE (1) DE3938152C2 (ja)

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Also Published As

Publication number Publication date
DE3938152C2 (de) 1994-05-05
US5116783A (en) 1992-05-26
KR900012342A (ko) 1990-08-03
JPH02187042A (ja) 1990-07-23
KR930006850B1 (ko) 1993-07-24
DE3938152A1 (de) 1990-07-26

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