JPH05218281A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH05218281A
JPH05218281A JP4057066A JP5706692A JPH05218281A JP H05218281 A JPH05218281 A JP H05218281A JP 4057066 A JP4057066 A JP 4057066A JP 5706692 A JP5706692 A JP 5706692A JP H05218281 A JPH05218281 A JP H05218281A
Authority
JP
Japan
Prior art keywords
bonding
bus bar
line
signal line
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP4057066A
Other languages
English (en)
Japanese (ja)
Inventor
Takayuki Maeda
孝幸 前田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Japan Ltd
Original Assignee
Texas Instruments Japan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Japan Ltd filed Critical Texas Instruments Japan Ltd
Priority to JP4057066A priority Critical patent/JPH05218281A/ja
Priority to EP93300864A priority patent/EP0560487B1/de
Priority to DE69321276T priority patent/DE69321276T2/de
Priority to SG1996007614A priority patent/SG49206A1/en
Priority to KR1019930001632A priority patent/KR100287827B1/ko
Publication of JPH05218281A publication Critical patent/JPH05218281A/ja
Priority to US08/324,330 priority patent/US5550401A/en
Priority to US08/838,471 priority patent/US5804871A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49517—Additional leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0612—Layout
    • H01L2224/0613—Square or rectangular array
    • H01L2224/06134—Square or rectangular array covering only portions of the surface to be connected
    • H01L2224/06136—Covering only the central area of the surface to be connected, i.e. central arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73215—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01019—Potassium [K]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)
JP4057066A 1992-02-07 1992-02-07 半導体装置 Withdrawn JPH05218281A (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP4057066A JPH05218281A (ja) 1992-02-07 1992-02-07 半導体装置
EP93300864A EP0560487B1 (de) 1992-02-07 1993-02-05 Halbleiteranordnung mit einem Leitergitter
DE69321276T DE69321276T2 (de) 1992-02-07 1993-02-05 Halbleiteranordnung mit einem Leitergitter
SG1996007614A SG49206A1 (en) 1992-02-07 1993-02-05 Semiconductor device
KR1019930001632A KR100287827B1 (ko) 1992-02-07 1993-02-06 반도체 장치
US08/324,330 US5550401A (en) 1992-02-07 1994-10-17 Lead on chip semiconductor device having bus bars and crossing leads
US08/838,471 US5804871A (en) 1992-02-07 1997-04-07 Lead on chip semiconductor device having bus bars and crossing leads

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4057066A JPH05218281A (ja) 1992-02-07 1992-02-07 半導体装置

Publications (1)

Publication Number Publication Date
JPH05218281A true JPH05218281A (ja) 1993-08-27

Family

ID=13045078

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4057066A Withdrawn JPH05218281A (ja) 1992-02-07 1992-02-07 半導体装置

Country Status (6)

Country Link
US (2) US5550401A (de)
EP (1) EP0560487B1 (de)
JP (1) JPH05218281A (de)
KR (1) KR100287827B1 (de)
DE (1) DE69321276T2 (de)
SG (1) SG49206A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5148265A (en) 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
JPH077121A (ja) * 1992-09-18 1995-01-10 Texas Instr Inc <Ti> 多層リードフレームアセンブリを有する半導体デバイスおよびそのパッケージ方法
JP3290869B2 (ja) * 1995-11-16 2002-06-10 株式会社東芝 半導体装置
US6462404B1 (en) 1997-02-28 2002-10-08 Micron Technology, Inc. Multilevel leadframe for a packaged integrated circuit
US5780923A (en) 1997-06-10 1998-07-14 Micron Technology, Inc. Modified bus bar with Kapton™ tape or insulative material on LOC packaged part
US6580157B2 (en) * 1997-06-10 2003-06-17 Micron Technology, Inc. Assembly and method for modified bus bar with Kapton™ tape or insulative material in LOC packaged part
US6144089A (en) * 1997-11-26 2000-11-07 Micron Technology, Inc. Inner-digitized bond fingers on bus bars of semiconductor device package
JP3063847B2 (ja) * 1998-05-01 2000-07-12 日本電気株式会社 リードフレーム及びそれを用いた半導体装置
JP2000100814A (ja) * 1998-09-18 2000-04-07 Hitachi Ltd 半導体装置
JP2009289969A (ja) * 2008-05-29 2009-12-10 Nec Electronics Corp リードフレーム
US8608738B2 (en) 2010-12-06 2013-12-17 Soulor Surgical, Inc. Apparatus for treating a portion of a reproductive system and related methods of use
ITTO20150231A1 (it) * 2015-04-24 2016-10-24 St Microelectronics Srl Procedimento per produrre lead frame per componenti elettronici, componente e prodotto informatico corrispondenti
JP7070070B2 (ja) * 2018-05-15 2022-05-18 株式会社デンソー 半導体装置

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4791473A (en) * 1986-12-17 1988-12-13 Fairchild Semiconductor Corporation Plastic package for high frequency semiconductor devices
KR0158868B1 (ko) * 1988-09-20 1998-12-01 미다 가쓰시게 반도체장치
JPH088330B2 (ja) * 1989-07-19 1996-01-29 日本電気株式会社 Ｌｏｃ型リードフレームを備えた半導体集積回路装置
US4965654A (en) * 1989-10-30 1990-10-23 International Business Machines Corporation Semiconductor package with ground plane
JP2567961B2 (ja) * 1989-12-01 1996-12-25 株式会社日立製作所 半導体装置及びリ−ドフレ−ム
JP2528991B2 (ja) * 1990-02-28 1996-08-28 株式会社日立製作所 樹脂封止型半導体装置及びリ―ドフレ―ム
JPH04348045A (ja) * 1990-05-20 1992-12-03 Hitachi Ltd 半導体装置及びその製造方法
US5227232A (en) * 1991-01-23 1993-07-13 Lim Thiam B Conductive tape for semiconductor package, a lead frame without power buses for lead on chip package, and a semiconductor device with conductive tape power distribution
US5206536A (en) * 1991-01-23 1993-04-27 Texas Instruments, Incorporated Comb insert for semiconductor packaged devices
US5286999A (en) * 1992-09-08 1994-02-15 Texas Instruments Incorporated Folded bus bar leadframe
US5563443A (en) * 1993-03-13 1996-10-08 Texas Instruments Incorporated Packaged semiconductor device utilizing leadframe attached on a semiconductor chip
US5545920A (en) * 1994-09-13 1996-08-13 Texas Instruments Incorporated Leadframe-over-chip having off-chip conducting leads for increased bond pad connectivity

Also Published As

Publication number Publication date
US5804871A (en) 1998-09-08
DE69321276T2 (de) 1999-02-18
DE69321276D1 (de) 1998-11-05
KR930018702A (ko) 1993-09-22
US5550401A (en) 1996-08-27
EP0560487A2 (de) 1993-09-15
EP0560487A3 (en) 1993-12-08
EP0560487B1 (de) 1998-09-30
SG49206A1 (en) 1998-05-18
KR100287827B1 (ko) 2001-04-16

Similar Documents

Publication Publication Date Title
US6762079B2 (en) Methods for fabricating dual loc semiconductor die assembly employing floating lead finger structure
US6531342B2 (en) Method for transverse hybrid loc package
US5834691A (en) Lead frame, its use in the fabrication of resin-encapsulated semiconductor device
US7405104B2 (en) Lead frame and method of producing the same, and resin-encapsulated semiconductor device and method of producing the same
JP2509422B2 (ja) 半導体装置及びその製造方法
KR0144164B1 (ko) 엘오씨 반도체 패키지 및 반도체 장치를 패키징하는 방법
US20100052125A1 (en) Resin sealing type semiconductor device and method of manufacturing the same, and lead frame
US7274092B2 (en) Semiconductor component and method of assembling the same
JP2538107B2 (ja) 高密度半導体モジユ−ルの製造方法
JPH088389A (ja) 半導体装置及び半導体装置ユニット
US7508060B2 (en) Multi-chip semiconductor connector assemblies
JPH05218281A (ja) 半導体装置
JP3297387B2 (ja) 半導体装置の製造方法
JP2954110B2 (ja) Ｃｓｐ型半導体装置及びその製造方法
KR100325189B1 (ko) Loc패키지구조를갖는플라스틱으로봉지된반도체장치
US6265761B1 (en) Semiconductor devices with improved lead frame structures
JP2981194B2 (ja) 半導体チップパッケージ
JP2000058578A (ja) 半導体装置
KR100390466B1 (ko) 멀티칩 모듈 반도체패키지
US20070108570A1 (en) Semiconductor device and method of manufacturing the same
JP2969301B2 (ja) 半導体装置
JP3665609B2 (ja) 半導体装置及びその半導体装置を複数個実装した半導体装置ユニット
JPH0529528A (ja) 半導体集積回路装置およびそれに用いるリードフレーム
JPH08250624A (ja) 半導体装置およびその製造方法
JP2752932B2 (ja) 半導体集積回路パッケージ

Legal Events

Date Code Title Description
A300 Application deemed to be withdrawn because no request for examination was validly filed

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19990518