JP7378560B2 - display device - Google Patents

Description

The present invention relates to a display device using a liquid crystal panel or a display device using an organic EL panel. The present invention also relates to an electronic device having the display device.

In recent years, there has been active development of display devices using liquid crystal panels and display devices using organic EL panels. There are two types of display devices: those in which only transistors for pixel control (pixel transistors) are formed on a substrate and the scanning circuit (drive circuit) performed by a peripheral IC, and those in which the scanning circuit is formed together with pixel transistors on the same substrate. It is classified as something that does.

A display device with an integrated drive circuit is more advantageous in order to narrow the frame of the display device or reduce the cost of peripheral ICs. However, transistors used in drive circuits are required to have higher electrical characteristics than those used in pixel transistors (eg, field effect mobility (μFE), threshold value, etc.).

Although silicon-based semiconductor materials are widely known as semiconductor thin films applicable to transistors, oxide semiconductors are attracting attention as other materials. For example, indium (In) with an electron carrier concentration of less than 10 ¹⁸ /cm ³ is used as a semiconductor thin film used in transistors.
A transistor using an amorphous oxide containing , gallium (Ga), and zinc (Zn) has been disclosed (for example, see Patent Document 1).

Transistors that use oxide semiconductors for their semiconductor layers have higher field-effect mobility than transistors that use amorphous silicon, which is a silicon-based semiconductor material, for their semiconductor layers, so they operate faster and can be used in display devices with integrated drive circuits. is preferable, and the manufacturing process is easier than that of a transistor using polycrystalline silicon for the semiconductor layer.

However, a transistor using an oxide semiconductor as a semiconductor layer has a problem in that carriers are formed when impurities such as hydrogen and moisture enter the oxide semiconductor, and the electrical characteristics of the transistor vary.

In order to solve the above-mentioned problems, a transistor is disclosed in which reliability is improved by reducing the concentration of hydrogen atoms in an oxide semiconductor film used as a channel formation region of the transistor to less than 1×10 ¹⁶ cm ⁻³ . (For example, Patent Document 2).

Japanese Patent Application Publication No. 2006-165528 Japanese Patent Application Publication No. 2011-139047

As described in Patent Document 2, in order to sufficiently maintain the electrical characteristics of a transistor using an oxide semiconductor film as a semiconductor layer, it is necessary to exclude hydrogen, moisture, etc. from the oxide semiconductor film as much as possible. This is very important.

Furthermore, when using transistors in both the pixel area and the drive circuit area of a display device, although it depends on the driving method, the transistors used in the drive circuit area have a larger electrical load than the pixel area, so the drive circuit The electrical characteristics of the transistor used in the region are important.

In particular, in display devices that use transistors in the pixel region and drive circuit region that use an oxide semiconductor film as the semiconductor layer, deterioration of the transistors used in the drive circuit region has become a problem in reliability tests under high temperature and high humidity environments. ing. The cause of the deterioration of the transistor is that moisture or the like enters an oxide semiconductor film used as a semiconductor layer from an organic insulating film formed over the transistor, and the carrier density of the oxide semiconductor film increases.

Therefore, an object of one embodiment of the present invention is to suppress fluctuations in electrical characteristics and improve reliability in a display device that includes transistors in a pixel region and a driver circuit region. In particular, in a display device using an oxide semiconductor film in a channel formation region of a transistor, it is possible to suppress hydrogen and moisture from entering the oxide semiconductor film, suppress fluctuations in electrical characteristics, and improve reliability. is one of the challenges.

In view of the above-mentioned problems, one embodiment of the present invention provides a structure in which variation in the electrical characteristics of the transistor can be suppressed in a display device including transistors used in a pixel region and a driver circuit region. More specifically, an oxide semiconductor film is used in the channel formation region of a transistor, and the structure of the planarization film formed from an organic insulating material provided on the transistor is made to have characteristics, so that hydrogen and moisture are absorbed into the oxide. The structure is such that it is difficult to penetrate into the semiconductor film, especially the oxide semiconductor film used in the drive circuit region. More specifically, it is as follows.

One embodiment of the present invention includes a pixel region in which a plurality of pixels including a pixel electrode and at least one first transistor electrically connected to the pixel electrode are arranged, and a pixel region adjacent to the outside of the pixel region; a first substrate formed with a drive circuit region including at least one second transistor that supplies a signal to a first transistor included in each pixel of the pixel region; a second substrate provided on the substrate, and a liquid crystal layer sandwiched between the first substrate and the second substrate, and formed of an inorganic insulating material on the first transistor and the second transistor. a first interlayer insulating film, a second interlayer insulating film formed of an organic insulating material on the first interlayer insulating film, and a third interlayer insulating film formed of an inorganic insulating material on the second interlayer insulating film. an insulating film;
The display device is characterized in that the interlayer insulating film is provided on a part of the pixel region, and the end portion of the third interlayer insulating film is formed inside the drive circuit region.

In the above structure, a first alignment film provided on the pixel electrode, a liquid crystal layer formed on the first alignment film, a second alignment film provided on the liquid crystal layer, and a second alignment film provided on the liquid crystal layer. A counter electrode provided on the film, an organic protective insulating film provided on the counter electrode, a colored film and a light-shielding film provided on the organic protective insulating film, and a second electrode provided on the colored film and light-shielding film. It may have two substrates.

Further, another embodiment of the present invention provides a pixel region in which a plurality of pixels including a pixel electrode and at least one first transistor electrically connected to the pixel electrode are arranged, and a pixel region outside the pixel region. a drive circuit region adjacent to the pixel region and including at least one second transistor that supplies a signal to a first transistor included in each pixel of the pixel region; and a light emitting layer sandwiched between the first and second substrates, and an inorganic insulating material is provided on the first transistor and the second transistor. a first interlayer insulating film formed of an organic insulating material on the first interlayer insulating film; and a second interlayer insulating film formed of an inorganic insulating material on the second interlayer insulating film. a third interlayer insulating film, the third interlayer insulating film is provided on a part of the pixel region, and an end of the third interlayer insulating film is formed inside the drive circuit region. This is a display device characterized by:

In the above configuration, a light emitting layer provided on the pixel electrode, an electrode provided on the light emitting layer,
It may have.

Furthermore, in each of the above configurations, the third interlayer insulating film is preferably one selected from a silicon nitride film, a silicon nitride oxide film, and an aluminum oxide film.

Furthermore, in each of the above structures, it is preferable that the semiconductor material forming the channel formation region of the first transistor and the second transistor is an oxide semiconductor. Furthermore, the first transistor and the second transistor each include a gate electrode, a semiconductor layer made of an oxide semiconductor formed on the gate electrode, and a source electrode and a drain electrode formed on the semiconductor layer. It is preferable that

Further, one embodiment of the present invention also includes an electronic device having a display device having each of the above configurations.

In a display device including transistors in a pixel region and a driver circuit region, fluctuations in electrical characteristics can be suppressed and reliability can be improved. In particular, in a display device using an oxide semiconductor film in a channel formation region of a transistor, it is possible to suppress hydrogen and moisture from entering the oxide semiconductor film, suppress fluctuations in electrical characteristics, and improve reliability. I can do it.

FIG. 2 is a diagram illustrating a top surface of one embodiment of a display device. FIG. 1 is a diagram illustrating a cross section of one form of a display device. FIG. 2 is a diagram illustrating a top surface of one embodiment of a display device. FIG. 1 is a diagram illustrating a cross section of one form of a display device. 1A and 1B are a circuit diagram and a cross-sectional view illustrating an example of a display device with an image sensor according to one embodiment of the present invention. FIG. 1 is a diagram illustrating an example of a tablet terminal according to one embodiment of the present invention. 1 is a diagram illustrating an example of an electronic device according to one embodiment of the present invention. FIG. 3 is a diagram showing the ion intensity of emitted gas at each mass-to-charge ratio. A diagram showing the ion intensity of each mass-to-charge ratio with respect to the substrate surface temperature. Cross-sectional observation image of the sample. A diagram showing the electrical characteristics of each sample.

Embodiments of the present invention will be described in detail below with reference to the drawings. However, those skilled in the art will easily understand that the present invention is not limited to the following description, and that its form and details can be changed in various ways. Further, the present invention is not to be interpreted as being limited to the contents described in the embodiments shown below.

In the embodiments described below, the same reference numerals are used in different drawings. Note that the constituent elements shown in the drawings, that is, the thicknesses and widths of layers and regions, relative positional relationships, etc., are exaggerated for clarity in describing the embodiments.

Further, in this specification and the like, the terms "electrode" and "wiring" do not functionally limit these components. For example, an "electrode" may be used as part of a "wiring" and vice versa. Furthermore, the terms "electrode" and "wiring" can refer to multiple "electrodes" and "wiring".
This also includes cases where "wiring" is formed integrally.

In addition, in this specification and the like, a silicon nitride oxide film refers to nitrogen, oxygen, silicon,
It is a film containing as a component, and the nitrogen content is higher than the oxygen content. Further, a silicon oxynitride film is a film that contains oxygen, nitrogen, and silicon as components, and the oxygen content is greater than the nitrogen content.

Furthermore, the functions of "source" and "drain" may be interchanged when transistors with different polarities are used, or when the direction of current changes during circuit operation. Therefore, in this specification and the like, the terms "source" and "drain" can be used interchangeably.

(Embodiment 1)
In this embodiment, a display device using a liquid crystal panel will be described as one form of a display device with reference to FIGS. 1 and 2.

FIGS. 1A, 1B, and 1C show top views of a display device as one form of the display device. Note that FIG. 1(A) shows the entire display device, and FIG. 1(B) shows a part of the drive circuit section of the display device.
FIG. 1C shows a top view of a portion of the pixel area. Further, FIG. 2 corresponds to a cross-sectional view taken along the line X1-Y1 in FIG. 1(A).

In the display device shown in FIG. 1A, a pixel region 142 provided on the first substrate 102
A sealing material 166 is provided so as to surround the gate driver circuit section 140 and the source driver circuit section 144, which are drive circuit regions that are adjacent to the outside of the pixel region 142 and supply signals to the pixel region 142. It is sealed by a substrate 152. Also, pixel area 1
42, and a first circuit provided with a gate driver circuit section 140 and a source driver circuit section 144.
A second substrate 152 is provided to face the substrate 102 . Therefore, the pixel area 14
2, the gate driver circuit section 140, and the source driver circuit section 144 are connected to the first substrate 1.
02, a sealing material 166, and a second substrate 152 together with the display element.

In addition, in FIG. 1A, the pixel region 142, the gate driver circuit section 140, the source driver circuit section 144, and the electrical connections are located in a region different from the region surrounded by the sealant 166 on the first substrate 102. FPC terminal section 146 (FPC: Flexib
The FPC terminal section 146 is provided with a
An FPC 148 is connected, and various signals and potentials given to the pixel region 142, the gate driver circuit section 140, and the source driver circuit section 144 are supplied by the FPC 148.

Further, although FIG. 1A shows an example in which the gate driver circuit portion 140 and the source driver circuit portion 144 are formed on the same first substrate 102 as the pixel region 142, the structure is not limited to this. For example, only the gate driver circuit portion 140 is formed on the first substrate 102, and a substrate on which a separately prepared source driver circuit is formed (for example, a single crystal semiconductor film,
A drive circuit board formed of a polycrystalline semiconductor film) may be mounted on the first substrate 102.

Further, although FIG. 1A illustrates a configuration in which two gate driver circuit units 140 are arranged on both sides of the pixel region 142, the present invention is not limited to this configuration. For example, the gate driver circuit section 140 may be arranged only on one side of the pixel region 142.

Note that the method of connecting the separately formed drive circuit board is not particularly limited, and COG
(Chip On Glass) method, wire bonding method, or TAB (Tap
e.Automated Bonding) method, etc. can be used. In addition, the display device includes a panel in which a display element is sealed, and an IC that includes a controller in the panel.
This includes modules that are in a state where they are implemented.

In this way, part or all of the driver circuit including the transistor can be integrally formed over the same first substrate 102 as the pixel region 142, and a system on panel can be formed.

Further, in FIG. 1C, the first transistor 101 and the capacitor 107 are formed in the pixel region 142. In the first transistor 101, a gate electrode 104, a source electrode 110, and a drain electrode 112 are each electrically connected to the semiconductor layer 108. Although not shown in the plan view shown in FIG. 1C, a first interlayer insulating film formed of an inorganic insulating material is provided over the first transistor 101, and a first interlayer insulating film formed of an inorganic insulating material is provided over the first transistor 101. A second interlayer insulating film made of an organic insulating material, and a third interlayer insulating film made of an inorganic insulating material are formed on the second interlayer insulating film. Further, the capacitive element 107 is connected to the capacitive electrode 11
8, a third interlayer insulating film formed on the capacitor electrode 118, and a pixel electrode 122 formed on the third interlayer insulating film.

Further, in FIG. 1B, a second transistor 103 and a third transistor 105 are formed in a gate driver circuit portion 140 that is a driver circuit region. Further, each transistor of the gate driver circuit section 140 has a gate electrode 10 with respect to the semiconductor layer 108.
4. The source electrode 110 and the drain electrode 112 are electrically connected to each other.
Furthermore, in the gate driver circuit section 140, the gate line including the gate electrode 104 extends in the left-right direction, the source line including the source electrode 110 extends in the vertical direction, and the drain electrode 11
A drain line including 2 is spaced apart from the source electrode and extends in the vertical direction.

The gate driver circuit section 140 including the second transistor 103 and the third transistor 105 can supply a signal to the first transistor 101 included in each pixel in the pixel region 142.

Further, the second transistor 103 and the third transistor 105 in the gate driver circuit section 140 require relatively high voltage in order to control various signals, boost voltage, and the like. Specifically, a voltage of about 10V to 30V is required. On the other hand, the first transistor 101 in the pixel region 142 is used only for switching the pixel, and therefore can be driven with a voltage of about several volts to 20 volts. Therefore, the gate driver circuit section 1
The second transistor 103 and the third transistor 105 in the pixel area 1
Compared to the first transistor 101 in 42, the applied stress is extremely large.

In order to more specifically explain the configuration of the display device shown in FIGS. 1(A), (B), and (C), FIG.
The configurations of the gate driver circuit section 140 and the pixel region 142 will be described below using FIG. 2, which corresponds to the cross-sectional view taken along the line X1-Y1 in (A), (B), and (C).

In the pixel region 142, the first substrate 102, the gate electrode 104 formed on the first substrate 102, the gate insulating film 106 formed on the gate electrode 104, and the gate electrode A semiconductor layer 108 provided at a position overlapping with 104, a gate insulating film 106, and a source electrode 110 and a drain electrode 1 formed on the semiconductor layer 108.
12, the first transistor 101 is formed.

Further, in the pixel region 142, a first interlayer insulating film 114 formed of an inorganic insulating material is formed on the first transistor 101, more specifically, on the gate insulating film 106, the semiconductor layer 108, the source electrode 110, and the drain electrode 112. , a second interlayer insulating film 116 formed of an organic insulating material on the first interlayer insulating film 114 , a capacitor electrode 118 formed on the second interlayer insulating film 116 , and a second interlayer insulating film 114 . 116 and the capacitor electrode 118, a third interlayer insulating film 120 formed of an inorganic insulating material, a pixel electrode 122 formed on the third interlayer insulating film 120,
have.

Note that the capacitor element 107 is formed by the capacitor electrode 118, the third interlayer insulating film 120, and the pixel electrode 122. By forming the capacitor electrode 118, the third interlayer insulating film 120, and the pixel electrode 122 from materials that are transparent to visible light, a large capacitance can be secured without impairing the aperture ratio of the pixel area. This is suitable because it can be done.

Further, on the pixel electrode 122, a first alignment film 124, a liquid crystal layer 162 provided on the first alignment film 124, a second alignment film 164 provided on the liquid crystal layer 162, and a second alignment film 164 provided on the liquid crystal layer 162 are disposed on the pixel electrode 122. A counter electrode 158 provided on the alignment film 164 of No. 2, an organic protective insulating film 156 provided on the counter electrode 158, a colored film 153 and a light shielding film 154 provided on the organic protective insulating film 156, A second substrate 152 is provided on a film 153 and a light shielding film 154.

Note that the pixel electrode 122, the first alignment film 124, the liquid crystal layer 162, and the second alignment film 16
4 and the counter electrode 158 form a liquid crystal element 150 which is a display element.

In the gate driver circuit section 140, a first substrate 102, a gate electrode 104 formed on the first substrate 102, a gate insulating film 106 formed on the gate electrode 104,
A semiconductor layer 10 provided in a position that is in contact with the gate insulating film 106 and overlaps with the gate electrode 104
8, the gate insulating film 106, and the source electrode 110 and drain electrode 112 formed on the semiconductor layer 108, the second transistor 103 and the third transistor 10
5 is formed.

In addition, in the gate driver circuit section 140, a first An interlayer insulating film 114 and a second interlayer insulating film 116 formed on the first interlayer insulating film 114 are formed.

That is, the third interlayer insulating film 120 is provided on a part of the pixel region 142, and the end of the third interlayer insulating film 120 is formed inside the gate driver circuit section 140, which is the drive circuit region. .

With this configuration, moisture taken in from the outside or moisture generated inside the display device, gas such as hydrogen can be released upward from the second interlayer insulating film 116 of the gate driver circuit section 140. . Therefore, gases such as moisture and hydrogen can be prevented from being taken into the first transistor 101, the second transistor 103, and the third transistor 105.

Note that the second interlayer insulating film 116 formed of an organic insulating material is required to be an organic insulating material with high flatness in order to reduce unevenness of the transistors forming the display device. This is because the image quality of the display device can be improved by reducing the unevenness of the transistor. However, when the organic insulating material is heated, it releases hydrogen, moisture, or organic components as gas.

However, in a transistor in which a silicon film, which is a silicon-based semiconductor material, is used for the semiconductor layer 108, for example, the above-mentioned hydrogen, moisture, or organic component gas is unlikely to cause a major problem. However, in one embodiment of the present invention, since an oxide semiconductor film is used for the semiconductor layer 108, gas from the second interlayer insulating film 116 formed using an organic insulating material needs to be appropriately released to the outside. Note that the configuration in which the end portion of the third interlayer insulating film 120 is formed inside the gate driver circuit section 140, which is the drive circuit region, has an excellent effect when the semiconductor layer 108 is formed of an oxide semiconductor film. play. However, the same effect can be obtained in a transistor in which the semiconductor layer 108 is formed using a material other than an oxide semiconductor (for example, amorphous silicon, crystalline silicon, etc., which are silicon-based semiconductor materials).

Further, in this embodiment, the third interlayer insulating film 120 formed of an inorganic insulating material is formed on the second interlayer insulating film 116 formed of an organic insulating material. used as Further, the third interlayer insulating film 120 formed of an inorganic insulating material can suppress hydrogen, moisture, and the like from entering the second interlayer insulating film 116 from the outside.

However, when the third interlayer insulating film 120 is formed on the second interlayer insulating film 116 on the second transistor 103 and the third transistor 105 used in the gate driver circuit section 140, the second interlayer insulating film 116 Gas released from the organic insulating material used cannot be diffused to the outside and enters the second transistor 103 and the third transistor 105.

When the gas released from the organic insulating material described above enters the oxide semiconductor used for the semiconductor layer 108 of the transistor, it is taken in as an impurity in the oxide semiconductor film, and the gas emitted from the semiconductor layer 1
The characteristics of the transistor using 08 will vary.

However, as shown in FIG. 2, a configuration in which the third interlayer insulating film 120 on the second transistor 103 and the third transistor 105 used in the gate driver circuit section 140 is opened,
That is, the third interlayer insulating film 120 is provided in a part of the pixel region 142, and the end portion of the third interlayer insulating film 120 is formed inside the gate driver circuit section 140. The structure can be such that gas released from the second interlayer insulating film 116 can be diffused to the outside.

Note that, as shown in FIG. 2, also in the first transistor 101 used in the pixel region 142, a third interlayer insulating film 120 formed of an inorganic insulating material is formed at a position where the semiconductor layer 108 overlaps.
A configuration in which the is removed is preferable. With this structure, gas released from the second interlayer insulating film 116 formed of an organic insulating material can be suppressed from entering the first transistor 101.

Here, other components of the display device shown in FIGS. 1 and 2 will be described in detail below.

As the first substrate 102 and the second substrate 152, a glass material such as aluminosilicate glass, aluminoborosilicate glass, barium borosilicate glass, or the like is used. For mass production, the first substrate 102 and the second substrate 152 are 8th generation (2160 mm x 2460 m
m), 9th generation (2400mm x 2800mm or 2450mm x 3050mm),
It is preferable to use mother glass such as 10th generation (2950 mm x 3400 mm).
Mother glass shrinks significantly when the processing temperature is high and the processing time is long, so when mass production is performed using mother glass, the heat treatment in the manufacturing process is preferably 600°C or lower, more preferably 450°C or lower. , more preferably 350°C or less.

Note that a base insulating film may be provided between the first substrate 102 and the gate electrode 104. Examples of the base insulating film include a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a silicon nitride oxide film, a gallium oxide film, a hafnium oxide film, a yttrium oxide film, an aluminum oxide film, an aluminum oxynitride film, and the like. Note that by using a silicon nitride film, gallium oxide film, hafnium oxide film, yttrium oxide film, aluminum oxide film, etc. as the base insulating film, impurities, typically alkali metals, water, and hydrogen, are removed from the first substrate 102. etc. are the semiconductor layer 10
8 can be suppressed.

The gate electrode 104 is made of a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, or an alloy containing the above-mentioned metal elements.
It can be formed using an alloy or the like that is a combination of the above-mentioned metal elements. Further, a metal element selected from one or more of manganese and zirconium may be used. Also,
The gate electrode 104 may have a single layer structure or a stacked structure of two or more layers. For example, a single layer structure of an aluminum film containing silicon, a double layer structure in which a titanium film is laminated on an aluminum film,
A two-layer structure in which a titanium film is laminated on a titanium nitride film, a two-layer structure in which a tungsten film is laminated on a titanium nitride film, a two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film, a titanium film, There is a three-layer structure in which an aluminum film is laminated on the titanium film, and a titanium film is further formed on top of the aluminum film. Furthermore, a film of an element selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium, an alloy film of a combination of these elements, or a nitride film may be used for aluminum.

In addition, the gate electrode 104 is made of indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, or indium zinc oxide. A conductive material having translucency, such as indium tin oxide added with silicon oxide, can also be used. Further, it is also possible to have a laminated structure of the above-mentioned conductive material having light-transmitting properties and the above-mentioned metal element.

Further, between the gate electrode 104 and the gate insulating film 106, an In-Ga-Zn-based oxynitride semiconductor film, an In-Sn-based oxynitride semiconductor film, an In-Ga-based oxynitride semiconductor film, an In-Zn
-based oxynitride semiconductor film, Sn-based oxynitride semiconductor film, In-based oxynitride semiconductor film, metal nitride film (
InN, ZnN, etc.) may also be provided. These films have a voltage of 5 eV or more, preferably 5.5 eV
Since the work function is higher than that of the electron affinity of the oxide semiconductor, the threshold voltage of the transistor using the oxide semiconductor can be shifted positively, and switching with so-called normally-off characteristics can be achieved. element can be realized. For example, when using an In-Ga-Zn-based oxynitride semiconductor film, the nitrogen concentration is at least higher than that of the semiconductor layer 108, specifically, 7 atomic %.
The above In-Ga-Zn-based oxynitride semiconductor film is used.

As the gate insulating film 106, for example, a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, a hafnium oxide film, a gallium oxide film, a Ga-Zn-based metal oxide film, or the like can be used. It may be provided as a laminated layer or a single layer. Note that in order to improve the interface characteristics with the semiconductor layer 108, at least a region of the gate insulating film 106 that is in contact with the semiconductor layer 108 is preferably formed of an oxide insulating film.

Furthermore, by providing the gate insulating film 106 with an insulating film that has an effect of blocking oxygen, hydrogen, water, etc., it is possible to prevent oxygen from diffusing from the semiconductor layer 108 to the outside and hydrogen, water, etc. from the outside to the semiconductor layer 108. can be prevented from entering. Examples of the insulating film having a blocking effect against oxygen, hydrogen, water, etc. include aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride, and the like.

Further, the gate insulating film 106 has a laminated structure, a silicon nitride film with few defects is used as the first silicon nitride film, and a second silicon nitride film is formed on the first silicon nitride film to increase the amount of hydrogen released and the amount of ammonia released. By providing a silicon nitride film with a small amount and providing an oxide insulating film on the second silicon nitride film, a gate insulating film 106 with few defects and a small amount of hydrogen and ammonia released is formed as the gate insulating film 106. can do. As a result, it is possible to suppress hydrogen and nitrogen contained in the gate insulating film 106 from moving to the semiconductor layer 108.

Further, by using a silicon nitride film for the gate insulating film 106, the following effects can be obtained. A silicon nitride film has a higher dielectric constant than a silicon oxide film and requires a larger film thickness to obtain the same capacitance, so the gate insulating film can be physically thickened.
Therefore, it is possible to suppress a decrease in the dielectric strength voltage of the first transistor 101, the second transistor 103, and the third transistor 105, and further to improve the dielectric strength voltage, thereby suppressing electrostatic discharge breakdown of transistors used in a display device. I can do it.

Further, copper is used as the gate electrode 104, and the gate insulating film 10 in contact with the gate electrode 104 is
When a silicon nitride film is used for No. 6, the silicon nitride film preferably reduces the amount of ammonia molecules released by heating as much as possible in order to suppress the reaction between copper and ammonia molecules.

In a transistor using an oxide semiconductor film as the semiconductor layer 108, if a trap level (also referred to as an interface state) exists at the interface between the oxide semiconductor film and the gate insulating film or in the gate insulating film,
The variation in the threshold voltage of a transistor, typically a negative shift in the threshold voltage, and the subthreshold coefficient (S value). As a result, there is a problem that electrical characteristics vary from transistor to transistor. Therefore, by using a silicon nitride film with few defects as the gate insulating film, a negative shift in the threshold voltage and variations in the electrical characteristics of the transistor can be reduced.

Further, as the gate insulating film 106, hafnium silicate (HfSiO _x ), hafnium silicate added with nitrogen ( _HfSix O _y N _z ), hafnium aluminate added with nitrogen (HfAl _x O _y N _z ), or hafnium oxide is used. , yttrium oxide, etc.
By using -k material, gate leakage of transistors can be reduced.

The thickness of the gate insulating film 106 is preferably 5 nm or more and 400 nm or less, more preferably 10 nm or more and 300 nm or less, and even more preferably 50 nm or more and 250 nm or less.

The semiconductor layer 108 is preferably made of an oxide semiconductor and contains at least indium (In) or zinc (Zn). Alternatively, it is preferable to contain both In and Zn. Further, in order to reduce variations in electrical characteristics of a transistor using the oxide semiconductor, it is preferable to include one or more stabilizers in addition to the transistors.

Examples of the stabilizer include gallium (Ga), tin (Sn), hafnium (Hf), aluminum (Al), and zirconium (Zr). Other stabilizers include lanthanoids such as lanthanum (La), cerium (Ce), and praseodymium (
Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium ( Yb), lutetium (Lu), etc.

For example, as oxide semiconductors, indium oxide, tin oxide, zinc oxide, In-Zn metal oxides, Sn-Zn metal oxides, Al-Zn metal oxides, Zn-Mg metal oxides, Sn- Mg-based metal oxide, In-Mg-based metal oxide, In-Ga-based metal oxide, In-
W-based metal oxide, In-Ga-Zn-based metal oxide (also written as IGZO), In-Al
-Zn-based metal oxide, In-Sn-Zn-based metal oxide, Sn-Ga-Zn-based metal oxide,
Al-Ga-Zn metal oxide, Sn-Al-Zn metal oxide, In-Hf-Zn metal oxide, In-La-Zn metal oxide, In-Ce-Zn metal oxide, In-Pr
-Zn-based metal oxide, In-Nd-Zn-based metal oxide, In-Sm-Zn-based metal oxide,
In-Eu-Zn based metal oxide, In-Gd-Zn based metal oxide, In-Tb-Zn based metal oxide, In-Dy-Zn based metal oxide, In-Ho-Zn based metal oxide, In-Er
-Zn-based metal oxide, In-Tm-Zn-based metal oxide, In-Yb-Zn-based metal oxide,
In-Lu-Zn metal oxide, In-Sn-Ga-Zn metal oxide, In-Hf-G
a-Zn metal oxide, In-Al-Ga-Zn metal oxide, In-Sn-Al-Zn
In-Sn-Hf-Zn-based metal oxides, In-Hf-Al-Zn-based metal oxides can be used.

Note that here, for example, an In-Ga-Zn-based metal oxide means an oxide containing In, Ga, and Zn as main components, and the ratio of In to Ga to Zn does not matter. Also, I
Metal elements other than n, Ga, and Zn may also be contained.

Further, as the oxide semiconductor, a material expressed as InMO ₃ (ZnO) _m (m>0 and m is not an integer) may be used. Note that M represents one or more metal elements selected from Ga, Fe, Mn, and Co. In addition, as an oxide semiconductor, In ₂ SnO
₅ (ZnO) _n (n>0, and n is an integer) may be used.

For example, In:Ga:Zn=1:1:1 (=1/3:1/3:1/3), In:Ga:
Zn=2:2:1 (=2/5:2/5:1/5) or In:Ga:Zn=3:1:
An In-Ga-Zn metal oxide having an atomic ratio of 2 (=1/2:1/6:1/3) or an oxide having a composition close to that can be used. Alternatively, In:Sn:Zn=1:1:1 (=1
/3:1/3:1/3), In:Sn:Zn=2:1:3 (=1/3:1/6:1/2)
Or In with an atomic ratio of In:Sn:Zn=2:1:5 (=1/4:1/8:5/8)
-Sn-Zn based metal oxides are preferably used. Note that the atomic ratio of the metal oxide includes a fluctuation of plus or minus 20% of the above-mentioned atomic ratio as an error.

However, the material is not limited to these, and a material with an appropriate composition may be used depending on the required semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, variation, etc.). Further, in order to obtain the required semiconductor characteristics, it is preferable to set appropriate carrier density, impurity concentration, defect density, atomic ratio of metal element to oxygen, interatomic distance, density, etc.

For example, high mobility can be obtained relatively easily with In-Sn-Zn metal oxides. However, even in In--Ga--Zn based metal oxides, the field effect mobility can be increased by lowering the defect density in the bulk.

Further, an oxide semiconductor film that can be used as the semiconductor layer 108 has an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more.
In this way, by using an oxide semiconductor film with a wide energy gap, the off-state current of the transistor can be reduced.

Next, the structure of an oxide semiconductor film that can be used as the semiconductor layer 108 will be described.

Oxide semiconductor films are broadly classified into non-single crystal oxide semiconductor films and single crystal oxide semiconductor films.
A non-single crystal oxide semiconductor film is a CAAC-OS (CA Axis Aligned Cry
stalline oxide semiconductor film, polycrystalline oxide semiconductor film, microcrystalline oxide semiconductor film, amorphous oxide semiconductor film, etc.

Here, the CAAC-OS film will be explained.

The CAAC-OS film is one of the oxide semiconductor films having a plurality of crystal parts, and most of the crystal parts are sized to fit within a cube with one side of less than 100 nm. Therefore, CAAC-
The crystal portion included in the OS film may have a size that fits within a cube with one side of less than 10 nm, less than 5 nm, or less than 3 nm.

The CAAC-OS film was examined using a transmission electron microscope (TEM).
When observed using a tron microscope, clear boundaries between crystal parts, ie, crystal grain boundaries (also referred to as grain boundaries) cannot be confirmed. Therefore, C
It can be said that the AAC-OS film is less prone to decrease in electron mobility due to grain boundaries.

When the CAAC-OS film is observed by TEM in a direction approximately parallel to the sample surface (cross-sectional TEM observation), it can be confirmed that metal atoms are arranged in a layered manner in the crystal part. Each layer of metal atoms has a shape that reflects the unevenness of the surface on which the film is formed (also referred to as the surface to be formed) or the top surface of the CAAC-OS film, and is arranged parallel to the surface to be formed or the top surface of the CAAC-OS film. .

On the other hand, the CAAC-OS film was observed by TEM from a direction approximately perpendicular to the sample surface (plane T
(EM observation), it can be confirmed that metal atoms are arranged in a triangular or hexagonal shape in the crystal part. However, no regularity is observed in the arrangement of metal atoms between different crystal parts.

Note that in this specification, "parallel" refers to a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, cases where the angle is greater than or equal to -5° and less than or equal to 5° are also included. Also,"
"Perpendicular" refers to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less.
Therefore, cases where the angle is greater than or equal to 85° and less than or equal to 95° are also included.

From the cross-sectional TEM observation and the planar TEM observation, it can be seen that the crystal part of the CAAC-OS film has orientation.

X-ray diffraction (XRD) was performed on the CAAC-OS film.
When structural analysis is performed using a device, for example, a CAAC-OS with InGaZnO ₄ crystals is found.
In an out-of-plane analysis of a film, a peak may appear at a diffraction angle (2θ) of around 31°. This peak is attributed to the (009) plane of the InGaZnO ₄ crystal, which indicates that the crystal of the CAAC-OS film has c-axis orientation, and the c-axis is oriented approximately perpendicular to the formation surface or top surface. It can be confirmed that

On the other hand, an in-p in which X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis.
In analysis using the lane method, a peak may appear near 2θ of 56°. This peak is assigned to the (110) plane of the InGaZnO ₄ crystal. For a single-crystal oxide semiconductor film of _InGaZnO4 , 2θ is fixed near 56°, and the normal vector of the sample surface is the axis (φ axis).
When analysis (φ scan) is performed while rotating the sample, six peaks attributed to crystal planes equivalent to the (110) plane are observed. On the other hand, in the case of the CAAC-OS film, no clear peak appears even when φ scanning is performed with 2θ fixed at around 56°.

From the above, in the CAAC-OS film, the orientation of the a-axis and b-axis is irregular between different crystal parts, but it has c-axis orientation, and the c-axis is normal to the surface on which it is formed or the top surface. It can be seen that the direction is parallel to the vector. Therefore, each layer of metal atoms arranged in a layered manner confirmed by the above-mentioned cross-sectional TEM observation is a plane parallel to the ab plane of the crystal.

Note that the crystal portion is formed when the CAAC-OS film is formed or when a crystallization process such as heat treatment is performed. As described above, the c-axis of the crystal is oriented in a direction parallel to the normal vector of the surface on which the CAAC-OS film is formed or the top surface. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal may not be parallel to the normal vector of the formation surface or top surface of the CAAC-OS film.

Further, the degree of crystallinity in the CAAC-OS film does not have to be uniform. For example, CAAC-OS
When the crystalline portion of the film is formed by crystal growth from near the top surface of the CAAC-OS film, the region near the top surface may have a higher degree of crystallinity than the region near the surface on which it is formed. Also, CA
When an impurity is added to an AC-OS film, the crystallinity of the region to which the impurity is added changes, and regions with partially different crystallinity may be formed.

Note that the out-of-plane of the CAAC-OS film having InGaZnO ₄ crystals
In the analysis using the method, in addition to the peak near 2θ of 31°, a peak may also appear near 2θ of 36°. Since the peak near 2θ of ₃₆ ° is attributed to the (311) plane of the ZnGa ₂ O ₄ crystal, Z
This indicates that nGa ₂ O ₄ crystals are included. It is preferable that the CAAC-OS film exhibits a peak in 2θ near 31° and does not show a peak in 2θ near 36°.

The CAAC-OS film is an oxide semiconductor film with low impurity concentration. The impurity is an element other than the main component of the oxide semiconductor film, such as hydrogen, carbon, silicon, or a transition metal element. In particular, elements such as silicon, which have a stronger bond with oxygen than the metal elements constituting the oxide semiconductor film, disturb the atomic arrangement of the oxide semiconductor film by removing oxygen from the oxide semiconductor film, resulting in crystallinity. This is a factor that reduces the In addition, heavy metals such as iron and nickel, argon, carbon dioxide, etc. have large atomic radii (or molecular radii), so if they are included inside the oxide semiconductor film, they will disturb the atomic arrangement of the oxide semiconductor film and cause crystallinity. This is a factor that reduces the Note that impurities contained in the oxide semiconductor film may become a carrier trap or a carrier generation source.

Further, the CAAC-OS film is an oxide semiconductor film with a low density of defect levels. For example, oxygen vacancies in an oxide semiconductor film may act as a carrier trap or become a carrier generation source by capturing hydrogen.

A material having a low impurity concentration and a low defect level density (few oxygen vacancies) is called high-purity intrinsic or substantially high-purity intrinsic. A high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film has few carrier generation sources, and thus can have a low carrier density. Therefore, a transistor using the oxide semiconductor film rarely has electrical characteristics in which the threshold voltage is negative (also referred to as normally-on). Further, an oxide semiconductor film that is highly pure or substantially pure has fewer carrier traps. Therefore, a transistor using the oxide semiconductor film has small fluctuations in electrical characteristics and is highly reliable. Note that the charge trapped in the carrier trap of the oxide semiconductor film may behave as if it were a fixed charge because it takes a long time to release the charge. Therefore, a transistor including an oxide semiconductor film with a high impurity concentration and a high defect level density may have unstable electrical characteristics.

Further, a transistor using a CAAC-OS film has small fluctuations in electrical characteristics due to irradiation with visible light or ultraviolet light.

Further, the CAAC-OS film is formed by a sputtering method using, for example, a polycrystalline oxide semiconductor sputtering target. When ions collide with the sputtering target, the crystalline region included in the sputtering target cleaves from the a-b plane and is exfoliated as plate-shaped or pellet-shaped sputtered particles having planes parallel to the a-b plane. be. In this case, the planar sputtered particles reach the substrate while maintaining their crystalline state, thereby making it possible to form a CAAC-OS film.

Further, in order to form a CAAC-OS film, it is preferable to apply the following conditions.

By reducing the amount of impurities mixed in during film formation, it is possible to prevent the crystal state from being disrupted by the impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the deposition chamber.
All you have to do is reduce it. Further, the concentration of impurities in the film forming gas may be reduced. Specifically, a film forming gas having a dew point of -80°C or lower, preferably -100°C or lower is used.

Furthermore, by increasing the substrate heating temperature during film formation, migration of sputtered particles occurs after reaching the substrate. Specifically, the film is formed at a substrate heating temperature of 100° C. or higher and 740° C. or lower, preferably 150° C. or higher and 500° C. or lower. By increasing the substrate heating temperature during film formation,
When the flat plate-shaped sputtered particles reach the substrate, migration occurs on the substrate, and the flat surface of the sputtered particles adheres to the substrate.

Further, it is preferable to reduce plasma damage during film formation by increasing the proportion of oxygen in the film formation gas and optimizing the electric power. The oxygen percentage in the film forming gas is 30% by volume or more, preferably 100% by volume or more.
It is expressed as volume %.

Further, the oxide semiconductor film used as the semiconductor layer 108 may have a structure in which a plurality of oxide semiconductor films are stacked. For example, an oxide semiconductor film may be formed by forming a stack of a first oxide semiconductor film and a second oxide semiconductor film, and the first oxide semiconductor film and the second oxide semiconductor film may include metal oxides having different compositions. may also be used. For example, one of a binary metal oxide or a quaternary metal oxide is used for the first oxide semiconductor film, and a binary metal oxide different from that of the first oxide semiconductor film is used for the second oxide semiconductor film. A metal oxide or a quaternary metal oxide may be used.

Alternatively, the first oxide semiconductor film and the second oxide semiconductor film may have the same constituent elements, but may have different compositions. For example, the atomic ratio of the first oxide semiconductor film is In:Ga:Zn=
1:1:1, and the atomic ratio of the second oxide semiconductor film may be In:Ga:Zn=3:1:2. Further, the atomic ratio of the first oxide semiconductor film is In:Ga:Zn=1:3:2, and the atomic ratio of the second oxide semiconductor film is In:Ga:Zn=2:1:3. You can also use it as Note that the atomic ratio of each oxide semiconductor film includes a variation of plus or minus 20% of the above atomic ratio as an error.

At this time, between the first oxide semiconductor film and the second oxide semiconductor film, the side closer to the gate electrode (
The content of In and Ga in the oxide semiconductor film (on the channel side) is preferably set to satisfy In>Ga. In addition, the content of In and Ga in the oxide semiconductor film on the side far from the gate electrode (back channel side) is
It is preferable that ≦Ga.

Alternatively, the oxide semiconductor film may have a three-layer structure, and the first to third oxide semiconductor films may have the same constituent elements and different compositions. For example, the atomic ratio of the first oxide semiconductor film is In:Ga:Zn=1:3:2, and the atomic ratio of the second oxide semiconductor film is In:Ga:Zn=3:1:2. and the atomic ratio of the third oxide semiconductor film is In:G
It is good also as a:Zn=1:1:1.

An oxide semiconductor film in which the atomic ratio of In is smaller than that of Ga and Zn, typically an atomic ratio of In
:Ga:Zn=1:3:2, the first oxide semiconductor film has a larger atomic ratio of In than Ga and Zn, typically the second oxide semiconductor film, and Compared to an oxide semiconductor film having the same atomic ratio of Ga, Zn, and In, typically a third oxide semiconductor film,
Since oxygen vacancies are less likely to occur, increase in carrier density can be suppressed. Furthermore, when the first oxide semiconductor film with an atomic ratio of In:Ga:Zn=1:3:2 has an amorphous structure, the second oxide semiconductor film tends to become a CAAC-OS film.

Furthermore, since the constituent elements of the first to third oxide semiconductor films are the same, the first oxide semiconductor film has a trap level at the interface with the second oxide semiconductor film. few.
Therefore, by forming the oxide semiconductor film into the above structure, the amount of fluctuation in the threshold voltage due to aging or photodeterioration of the transistor can be reduced.

In oxide semiconductors, the s-orbitals of heavy metals mainly contribute to carrier conduction, and increasing the In content causes more s-orbitals to overlap, so oxides with a composition of In>Ga have a composition of In≦Ga. It has high carrier mobility compared to oxides with a composition of Also, Ga
Compared to In, the formation energy of oxygen vacancies is larger and oxygen vacancies are less likely to occur; therefore, In≦
An oxide having a composition of Ga has more stable characteristics than an oxide having a composition of In>Ga.

An oxide semiconductor with a composition of In>Ga is applied to the channel side, and In is applied to the back channel side.
By using an oxide semiconductor having a composition of ≦Ga, it is possible to further improve the field effect mobility and reliability of the transistor.

Further, oxide semiconductors having different crystallinity may be used for the first oxide semiconductor film to the third oxide semiconductor film. That is, a structure may be used in which a single crystal oxide semiconductor, a polycrystalline oxide semiconductor, a microcrystalline oxide semiconductor, an amorphous oxide semiconductor, or a CAAC-OS is combined as appropriate. Furthermore, when an amorphous oxide semiconductor is applied to either the first oxide semiconductor film or the second oxide semiconductor film, the internal stress and external stress of the oxide semiconductor film are alleviated, and the transistor Characteristic variations are reduced, and the reliability of the transistor can be further improved.

The thickness of the oxide semiconductor film is 1 nm or more and 100 nm or less, more preferably 1 nm or more and 30 nm or more.
nm or less, more preferably 1 nm or more and 50 nm or less, even more preferably 3 nm or more and 20 nm
The following is preferable.

In the oxide semiconductor film used for the semiconductor layer 108, secondary ion mass spectrometry (SIMS:
It is desirable that the concentration of the alkali metal or alkaline earth metal obtained by secondary ion mass spectrometry is 1×10 ¹⁸ atoms/cm ³ or less, more preferably 2×10 ¹⁶ atoms/cm ³ or less. Alkali metals and alkaline earth metals may generate carriers when combined with oxide semiconductors,
This is because it causes an increase in the off-state current of the transistor.

Further, in the oxide semiconductor film used for the semiconductor layer 108, the hydrogen concentration obtained by secondary ion mass spectrometry is less than 5×10 ¹⁸ atoms/cm ³ , preferably 1×10 ¹⁸ a
toms/cm ³ or less, more preferably 5×10 ¹⁷ atoms/cm ³ or less, still more preferably 1×10 ¹⁶ atoms/cm ³ or less.

Hydrogen contained in the oxide semiconductor film reacts with oxygen bonded to metal atoms to become water, and defects are formed in the lattice where oxygen is eliminated (or in the portion where oxygen is eliminated). Furthermore, when a portion of hydrogen combines with oxygen, electrons, which are carriers, are generated. For these reasons, the hydrogen concentration of the oxide semiconductor film can be reduced by significantly reducing impurities containing hydrogen in the step of forming the oxide semiconductor film. Therefore, by using an oxide semiconductor film from which hydrogen has been removed as much as possible as a channel region, a negative shift in the threshold voltage can be suppressed, and variations in electrical characteristics can be reduced. Further, leakage current, typically off-state current, at the source and drain of the transistor can be reduced.

Further, the nitrogen concentration of the oxide semiconductor film used for the semiconductor layer 108 was set to 5×10 ¹⁸ atoms/
By setting the thickness to cm ³ or less, it is possible to suppress a negative shift in the threshold voltage of the transistor, and it is also possible to reduce variations in electrical characteristics.

Note that it can be proven through various experiments that a transistor whose channel region is made of an oxide semiconductor film that has been made highly purified by removing as much hydrogen as possible has a low off-state current. For example, even if the transistor has a channel width of 1×10 ⁶ μm and a channel length of 10 μm, the off-state current will be A characteristic of below the measurement limit, that is, below 1×10 ⁻¹³ A can be obtained. In this case, it can be seen that the off-state current, which corresponds to the value obtained by dividing the off-state current by the channel width of the transistor, is 100 zA/μm or less. In addition, off-state current was measured using a circuit in which a capacitive element and a transistor are connected and the transistor controls charge flowing into or flowing out from the capacitive element. In this measurement, a highly purified oxide semiconductor film was used in the channel region of the transistor, and the off-state current of the transistor was measured from the change in the amount of charge per unit time of the capacitive element. As a result, it was found that when the voltage between the source electrode and drain electrode of the transistor is 3V, an even lower off-state current of several tens of yA/μm can be obtained. Therefore, a transistor using a highly purified oxide semiconductor film in a channel region has extremely low off-state current.

As the source electrode 110 and the drain electrode 112, aluminum, aluminum,
A single metal such as titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or an alloy mainly composed of these metals is used in a single layer structure or a laminated structure. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a titanium film is laminated on a tungsten film, and a copper film on a copper-magnesium-aluminum alloy film. A two-layer structure in which a titanium film or a titanium nitride film is laminated, a three-layer structure in which an aluminum film or a copper film is laminated on top of the titanium film or titanium nitride film, and then a titanium film or a titanium nitride film is formed on top of that. There is a three-layer structure in which a molybdenum film or a molybdenum nitride film, an aluminum film or a copper film are stacked over the molybdenum film or molybdenum nitride film, and a molybdenum film or a molybdenum nitride film is further formed thereon. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

Note that in this embodiment, the source electrode 110 and the drain electrode 112 are connected to the semiconductor layer 108.
Although it is provided above, it may be provided between the gate insulating film 106 and the semiconductor layer 108.

As the first interlayer insulating film 114, an oxide insulating film is preferably used in order to improve the interface characteristics with the oxide semiconductor film used as the semiconductor layer 108. First interlayer insulating film 11
As the film 4, a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, a hafnium oxide film, a gallium oxide film, a Ga--Zn metal oxide film, or the like having a thickness of 150 nm or more and 400 nm or less can be used. Further, the first interlayer insulating film 114 may have a stacked structure of an oxide insulating film and a nitride insulating film. For example, the first interlayer insulating film 114 can have a stacked structure of a silicon oxynitride film and a silicon nitride film.

As the second interlayer insulating film 116, a heat-resistant organic insulating material such as acrylic resin, polyimide resin, benzocyclobutene resin, polyamide resin, or epoxy resin can be used. By stacking multiple insulating films made of these materials,
A second interlayer insulating film 116 may also be formed. By using the second interlayer insulating film 116, it is possible to flatten the unevenness of the first transistor 101 and the like.

The capacitor electrode 118 is made of indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, or indium tin oxide (hereinafter referred to as ITO). ), indium zinc oxide, indium tin oxide added with silicon oxide, and the like can be used.

As the third interlayer insulating film 120, an inorganic insulating material such as a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, or an aluminum oxide film can be used. In particular, the third interlayer insulating film 120 is preferably one selected from a silicon nitride film, a silicon nitride oxide film, and an aluminum oxide film. silicon nitride film,
By using one selected from a silicon nitride oxide film and an aluminum oxide film as the third interlayer insulating film 120, release of hydrogen and moisture from the second interlayer insulating film 116 can be suppressed. .

As the pixel electrode 122, a material similar to that shown for the capacitor electrode 118 can be used. Although the same material or different materials may be used for the capacitor electrode 118 and the pixel electrode 122, it is preferable to use the same material because manufacturing costs can be reduced.

As the first alignment film 124 and the second alignment film 164, heat-resistant organic materials such as acrylic resin, polyimide resin, benzocyclobutene resin, polyamide resin, and epoxy resin can be used. can.

As the liquid crystal layer 162, liquid crystal materials such as thermotropic liquid crystal, low molecular liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, etc. depending on the conditions.

In addition, when adopting the transverse electric field method, alignment films (the first alignment film 124 and the second alignment film 16
A liquid crystal exhibiting a blue phase that does not use 4) may also be used. The blue phase is one of the liquid crystal phases, and is a phase that appears just before the cholesteric phase transitions to the isotropic phase when the cholesteric liquid crystal is heated. Since a blue phase occurs only in a narrow temperature range, a liquid crystal composition containing several weight percent or more of a chiral agent is used in the liquid crystal layer in order to improve the temperature range. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a short response speed, is optically isotropic, requires no alignment treatment, and has small viewing angle dependence. Furthermore, since there is no need to provide an alignment film, there is no need for a rubbing process, so it is possible to prevent electrostatic damage caused by the rubbing process, and reduce defects and damage to the liquid crystal display device during the manufacturing process. . Therefore, it becomes possible to improve the productivity of the liquid crystal display device. In a transistor using an oxide semiconductor film, the electrical characteristics of the transistor may vary significantly due to the influence of static electricity, and there is a possibility that the transistor may deviate from a design range. Therefore, it is more effective to use a blue phase liquid crystal material in a liquid crystal display device having a transistor using an oxide semiconductor film.

Further, the specific resistance of the liquid crystal material is 1×10 ⁹ Ω·cm or more, preferably 1×10 ¹
It is ¹ Ω·cm or more, more preferably 1×10 ¹² Ω·cm or more. Note that the value of specific resistance in this specification is a value measured at 20°C.

The size of the storage capacitor provided in the display device is set so as to be able to hold charge for a predetermined period, taking into account leakage current of transistors arranged in the pixel region. The size of the storage capacitor may be set in consideration of the off-state current of the transistor and the like. By using a transistor having an oxide semiconductor layer with high purity and suppressing the formation of oxygen vacancies, when a liquid crystal element is used as a display element, for example, the liquid crystal capacity of each pixel is reduced to 1/3 or less, preferably 1/3 It is sufficient to provide a holding capacitor having a capacitance of /5 or less.

Further, the transistor used in this embodiment in which a highly purified oxide semiconductor with suppressed formation of oxygen vacancies is used for a semiconductor layer can have a low current value in an off state (off-state current value). Therefore, the holding time of electrical signals such as image signals can be increased, and the writing interval can also be set longer in the power-on state. Therefore, the frequency of refresh operations can be reduced, which has the effect of suppressing power consumption.

Further, in the display device shown in FIGS. 1 and 2, the drive mode of the liquid crystal element 150 is as follows.
TN (Twisted Nematic) mode, IPS (In-Plane-Swit)
switching) mode, FFS (Fringe Field Switching) mode, ASM (Axially Symmetrically aligned Micro-cel)
l) Mode, OCB (Optically Compensated Birefringe)
nce) mode, FLC (Ferroelectric Liquid Crystal
) mode, AFLC (AntiFerroelectric Liquid Crystal
al) mode etc. can be used. In particular, it is preferable to use the FFS mode to obtain a high viewing angle.

Alternatively, a normally black liquid crystal display device, for example a transmissive liquid crystal display device employing a vertical alignment (VA) mode, may be used. There are several vertical alignment modes, but
For example, MVA (Multi-Domain Vertical Alignment)
mode, PVA (Patterned Vertical Alignment) mode, etc. can be used. Also, pixels (pixels) can be divided into some areas (sub-pixels)
A method called multi-domain design or multi-domain design, in which the molecules are divided into two and tilted in different directions, may be used.

Although not shown in FIGS. 1 and 2, optical members (optical substrates) such as polarizing members, retardation members, and antireflection members may be provided as appropriate. For example, circularly polarized light using a polarizing substrate and a retardation substrate may be used. Further, a backlight, a sidelight, or the like may be used as a light source.

Further, as the display method in the pixel area 142, a progressive method, an interlace method, or the like can be used. In addition, the color element controlled by pixels when displaying in color is R.
It is not limited to the three colors GB (R represents red, G represents green, and B represents blue). For example, there is RGBW (W represents white), or RGB with one or more colors such as yellow, cyan, and magenta added. Note that the size of the display area may be different for each color element dot. However, the disclosed invention is not limited to color display devices, but can also be applied to monochrome display devices.

Further, a spacer 160 is formed below the second substrate 152, and a spacer 160 is formed below the second substrate 152.
02 and the second substrate 152 (also referred to as a cell gap). Note that the thickness of the liquid crystal layer 162 is determined by the cell gap. In addition, spacer 1
As the spacer 60, a spacer of any shape, such as a columnar spacer obtained by selectively etching an insulating film or a spherical spacer, may be used.

Furthermore, the colored film 153 functions as a so-called color filter. As the colored film 153,
Any material that is transparent to light in a specific wavelength range may be used, and an organic resin film containing dye or pigment may be used.

Further, the light shielding film 154 functions as a so-called black matrix. The light shielding film 154 only needs to be able to shield emitted light between adjacent pixels, and a metal film, an organic resin film containing black dye or black pigment, or the like can be used. Note that in this embodiment, the light shielding film 154 is made of an organic resin film containing a black pigment.

Further, the organic protective insulating film 156 is provided so that the ionic substance contained in the colored film 153 does not diffuse into the liquid crystal layer 162. However, the organic protective insulating film 156 is not limited to this configuration, and may not be provided.

Further, as the sealing material 166, a thermosetting resin, an ultraviolet curing resin, or the like can be used. Note that in the sealing area of the sealant 166 shown in FIG. 2, the first substrate 10
2 and the second substrate 152, a gate insulating film 106, a source electrode 110, and a drain electrode 1
Although a configuration in which an electrode 113, a first interlayer insulating film 114, and a second interlayer insulating film 116 formed in the same process as 12 is provided has been exemplified, the structure is not limited to this. For example, the structure may include only the gate insulating film 106 and the first interlayer insulating film 114. Note that removing the second interlayer insulating film 116 prevents moisture from entering from the outside, so as shown in FIG. 2, part of the second interlayer insulating film 116 is removed or partially retreated. Structure is preferred.

As described above, the display device described in this embodiment includes a transistor formed in each of a pixel region and a driver circuit region, a first interlayer insulating film formed over the transistor, and a first interlayer insulating film formed over the transistor. a second interlayer insulating film formed on the top, and a third interlayer insulating film formed on the second interlayer insulating film; The end portion of the third interlayer insulating film is formed inside the drive circuit region. With such a configuration, outgassing from the second interlayer insulating film can be suppressed from entering the transistor side, and a highly reliable display device can be obtained. Furthermore, the first interlayer insulating film can suppress outgas from the second interlayer insulating film from entering the transistor side.

The structure shown in this embodiment can be used in combination with the structure shown in other embodiments or examples as appropriate.

(Embodiment 2)
In this embodiment, a display device using an organic EL panel will be described as one form of a display device with reference to FIGS. 3 and 4. Note that the same parts as in the configuration shown in Embodiment 1 are given the same reference numerals, and detailed explanation thereof will be omitted.

As one form of the display device, a top view of the display device is shown in FIG. 3, and a cross-sectional view of the display device is shown in FIG. 4, respectively. Note that FIG. 4 corresponds to a cross-sectional view taken along the line X2-Y2 in FIG.

In the display device shown in FIG. 3, a pixel region 142 provided on the first substrate 102 and a gate driver circuit section that is adjacent to the outside of the pixel region 142 and is a drive circuit region that supplies signals to the pixel region 142. A sealing material 166 is provided to surround the source driver circuit section 140 and the source driver circuit section 144, and is sealed by the second substrate 152. Further, a second substrate 152 is provided so as to face the first substrate 102 on which the pixel region 142, the gate driver circuit section 140, and the source driver circuit section 144 are provided. Therefore, the pixel area 142 and
The gate driver circuit section 140 and the source driver circuit section 144 are sealed together with the display element by the first substrate 102, the sealant 166, and the second substrate 152.

In this way, part or all of the driver circuit including the transistor can be integrally formed over the same first substrate 102 as the pixel region 142, and a system on panel can be formed.

Next, the configurations of the pixel region 142 and the gate driver circuit section 140 will be described in detail below using FIG. 4, which corresponds to a cross-sectional view taken along the line X2-Y2 in FIG. 3.

In the pixel region 142, the first substrate 102, the gate electrode 104 formed on the first substrate 102, the gate insulating film 106 formed on the gate electrode 104, and the gate electrode A semiconductor layer 108 provided at a position overlapping with 104, a gate insulating film 106, and a source electrode 110 and a drain electrode 1 formed on the semiconductor layer 108.
12, the first transistor 101 is formed.

Further, in the pixel region 142, a first interlayer insulating film formed of an inorganic insulating material is formed on the first transistor 101, more specifically, on the gate insulating film 106, the semiconductor layer 108, the source electrode 110, and the drain electrode 112. 114, a second interlayer insulating film 116 formed of an organic insulating material on the first interlayer insulating film 114, and a third interlayer insulating film 116 formed of an inorganic insulating material on the second interlayer insulating film 116. 120, a second interlayer insulating film 116, a partition 126 formed on the third interlayer insulating film 120, a pixel electrode 122 formed on the third interlayer insulating film 120 and the partition 126, and a pixel. A light emitting layer 128 formed on the electrode 122 and a light emitting layer 12
An electrode 130 is formed on top of the electrode 8 .

Note that a light emitting element 170 is formed by the pixel electrode 122, the light emitting layer 128, and the electrode 130.

Further, a filler 172 is provided on the light emitting element 170, more specifically on the electrode 130,
A second substrate 152 is provided on the filler 172. That is, the first substrate 102
It has a structure in which a light emitting element 170 and a filler 172 are sandwiched between the first substrate 152 and the second substrate 152.

Further, in the gate driver circuit section 140, the first substrate 102 and the first substrate 102
the gate electrode 104 formed above and the gate insulating film 10 formed on the gate electrode 104
6, a semiconductor layer 108 provided in a position that is in contact with the gate insulating film 106 and overlaps with the gate electrode 104, and a source electrode 110 formed on the gate insulating film 106 and the semiconductor layer 108.
and the drain electrode 112, a second transistor 103 and a third transistor 105 are formed.

Further, in the gate driver circuit section 140, an inorganic insulating material is formed over the second transistor 103 and the third transistor 105, more specifically, over the gate insulating film 106, the semiconductor layer 108, the source electrode 110, and the drain electrode 112. The first interlayer insulating film 11
4, and a second interlayer insulating film 116 made of an organic insulating material is formed on the first interlayer insulating film 114.

That is, the third interlayer insulating film 120 is provided on a part of the pixel region 142, and the end of the third interlayer insulating film 120 is formed inside the gate driver circuit section 140, which is the drive circuit region. .

With this configuration, moisture taken in from the outside or moisture generated inside the display device, gas such as hydrogen can be released upward from the second interlayer insulating film 116 of the gate driver circuit section 140. . Therefore, gases such as moisture and hydrogen can be prevented from being taken into the first transistor 101, the second transistor 103, and the third transistor 105.

Note that the second interlayer insulating film 116 formed of an organic insulating material is required to be an organic insulating material with high flatness in order to reduce unevenness of the transistors forming the display device. However, when the organic insulating material is heated, it releases hydrogen, moisture, or organic components as gas.

However, in a transistor in which a silicon film, which is a silicon-based semiconductor material, is used for the semiconductor layer 108, for example, the above-mentioned hydrogen, moisture, or organic component gas is unlikely to cause a major problem. However, in one embodiment of the present invention, since an oxide semiconductor film is used for the semiconductor layer 108, gas from the second interlayer insulating film 116 formed using an organic insulating material needs to be appropriately released to the outside. Note that the configuration in which the end portion of the third interlayer insulating film 120 is formed inside the gate driver circuit section 140, which is the drive circuit region, has an excellent effect when the semiconductor layer 108 is formed of an oxide semiconductor film. play. However, the same effect can be obtained in a transistor in which the semiconductor layer 108 is formed using a material other than an oxide semiconductor (for example, amorphous silicon, crystalline silicon, etc., which are silicon-based semiconductor materials).

Further, in this embodiment, the third interlayer insulating film 120 formed on the second interlayer insulating film 116 prevents gas released from the second interlayer insulating film 116 from entering the light emitting element 170 side. It is formed in order to suppress this and/or to improve the adhesion between the pixel electrode 122 and the second interlayer insulating film 116. With such a configuration, it is possible to suppress gases such as hydrogen and moisture from entering the light emitting element 170 side from the second interlayer insulating film 116.

However, when the third interlayer insulating film 120 is formed on the second interlayer insulating film 116 on the second transistor 103 used in the gate driver circuit section 140 and the third transistor 105, the second interlayer insulating film 116 The gas emitted from the organic insulating material used for this cannot be diffused to the outside, but instead enters into the second transistor 103 and the third transistor 105.

When the above gas enters the oxide semiconductor used for the semiconductor layer 108 of the transistor, it is incorporated as an impurity in the oxide semiconductor film, and the characteristics of the transistor using the semiconductor layer 108 change.

However, as shown in FIG. 4, a configuration in which the third interlayer insulating film 120 on the second transistor 103 and the third transistor 105 used in the gate driver circuit section 140 is opened,
That is, the third interlayer insulating film 120 is provided in a part of the pixel region 142, and the end portion of the third interlayer insulating film 120 is formed inside the gate driver circuit section 140. The structure can be such that gas released from the second interlayer insulating film 116 can be diffused to the outside.

Note that, as shown in FIG. 4, also in the first transistor 101 used in the pixel region 142, a third interlayer insulating film 120 formed of an inorganic insulating material at a position where the semiconductor layer 108 overlaps
A configuration in which the is removed is preferable. With this structure, gas released from the second interlayer insulating film 116 formed of an organic insulating material can be prevented from entering the first transistor 101.

Here, a detailed explanation will be given below regarding other components of the display device shown in FIGS. 3 and 4 that are different from the display device shown in Embodiment 1.

The partition wall 126 is formed using an organic insulating material or an inorganic insulating material. In particular, it is preferable to form an opening on the pixel electrode 122 using a photosensitive resin material so that the side wall of the opening forms an inclined surface with a continuous curvature.

As the filler 172, in addition to an inert gas such as nitrogen or argon, ultraviolet curing resin or thermosetting resin can be used, such as PVC (polyvinyl chloride), acrylic resin, polyimide resin, epoxy resin, Silicone resin, PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate) can be used. For example, filler 17
As No. 2, nitrogen may be used.

As the light emitting element 170, a light emitting element that utilizes electroluminescence can be used. Light-emitting devices that utilize electroluminescence are distinguished depending on whether the light-emitting material is an organic compound or an inorganic compound, and the former is generally called an organic EL device and the latter an inorganic EL device. Here, an explanation will be given using an organic EL element.

An organic EL element has a pair of electrodes (pixel electrode 122) by applying a voltage to the light emitting element.
Electrons and holes are injected from the electrodes 130 and 130 into the layer containing the luminescent organic compound, and a current flows. Then, by recombining these carriers (electrons and holes),
A luminescent organic compound forms an excited state and emits light when the excited state returns to the ground state.
Due to this mechanism, such a light emitting element is called a current excitation type light emitting element.

The light emitting element 170 only needs to have one of at least a pair of electrodes (pixel electrode 122 or electrode 130) translucent in order to extract light emission. Then, there is top emission in which light emission is extracted from the surface on the opposite side to the first substrate 102, bottom emission in which light emission is extracted from the surface on the first substrate 102 side, and emission from the first substrate 102 side and the first substrate 102 side. There is a light emitting element with a double-sided emission structure that extracts light from the opposite side, and a light emitting element with any emission structure can be applied.

Further, a protective film may be formed on the electrode 130 and the partition wall 126 to prevent oxygen, hydrogen, moisture, carbon dioxide, etc. from entering the light emitting element 170. As the protective film, a silicon nitride film, a silicon nitride oxide film, or the like can be formed. Further, a filler 172 is provided in the space sealed by the first substrate 102, the second substrate 152, and the sealant 166, and the space is sealed. In order to avoid exposure to the outside air, it is preferable to package (seal) with a protective film (laminated film, ultraviolet curable resin film, etc.) or cover material that has high airtightness and less outgassing.

If necessary, a polarizing plate, a circularly polarizing plate (including an elliptically polarizing plate), a retardation plate (λ/4 plate, λ/2 plate), a color filter, or other optical film may be provided on the emission surface of the light emitting element 170. may be provided as appropriate. Further, an antireflection film may be provided on the polarizing plate or the circularly polarizing plate. For example, it is possible to perform anti-glare treatment that can diffuse reflected light using surface irregularities and reduce reflections.

The light-emitting layer 128 includes a guest material that is a luminescent material that converts triplet excitation energy into light emission, and a host material whose triplet excitation energy level (T1 level) is higher than that of the guest material. It is preferred to use organic compounds. Note that the light-emitting layer 128 may have a structure in which a plurality of light-emitting layers are stacked (so-called tandem structure) or a functional layer other than the light-emitting layer (a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, a charge generation layer). etc.).

In addition to the materials described in Embodiment 1, as the sealing material 166, a material containing a glass material, for example, a glass body formed by melting and solidifying powdered glass (also called frit glass) may be used. . Such materials can effectively suppress the permeation of moisture and gas, so when the light emitting element 170 is used as a display element, deterioration of the light emitting element 170 is suppressed and extremely reliable display can be achieved. The device can be realized.

Further, in the sealing region of the sealant 166 shown in FIG. 4, a configuration in which only the gate insulating film 106 is provided between the first substrate 102 and the second substrate 152 is illustrated, but the present invention is not limited to this. For example, a structure in which the gate insulating film 106 and the first interlayer insulating film 114 are stacked may be used. However, as shown in FIG. 4, a configuration in which a sealing material 166 is disposed in a region where the second interlayer insulating film 116 is removed is preferable.

As described above, the display device described in this embodiment includes a transistor formed in each of a pixel region and a driver circuit region, a first interlayer insulating film formed over the transistor, and a first interlayer insulating film formed over the transistor. a second interlayer insulating film formed on the top, and a third interlayer insulating film formed on the second interlayer insulating film; The end portion of the third interlayer insulating film is formed inside the drive circuit region. With such a configuration, outgassing from the second interlayer insulating film can be suppressed from entering the transistor side, and a highly reliable display device can be obtained. Furthermore, the first interlayer insulating film can suppress outgas from the second interlayer insulating film from entering the transistor side.

The structure shown in this embodiment can be used in combination with the structure shown in other embodiments or examples as appropriate.

(Embodiment 3)
In this embodiment, an image sensor that can be combined with the display device described in the previous embodiment will be described.

FIG. 5A shows an example of a display device with an image sensor. FIG. 5(A) is an equivalent circuit showing one pixel of a display device with an image sensor.

The photodiode element 4002 has one electrode electrically connected to the reset signal line 4058 and the other electrode electrically connected to the gate electrode of the transistor 4040. transistor 404
0, one of the source electrode and the drain electrode is electrically connected to the power supply potential (VDD), and the other of the source electrode and the drain electrode is electrically connected to one of the source electrode and the drain electrode of the transistor 4056. The transistor 4056 has its gate electrode electrically connected to the gate selection line 4057 and the other of its source electrode and drain electrode electrically connected to the output signal line 4071.

The first transistor 4030 is a transistor for pixel switching, and one of the source electrode and the drain electrode is electrically connected to the video signal line 4059, and the other of the source electrode and the drain electrode is electrically connected to the capacitor element 4032 and the liquid crystal element 4034. It is connected. Also,
A gate electrode of the first transistor 4030 is electrically connected to a gate line 4036.

Note that the first transistor 4030, the capacitor 4032, and the liquid crystal element 4034 may have the same structure as the display device described in Embodiment 1.

FIG. 5B is a cross-sectional view showing a part of one pixel of a display device with an image sensor, and a cross-sectional view of a driver circuit portion. A device 4002 and a first transistor 4030 are provided. Further, in the gate driver circuit portion 5040 that is a driver circuit, a second transistor 4060 and a third transistor 4062 are provided over the first substrate 4001.

Note that a first interlayer insulating film 4014, a second interlayer insulating film 4016, and a third interlayer insulating film 4014 are formed on the photodiode element 4002 and the first transistor 4030 in the pixel region 5042.
An interlayer insulating film 4020 is formed. Further, a capacitive element 4032 using a third interlayer insulating film 4020 as a dielectric is formed on the second interlayer insulating film 4016.

That is, the third interlayer insulating film 4020 is provided in a part of the pixel region 5042, and the end portion of the third interlayer insulating film 4020 is formed inside the gate driver circuit section 5040. With such a configuration, a structure can be provided in which gas released from the second interlayer insulating film 4016 can be diffused to the outside. Therefore, the second interlayer insulating film 40
It is possible to suppress outgassing from the transistor 16 from entering the transistor side, thereby providing a highly reliable display device.

Note that the photodiode element 4002 has a pair of lower electrodes formed in the same process as the source and drain electrodes of the first transistor 4030 and upper electrodes formed in the same process as the pixel electrodes of the liquid crystal element 4034. This configuration has two electrodes and a diode between the pair of electrodes.

Diodes that can be used for the photodiode element 4002 include a pn type diode including a stacked layer of a p-type semiconductor film and an n-type semiconductor film, a pin type diode including a stacked layer of a p-type semiconductor film, an i-type semiconductor film, and an n-type semiconductor film. A diode, a Schottky diode, or the like may be used.

Further, on the photodiode element 4002, a first alignment film 4024 and a liquid crystal layer 4096 are formed.
, a second alignment film 4084, a counter electrode 4088, an organic insulating film 4086, a colored film 4085, a second substrate 4052, and the like.

Note that a pin-type diode exhibits higher photoelectric conversion characteristics when the light-receiving surface is on the p-type semiconductor film side. This is because hole mobility is smaller than electron mobility. In this embodiment, a structure is exemplified in which light incident on the photodiode element 4002 from the surface of the second substrate 4052 via the colored film 4085, the liquid crystal layer 4096, etc. is converted into an electrical signal. It is not limited to this. For example, a configuration may be adopted in which the colored film 4085 is not provided.

The photodiode element 4002 shown in this embodiment mode is the photodiode element 400
It takes advantage of the fact that when light is incident on 2, a current flows between a pair of electrodes. By detecting light with the photodiode element 4002, information on the object to be detected can be read.

In the display device with an image sensor described in this embodiment, productivity can be increased by using common processes for the display device and the image sensor, such as manufacturing a transistor.
However, the display device described in the previous embodiment and the image sensor described in this embodiment may be manufactured over different substrates. Specifically, in the display device described in the previous embodiment, an image sensor may be formed over the second substrate.

This embodiment mode can be implemented in appropriate combination with structures described in other embodiment modes or other examples.

(Embodiment 4)
In this embodiment, an example of a tablet terminal using a display device of one embodiment of the present invention will be described.

6(A) and 6(B) are tablet-type terminals that can be folded into two. FIG. 6(A) is
The tablet device is open. The tablet terminal includes a housing 8630 and a housing 86.
Display section 8631a, display section 8631b, display mode changeover switch 8034, power switch 8035, power saving mode changeover switch 8036, and fastener 80 provided in 30.
33 and an operation switch 8038.

A display device that is one embodiment of the present invention can be applied to the display portion 8631a and the display portion 8631b.

The display portion 8631a can partially or entirely function as a touch panel, and input can be made by touching the displayed operation keys. For example, keyboard buttons may be displayed on the entire surface of the display portion 8631a to function as a touch panel, and the display portion 8631b may be used as a display screen.

Further, like the display portion 8631a, part or all of the display portion 8631b can function as a touch panel.

Further, touch input can be performed simultaneously on the touch panel area of the display portion 8631a and the touch panel area of the display portion 8631b.

Further, the display mode changeover switch 8034 can select switching of display orientation such as portrait display or horizontal display, switching of black and white display or color display, and the like. The power saving mode changeover switch 8036 can optimize the display brightness according to the external light detected by the optical sensor built into the tablet terminal. Note that the tablet terminal may include not only the optical sensor but also other detection devices such as a gyro capable of detecting inclination and an acceleration sensor.

Further, although FIG. 6A shows an example in which the display portion 8631b and the display portion 8631a have the same area, this is not particularly limited. The display portion 8631b and the display portion 8631a may have different areas, and may have different display qualities. For example, one display panel may be capable of displaying higher definition than the other.

FIG. 6(B) shows the tablet terminal in a closed state. The tablet type terminal has a housing 86
30, and a solar cell 8633 and a charge/discharge control circuit 8634 provided in a housing 8630. Note that in FIG. 6(B), the battery 86 is used as an example of the charge/discharge control circuit 8634.
35, a configuration having a DC/DC converter 8636 is shown.

Note that since the tablet terminal can be folded in two, the housing 8630 can be kept in a closed state when not in use. Therefore, since the display portion 8631a and the display portion 8631b can be protected,
It has excellent durability and is highly reliable from a long-term use perspective.

In addition, the tablet terminals shown in Figures 6(A) and 6(B) have the ability to display various information (still images, videos, text images, etc.), a calendar, date or time, etc. It can have a function of displaying on the display section, a touch input function of performing a touch input operation or editing the information displayed on the display section, a function of controlling processing by various software (programs), and the like.

The tablet terminal can use power obtained by the solar cell 8633 to operate the tablet terminal. Alternatively, the power can be stored in battery 8635. Note that the solar cells 8633 can also be provided on two sides of the housing 8630. Note that using a lithium ion battery as the battery 8635 has advantages such as miniaturization.

Further, FIG. 6(C) shows the configuration and operation of the charge/discharge control circuit 8634 shown in FIG. 6(B).
A block diagram is shown and explained below. In FIG. 6(C), a solar cell 8633 and a battery 863 are shown.
5, a DCDC converter 8636, a converter 8637, a switch SW1, a switch SW2, a switch SW3, and a display section 8631. In FIG. 6(C), a battery 8635, a DCDC converter 8636, a converter 8637, a switch SW1, a switch SW2, and a switch SW3 are connected to the charge/discharge control circuit 86 shown in FIG. 6(B).
Corresponds to 34.

When power is generated by the solar cell 8633, the power generated by the solar cell is transferred to the battery 8.
The voltage is stepped up or down by a DC/DC converter 8636 to obtain a voltage for charging 635. Next, the switch SW1 is turned on, and the converter 8637 increases or decreases the voltage to the optimum voltage for the display section 8631. Also, when not displaying on the display section 8631, switch S
Turn off W1 and turn on switch SW2 to charge the battery 8635.

Note that although the solar cell 8633 is shown as an example of a power generation means, it is not particularly limited, and other power generation means such as a piezoelectric element (piezo element) or a thermoelectric conversion element (Peltier element) may be used instead. For example, a configuration may be adopted in which other charging means are used in combination, such as a contactless power transmission module that wirelessly (contactlessly) transmits and receives power for charging.

This embodiment mode can be implemented in appropriate combination with structures described in other embodiment modes or other examples.

(Embodiment 5)
In this embodiment, an example of an electronic device equipped with the display device described in the previous embodiment will be described.

FIG. 7(A) shows a portable information terminal. The portable information terminal shown in FIG. 7(A) has a housing 930.
0, button 9301, microphone 9302, display section 9303, and speaker 93
04 and a camera 9305, and has the function of a mobile phone. Display section 93
The display device shown in the previous embodiment and/or the display device with an image sensor can be applied to 03.

FIG. 7(B) is a display. The display shown in FIG. 7(B) has a housing 9310.
and a display section 9311. The display device described in the previous embodiment and/or the display device with an image sensor can be applied to the display portion 9311.

FIG. 7(C) shows a digital still camera. The digital still camera shown in FIG. 7C includes a housing 9320, a button 9321, a microphone 9322, and a display portion 9323. The display device described in the previous embodiment and/or the display device with an image sensor can be applied to the display portion 9323.

By using one embodiment of the present invention, the reliability of electronic devices can be improved.

This embodiment mode can be implemented in appropriate combination with structures described in other embodiment modes or other examples.

In this example, the gas released from acrylic resin, which is a typical organic resin that can be used in display devices, was investigated.

For the sample, an acrylic resin was applied onto a glass substrate, and heat treatment was performed at 250° C. for 1 hour in a nitrogen gas atmosphere. Note that the acrylic resin was formed to have a thickness of 1.5 μm after heat treatment.

The prepared sample was subjected to TDS (Thermal Desorption Spectrum
The released gas was measured by oscopy (temperature-programmed desorption gas spectroscopy).

FIG. 8 shows the ion intensity of the released gas at each mass-to-charge ratio (also referred to as M/z) when the substrate surface temperature is 250°C. In FIG. 8, the horizontal axis represents the mass-to-charge ratio, and the vertical axis represents the intensity (in arbitrary units). From Figure 8, the sample had a mass-to-charge ratio of 18 (H
₂ O) gas, and the mass-to-charge ratios, which are thought to be caused by hydrocarbons, are 28 (C ₂ H ₄ ) and 44 (C ₃ H 4 ).
₈ ) and 56 (C ₄ H ₈ ) gases were detected. Note that each fragment ion was detected near each mass-to-charge ratio.

Similarly, FIG. 9 shows each mass-to-charge ratio (18, 28, 44, and 56) with respect to the substrate surface temperature.
indicates the ionic strength of In FIG. 9, the horizontal axis represents the substrate surface temperature (° C.), and the vertical axis represents the intensity (arbitrary unit). When the substrate surface temperature was set in the range of 55°C to 270°C, it was found that the ion intensity with a mass-to-charge ratio of 18, which is thought to be caused by water, has peaks at 55°C to 100°C and 150°C to 270°C. Ta. On the other hand, it was found that the ion intensities of mass-to-charge ratios of 28, 44, and 56, which are considered to be caused by hydrocarbons, have a peak at 150° C. or higher and 270° C. or lower.

As shown above, it has been found that impurities for the oxide semiconductor film, such as water and hydrocarbons, are released from the organic resin. In particular, it has been found that water is released even at relatively low temperatures of 55°C or higher and 100°C or lower. That is, it has been suggested that when impurities originating from the organic resin reach the oxide semiconductor film, the electrical characteristics of the transistor deteriorate.

In addition, when an organic resin is covered with a film that does not transmit released gases such as water and hydrocarbons (silicon nitride film, silicon nitride oxide film, aluminum oxide film, etc.), gases are released from the organic resin, causing water and carbonization. It was suggested that the pressure on the film that does not transmit released gases such as hydrogen increases, and the film that does not transmit released gases such as water and hydrocarbons eventually breaks down, resulting in defective transistor shapes.

In this example, a transistor was manufactured and its cross-sectional shape and electrical characteristics were evaluated.

Each sample is provided with a transistor using an oxide semiconductor film with a bottom-gate/top-contact channel-etched structure. The transistor includes a gate electrode provided on a glass substrate, a gate insulating film provided on the gate electrode, an oxide semiconductor film provided on the gate electrode via the gate insulating film, and a gate electrode provided on the oxide semiconductor film. and a pair of electrodes provided in contact with the oxide semiconductor film. Here, the gate electrode is a tungsten film, the gate insulating film is a silicon nitride film and a silicon oxynitride film on the silicon nitride film, the oxide semiconductor film is an In-Ga-Zn oxide film, and the pair of electrodes is a tungsten film. A film, an aluminum film on a tungsten film, and a titanium film on an aluminum film were used, respectively.

A protective insulating film (a 450 nm thick silicon oxynitride film and a 50 nm thick silicon nitride film provided on the silicon oxynitride film) is provided on the pair of electrodes.

In addition, in the example sample, an acrylic resin was provided with a thickness of 2 μm on the protective insulating film,
A silicon nitride film with a thickness of 200 nm is provided on the acrylic resin so as to expose a part of the side surface of the acrylic resin. In addition, in the comparative example sample, acrylic resin was provided with a thickness of 1.5 μm on the protective insulating film, and 200 nm of acrylic resin was provided on the acrylic resin so as to cover the acrylic resin.
A silicon nitride film is provided with a thickness of m.

Figure 10 shows a TEM transmission electron image of a partially enlarged area of the comparative sample.
Itted Electron: Also called TE image. ) shows the cross-sectional shape. For observation of the cross-sectional shape, "Hitachi ultra-thin film evaluation device HD-2300" manufactured by Hitachi High-Technologies Corporation was used. Note that in FIG. 10, only one of the pair of electrodes is illustrated. When paying attention to the electrode and the protective insulating film provided to cover the electrode shown in FIG. 10, it was found that cracks were generated in the protective insulating film from the stepped portion formed by the electrode. Note that in the observation region, the example sample and the comparative example sample have approximately the same structure, so the cross-sectional shape of the example sample is omitted.

Therefore, the example sample has a structure in which the gas emitted from the acrylic resin escapes to the outside of the example sample, and the comparative example sample has a structure in which the emitted gas from the acrylic resin does not escape to the outside of the comparative example sample.
That is, in the comparative sample, it was found that the gas released from the acrylic resin did not escape to the outside, but reached the transistor through the cracks formed in the protective insulating film.

Next, the electrical characteristics of the transistor of each sample, gate voltage (Vg) - drain current (I
d) Measured properties. The Vg-Id characteristics were measured using a transistor with a channel length of 3 μm and a channel width of 3 μm. Note that in measuring the Vg-Id characteristics, the drain voltage (
Vd) was set to 1V or 10V, and the gate voltage (Vg) was swept from -20V to 15V.

FIG. 11 shows the Vg-Id characteristics of each sample. Note that the Vg-Id characteristics of 20 transistors were measured as evenly as possible on a 600 mm x 720 mm glass substrate. Note that FIG. 11(A) shows the Vg-Id characteristics and field effect mobility of the transistor of the example sample,
FIG. 11B shows the Vg-Id characteristics of the transistor of the comparative sample. Note that FIG. 11(A)
The field effect mobility shown in is the value when the drain voltage (Vd) is 10V. Also, Figure 11
(B) is omitted because it was difficult to calculate the field effect mobility.

From FIG. 11A, it was found that the transistor of the example sample had good switching characteristics. Further, from FIG. 11(B), it was found that the transistor of the comparative example sample did not have switching characteristics and was always on.

Comparison with the Example sample shows that the poor switching characteristics of the Comparative Example sample is due to the effect of gas released from the acrylic resin on the transistor. Specifically, it is presumed that this is because the carrier density in the oxide semiconductor film increased due to the influence of gas released from the acrylic resin, and the transistor could not be turned off by the electric field from the gate electrode.

This example shows that when an organic resin is covered with a film (here, a silicon nitride film with a thickness of 200 nm) that does not transmit emitted gases such as water and hydrocarbons, the emitted gases from the organic resin cause poor switching characteristics of the transistor. I know that it will happen. In addition, water, which covers the organic resin,
It can be seen that by providing a loophole for the released gas to the outside of the sample in a part of the film that does not allow released gases such as hydrocarbons to pass through, poor switching characteristics of the transistor can be avoided and good switching characteristics can be obtained.

101 First transistor 102 First substrate 103 Second transistor 104 Gate electrode 105 Third transistor 106 Gate insulating film 107 Capacitor 108 Semiconductor layer 110 Source electrode 112 Drain electrode 113 Electrode 114 First interlayer insulating film 116 2 interlayer insulating film 118 capacitor electrode 120 third interlayer insulating film 122 pixel electrode 124 first alignment film 126 partition 128 light emitting layer 130 electrode 140 gate driver circuit section 142 pixel region 144 source driver circuit section 146 FPC terminal section 148 FPC
150 Liquid crystal element 152 Second substrate 153 Colored film 154 Light shielding film 156 Organic protective insulating film 158 Counter electrode 160 Spacer 162 Liquid crystal layer 164 Second alignment film 166 Sealing material 170 Light emitting element 172 Filling material 4001 First substrate 4002 Photodiode Element 4014 First interlayer insulating film 4016 Second interlayer insulating film 4020 Third interlayer insulating film 4024 First alignment film 4030 First transistor 4032 Capacitive element 4034 Liquid crystal element 4036 Gate line 4040 Transistor 4052 Second substrate 4056 Transistor 4057 Gate selection line 4058 Reset signal line 4059 Video signal line 4060 Second transistor 4062 Third transistor 4071 Output signal line 4084 Second alignment film 4085 Colored film 4086 Organic insulating film 4088 Counter electrode 4096 Liquid crystal layer 5040 Gate driver circuit Section 5042 Pixel area 8033 Fastener 8034 Switch 8035 Power switch 8036 Switch 8038 Operation switch 8630 Housing 8631 Display section 8631a Display section 8631b Display section 8633 Solar cell 8634 Charge/discharge control circuit 8635 Battery 8636 DCDC converter 8637 Converter 9300 Housing 9301 Button 9302 Microphone 9303 Display section 9304 Speaker 9305 Camera 9310 Housing 9311 Display section 9320 Housing 9321 Button 9322 Microphone 9323 Display section

Claims (1)

a pixel portion having a first transistor ; and a drive circuit portion having a second transistor ;
The pixel section is
a first semiconductor layer;
a first insulating film having a region on the first semiconductor layer ;
a second insulating film having a region on the first insulating film;
a third insulating film having a region on the second insulating film;
a first conductive layer having a region on the third insulating film ,
the first semiconductor layer has a channel formation region of the first transistor;
The first conductive layer has a region functioning as a pixel electrode,
The first insulating film has a region in contact with the first semiconductor layer,
The first insulating film has a region in contact with the third insulating film in an opening provided in the second insulating film,
The drive circuit section includes:
a second semiconductor layer;
the first insulating film having a region on the second semiconductor layer ;
the second insulating film having a region on the first insulating film;
the second semiconductor layer has a channel formation region of the second transistor;
The first insulating film has a region in contact with the second semiconductor layer,
The third insulating film includes an inorganic insulating material,
The third insulating film has a region overlapping with the first semiconductor layer,
In the display device , the third insulating film has a region that does not overlap with the second semiconductor layer .

Images