JP2016128912A - Display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress changes in the electrical characteristics of a display device including transistors in a pixel region and a drive circuit region and improve reliability of the display device.SOLUTION: A display device includes: a first substrate 102 in which a drive circuit region that is located outside and adjacent to a pixel region 142 and includes at least one second transistor 103 which supplies a signal to a first transistor 101 included in each of the pixels in the pixel region, is formed; a second substrate 152 provided to face the first substrate; and a liquid crystal layer held between the first substrate 102 and the second substrate 152, and includes: a first interlayer insulating film formed of an inorganic insulating material over the first transistor 101 and the second transistor 103; a second interlayer insulating film formed of an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film formed of an inorganic insulating material over the second interlayer insulating film. In the display device, the third interlayer insulating film is provided on part of the pixel region 142, and an edge portion of the third interlayer insulating film is formed on an inner side than the driver circuit region.SELECTED DRAWING: Figure 1

Description

The present invention relates to a display device using a liquid crystal panel or a display device using an organic EL panel. The present invention also relates to an electronic device having the display device.

In recent years, display devices using a liquid crystal panel and display devices using an organic EL panel have been actively developed. In this display device, roughly, only a pixel control transistor (pixel transistor) is formed on a substrate and a scanning circuit (driving circuit) is performed on a peripheral IC, and a scanning circuit is formed on the same substrate together with the pixel transistor. It is classified into what to do.

A display device integrated with a drive circuit is more advantageous for narrowing the frame of the display device or reducing the cost of peripheral ICs. However, the transistor used for the driver circuit is required to have higher electric characteristics than the electric characteristics (for example, field effect mobility (μFE) or threshold value) used for the pixel transistor.

A silicon-based semiconductor material is widely known as a semiconductor thin film applicable to a transistor, but an oxide semiconductor has attracted attention as another material. For example, as a semiconductor thin film used for a transistor, indium (In) having an electron carrier concentration of less than 10 ¹⁸ / cm ³
, A transistor using an amorphous oxide containing gallium (Ga) and zinc (Zn) is disclosed (see, for example, Patent Document 1).

A transistor using an oxide semiconductor for a semiconductor layer has a higher field effect mobility than a transistor using amorphous silicon, which is a silicon-based semiconductor material, for a semiconductor layer. And is easier to manufacture than a transistor using polycrystalline silicon as a semiconductor layer.

However, a transistor in which an oxide semiconductor is used for a semiconductor layer has a problem in that carriers are formed when impurities such as hydrogen and moisture enter the oxide semiconductor, and the electrical characteristics of the transistor fluctuate.

In order to solve the above problems, a transistor with improved reliability is disclosed by setting the concentration of hydrogen atoms in an oxide semiconductor film used as a channel formation region of a transistor to less than 1 × 10 ¹⁶ cm ^−3. (For example, Patent Document 2).

JP 2006-165528 A JP 2011-139047 A

As described in Patent Document 2, a transistor using an oxide semiconductor film as a semiconductor layer excludes hydrogen, moisture, and the like from the oxide semiconductor film as much as possible in order to sufficiently maintain its electrical characteristics. This is very important.

Further, in the case where transistors are used for both the pixel region and the driver circuit region of the display device, although depending on the driving method, the transistor used for the driver circuit region has a larger electrical load than the pixel region, the driver circuit The electrical characteristics of the transistor used for the region are important.

In particular, in a display device in which a transistor using an oxide semiconductor film as a semiconductor layer is used in a pixel region and a driver circuit region, deterioration of the transistor used in the driver circuit region becomes a problem in a reliability test under a high-temperature and high-humidity environment. ing. The cause of deterioration of the transistor is that moisture or the like enters the oxide semiconductor film used for the semiconductor layer from the organic insulating film formed over the transistor, and the carrier density of the oxide semiconductor film increases.

In view of the above, an object of one embodiment of the present invention is to suppress a change in electrical characteristics and improve reliability in a display device including transistors in a pixel region and a driver circuit region. In particular, in a display device using an oxide semiconductor film in a channel formation region of a transistor, entry of hydrogen and moisture into the oxide semiconductor film is suppressed, electric characteristics are prevented from changing, and reliability is improved. Is one of the issues.

In view of the above problems, according to one embodiment of the present invention, a display device including a transistor used for a pixel region and a driver circuit region can have a structure in which variation in electrical characteristics of the transistor can be suppressed. More specifically, an oxide semiconductor film is used for a channel formation region of a transistor, and a structure of a planarization film formed using an organic insulating material provided over the transistor is characterized. Hydrogen and moisture are oxides. The semiconductor film, particularly an oxide semiconductor film used for a driver circuit region, has a structure that does not easily enter. More specifically, it is as follows.

According to one embodiment of the present invention, a pixel region including a pixel electrode and a plurality of pixels including at least one first transistor that is electrically connected to the pixel electrode are adjacent to the outside of the pixel region. A first substrate on which a drive circuit region including at least one second transistor for supplying a signal to a first transistor included in each pixel of the pixel region is formed, and so as to face the first substrate And a liquid crystal layer sandwiched between the first substrate and the second substrate, and formed of an inorganic insulating material over the first transistor and the second transistor. A first interlayer insulating film; a second interlayer insulating film formed of an organic insulating material on the first interlayer insulating film; and a third interlayer formed of an inorganic insulating material on the second interlayer insulating film An insulating film, and a third
The interlayer insulating film is provided in a part on the pixel region, and an end portion of the third interlayer insulating film is formed inside the driver circuit region.

In the above structure, the first alignment film provided on the pixel electrode, the liquid crystal layer formed on the first alignment film, the second alignment film provided on the liquid crystal layer, and the second alignment film A counter electrode provided on the film; an organic protective insulating film provided on the counter electrode; a colored film and a light shielding film provided on the organic protective insulating film; and a first film provided on the colored film and the light shielding film. 2 substrates.

Another embodiment of the present invention is a pixel region, a pixel region in which a plurality of pixels including at least one first transistor electrically connected to the pixel electrode are arranged, and an outside of the pixel region A first substrate on which a drive circuit region including at least one second transistor for supplying a signal to a first transistor included in each pixel of the pixel region is formed, and a first substrate And a light emitting layer sandwiched between the first substrate and the second substrate, and an inorganic insulating material on the first transistor and the second transistor Formed on the first interlayer insulating film, a second interlayer insulating film formed of an organic insulating material on the first interlayer insulating film, and an inorganic insulating material formed on the second interlayer insulating film. A third interlayer insulating film, and the third interlayer insulating film Provided on a part of the region, the end portion of the interlayer insulating film of the third is a display device characterized in that it is formed inside the driver circuit region.

In the above configuration, a light emitting layer provided on the pixel electrode, an electrode provided on the light emitting layer,
You may have.

In each of the above structures, the third interlayer insulating film is preferably any one selected from a silicon nitride film, a silicon nitride oxide film, and an aluminum oxide film.

In each of the above structures, the first transistor and the second transistor preferably have an oxide semiconductor as a semiconductor material forming a channel formation region. The first transistor and the second transistor each include a gate electrode, a semiconductor layer made of an oxide semiconductor formed over the gate electrode, and a source electrode and a drain electrode formed over the semiconductor layer. Is preferable.

Further, one embodiment of the present invention includes, in its category, an electronic device including the display device having any of the above structures.

In a display device including a transistor in a pixel region and a driver circuit region, variation in electrical characteristics can be suppressed and reliability can be improved. In particular, in a display device using an oxide semiconductor film in a channel formation region of a transistor, entry of hydrogen and moisture into the oxide semiconductor film is suppressed, electric characteristics are prevented from changing, and reliability is improved. Can do.

6A and 6B illustrate an upper surface of one embodiment of a display device. FIG. 10 illustrates a cross section of one embodiment of a display device. 6A and 6B illustrate an upper surface of one embodiment of a display device. FIG. 10 illustrates a cross section of one embodiment of a display device. 4A and 4B are a circuit diagram and a cross-sectional view illustrating an example of a display device with an image sensor according to one embodiment of the present invention. FIG. 6 illustrates an example of a tablet terminal according to one embodiment of the present invention. 4A and 4B each illustrate an example of an electronic device according to one embodiment of the present invention. The figure which shows the ionic strength of the discharge | release gas in each mass to charge ratio. The figure which shows the ionic strength of each mass charge ratio with respect to a substrate surface temperature. Cross-sectional observation image of sample. The figure which shows the electrical property of each sample.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be easily understood by those skilled in the art that modes and details can be variously changed. In addition, the present invention is not construed as being limited to the description of the embodiments below.

In the embodiments described below, the same reference numerals are used in common in different drawings. Note that components shown in the drawings, that is, thickness widths and relative positional relationships of layers and regions are exaggerated for the sake of clarity in the description of the embodiments.

Further, in this specification and the like, the terms “electrode” and “wiring” do not functionally limit these components. For example, an “electrode” may be used as part of a “wiring” and vice versa. Furthermore, the terms “electrode” and “wiring” are used to refer to multiple “electrodes” and “
This includes the case where “wiring” is integrally formed.

In this specification and the like, a silicon nitride oxide film means nitrogen, oxygen, silicon,
As a component, and the content of nitrogen is greater than the content of oxygen. A silicon oxynitride film is a film that contains oxygen, nitrogen, and silicon as components and has a larger oxygen content than a nitrogen content.

In addition, the functions of “source” and “drain” may be switched when transistors having different polarities are employed or when the direction of current changes in circuit operation. Therefore, in this specification and the like, the terms “source” and “drain” can be used interchangeably.

(Embodiment 1)
In this embodiment, a display device using a liquid crystal panel is described as an embodiment of the display device with reference to FIGS.

1A, 1B, and 1C are top views of a display device as one mode of the display device. 1A shows the entire display device, and FIG. 1B shows a part of a driver circuit portion of the display device.
FIG. 1C is a top view of part of the pixel region. FIG. 2 corresponds to a cross-sectional view taken along line X1-Y1 in FIG.

In the display device illustrated in FIG. 1A, the pixel region 142 provided over the first substrate 102.
A sealant 166 is provided so as to surround the gate driver circuit portion 140 and the source driver circuit portion 144 which are adjacent to the outside of the pixel region 142 and supply a signal to the pixel region 142 and which are a driver circuit region. The substrate 152 is sealed. In addition, the pixel region 1
42 and a first gate driver circuit unit 140 and a source driver circuit unit 144 are provided.
A second substrate 152 is provided so as to face the substrate 102. Therefore, the pixel region 14
2, the gate driver circuit unit 140, and the source driver circuit unit 144 are connected to the first substrate 1.
02, the sealing material 166, and the second substrate 152 are sealed together with the display element.

In FIG. 1A, the pixel region 142, the gate driver circuit portion 140, and the source driver circuit portion 144 are electrically connected to a region different from the region surrounded by the sealant 166 on the first substrate 102. FPC terminal portion 146 (FPC: Flexib connected to the
le printed circuit), and the FPC terminal portion 146 includes:
The FPC 148 is connected, and various signals and potentials supplied to the pixel region 142, the gate driver circuit portion 140, and the source driver circuit portion 144 are supplied by the FPC 148.

1A illustrates an example in which the gate driver circuit portion 140 and the source driver circuit portion 144 are formed over the same first substrate 102 as the pixel region 142; however, the present invention is not limited to this structure. For example, only the gate driver circuit portion 140 is formed on the first substrate 102, and a substrate on which a separately prepared source driver circuit is formed (for example, a single crystal semiconductor film,
A structure in which a driver circuit substrate formed using a polycrystalline semiconductor film) is mounted on the first substrate 102 may be employed.

1A illustrates a structure in which two gate driver circuit portions 140 are arranged on both sides of the pixel region 142, the invention is not limited to this structure. For example, the gate driver circuit unit 140 may be arranged only on one side of the pixel region 142.

Note that the connection method of the separately formed drive circuit board is not particularly limited.
(Chip On Glass) method, wire bonding method, or TAB (Tap)
e Automated Bonding) method or the like can be used. In addition, a display device includes a panel in which a display element is sealed, and an IC including a controller in the panel.
Etc., and the module in a state where it is mounted.

In this manner, part or the whole of the driver circuit including the transistor can be formed over the first substrate 102 that is the same as the pixel region 142 to form a system-on-panel.

In FIG. 1C, the first transistor 101 and the capacitor 107 are formed in the pixel region 142. In the first transistor 101, the gate electrode 104, the source electrode 110, and the drain electrode 112 are electrically connected to the semiconductor layer 108. Although not shown in the plan view in FIG. 1C, a first interlayer insulating film formed of an inorganic insulating material and a first interlayer insulating film are formed over the first transistor 101. A second interlayer insulating film formed of an organic insulating material and a third interlayer insulating film formed of an inorganic insulating material are formed on the second interlayer insulating film. In addition, the capacitor element 107 includes the capacitor electrode 11.
8, a third interlayer insulating film formed on the capacitor electrode 118, and a pixel electrode 122 formed on the third interlayer insulating film.

In FIG. 1B, the second transistor 103 and the third transistor 105 are formed in the gate driver circuit portion 140 which is a driver circuit region. In addition, each transistor of the gate driver circuit unit 140 has a gate electrode 10 with respect to the semiconductor layer 108.
4, the source electrode 110 and the drain electrode 112 are electrically connected to each other.
In the gate driver circuit portion 140, the gate line including the gate electrode 104 extends in the left-right direction, the source line including the source electrode 110 extends in the vertical direction, and the drain electrode 11
A drain line including 2 extends in the vertical direction away from the source electrode.

The gate driver circuit portion 140 including the second transistor 103 and the third transistor 105 can supply a signal to the first transistor 101 included in each pixel of the pixel region 142.

In addition, the second transistor 103 and the third transistor 105 in the gate driver circuit portion 140 require a relatively high voltage in order to perform control of various signals, boosting, and the like. Specifically, a voltage of about 10V to 30V is required. On the other hand, the first transistor 101 in the pixel region 142 is only used for pixel switching, and can be driven with a voltage of about several V to 20 V. Therefore, the gate driver circuit unit 1
40, the second transistor 103 and the third transistor 105 in the pixel region 1
Compared with the first transistor 101 in 42, the applied stress is very large.

In order to describe the configuration of the display device shown in FIGS. 1A, 1B, and 1C more specifically, FIG.
The structures of the gate driver circuit portion 140 and the pixel region 142 will be described below with reference to FIG. 2 corresponding to the cross-sectional view of X1-Y1 in (A), (B), and (C).

In the pixel region 142, the first substrate 102, the gate electrode 104 formed on the first substrate 102, the gate insulating film 106 formed on the gate electrode 104, and the gate insulating film 106 are in contact with the gate electrode. 104, the semiconductor layer 108 provided at a position overlapping with the gate 104, the gate insulating film 106, and the source electrode 110 and the drain electrode 1 formed on the semiconductor layer 108.
Thus, the first transistor 101 is formed.

In the pixel region 142, the first interlayer insulating film 114 formed of an inorganic insulating material over the first transistor 101, more specifically, over the gate insulating film 106, the semiconductor layer 108, the source electrode 110, and the drain electrode 112. A second interlayer insulating film 116 formed of an organic insulating material on the first interlayer insulating film 114, a capacitor electrode 118 formed on the second interlayer insulating film 116, and a second interlayer insulating film 116 and a capacitor electrode 118, a third interlayer insulating film 120 formed of an inorganic insulating material, a pixel electrode 122 formed on the third interlayer insulating film 120,
have.

Note that the capacitor 107 is formed by the capacitor electrode 118, the third interlayer insulating film 120, and the pixel electrode 122. The capacitor electrode 118, the third interlayer insulating film 120, and the pixel electrode 122 are each formed of a material having a light-transmitting property with respect to visible light, thereby ensuring a large capacitance without impairing the aperture ratio of the pixel region. This is preferable.

Further, over the pixel electrode 122, a first alignment film 124, a liquid crystal layer 162 provided on the first alignment film 124, a second alignment film 164 provided on the liquid crystal layer 162, The counter electrode 158 provided on the second alignment film 164, the organic protective insulating film 156 provided on the counter electrode 158, the colored film 153 and the light shielding film 154 provided on the organic protective insulating film 156, A second substrate 152 provided over the film 153 and the light-blocking film 154.

The pixel electrode 122, the first alignment film 124, the liquid crystal layer 162, and the second alignment film 16
4 and the counter electrode 158 form a liquid crystal element 150 which is a display element.

In the gate driver circuit portion 140, the first substrate 102, the gate electrode 104 formed on the first substrate 102, the gate insulating film 106 formed on the gate electrode 104,
Semiconductor layer 10 provided in contact with gate insulating film 106 and overlapping with gate electrode 104
8, the gate insulating film 106, and the source electrode 110 and the drain electrode 112 formed over the semiconductor layer 108, the second transistor 103 and the third transistor 10.
5 is formed.

In the gate driver circuit portion 140, the first transistor formed on the second transistor 103 and the third transistor 105, more specifically on the gate insulating film 106, the semiconductor layer 108, the source electrode 110, and the drain electrode 112. Interlayer insulating film 114 and second interlayer insulating film 116 formed on first interlayer insulating film 114 are formed.

In other words, the third interlayer insulating film 120 is provided in a part on the pixel region 142, and an end portion of the third interlayer insulating film 120 is formed inside the gate driver circuit unit 140 that is a driving circuit region. .

With such a structure, moisture taken in from the outside or moisture, hydrogen, or other gas generated inside the display device can be released upward from the second interlayer insulating film 116 of the gate driver circuit portion 140. . Accordingly, it is possible to suppress gas such as moisture and hydrogen from being taken into the first transistor 101, the second transistor 103, and the third transistor 105.

Note that the second interlayer insulating film 116 formed of an organic insulating material requires a highly flat organic insulating material in order to reduce unevenness of a transistor included in the display device. This is because the image quality of the display device can be improved by reducing the unevenness of the transistor. However, the organic insulating material releases hydrogen, moisture, or an organic component as a gas by heating or the like.

However, in a transistor using, for example, a silicon film that is a silicon-based semiconductor material as the semiconductor layer 108, the above-described hydrogen, moisture, or organic component gas is unlikely to be a serious problem. However, in one embodiment of the present invention, since an oxide semiconductor film is used for the semiconductor layer 108, it is necessary to suitably release gas from the second interlayer insulating film 116 formed using an organic insulating material to the outside. Note that the structure in which the end portion of the third interlayer insulating film 120 is formed on the inner side of the gate driver circuit portion 140 which is a driver circuit region is excellent in the case where the semiconductor layer 108 is formed using an oxide semiconductor film. Play. Note that a similar effect can be obtained also in a transistor in which the semiconductor layer 108 is formed using a material other than an oxide semiconductor (eg, amorphous silicon or crystalline silicon which is a silicon-based semiconductor material).

In the present embodiment, the third interlayer insulating film 120 formed of an inorganic insulating material formed over the second interlayer insulating film 116 formed of an organic insulating material is a dielectric of the capacitor 107. Used as In addition, the third interlayer insulating film 120 formed of an inorganic insulating material can suppress hydrogen, moisture, and the like that enter the second interlayer insulating film 116 from the outside.

However, when the third interlayer insulating film 120 is formed on the second transistor 103 used in the gate driver circuit portion 140 and the second interlayer insulating film 116 on the third transistor 105, the second interlayer insulating film 116 is formed. The gas released from the organic insulating material to be used cannot be diffused to the outside, and enters the second transistor 103 and the third transistor 105.

When the gas released from the organic insulating material described above enters the oxide semiconductor used for the semiconductor layer 108 of the transistor, it is taken in as an impurity in the oxide semiconductor film, and the semiconductor layer 1
The characteristics of the transistor using 08 will fluctuate.

However, as shown in FIG. 2, the second transistor 103 used in the gate driver circuit unit 140 and the third interlayer insulating film 120 on the third transistor 105 are opened,
That is, the third interlayer insulating film 120 is provided in a part of the pixel region 142, and the end of the third interlayer insulating film 120 is formed inside the gate driver circuit portion 140. A structure in which the gas released from the two interlayer insulating films 116 can be diffused to the outside can be obtained.

As shown in FIG. 2, also in the first transistor 101 used for the pixel region 142, the third interlayer insulating film 120 formed of an inorganic insulating material at a position where the semiconductor layer 108 overlaps.
A configuration in which is removed is preferable. With such a structure, gas released from the second interlayer insulating film 116 formed of an organic insulating material can be prevented from entering the first transistor 101.

Here, other components of the display device shown in FIGS. 1 and 2 will be described in detail below.

As the first substrate 102 and the second substrate 152, a glass material such as aluminosilicate glass, aluminoborosilicate glass, or barium borosilicate glass is used. In mass production, the first substrate 102 and the second substrate 152 have the eighth generation (2160 mm × 2460 m).
m), 9th generation (2400 mm × 2800 mm, or 2450 mm × 3050 mm),
It is preferable to use a mother glass of 10th generation (2950 mm × 3400 mm) or the like.
Since the mother glass has a high processing temperature and contracts significantly when the processing time is long, when mass production is performed using the mother glass, the heat treatment in the manufacturing process is preferably 600 ° C. or less, more preferably 450 ° C. or less. Further, it is desirable that the temperature is 350 ° C. or lower.

Note that a base insulating film may be provided between the first substrate 102 and the gate electrode 104. Examples of the base insulating film include a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a silicon nitride oxide film, a gallium oxide film, a hafnium oxide film, an yttrium oxide film, an aluminum oxide film, and an aluminum oxynitride film. Note that as the base insulating film, a silicon nitride film, a gallium oxide film, a hafnium oxide film, an yttrium oxide film, an aluminum oxide film, or the like is used, so that impurities from the first substrate 102, typically alkali metal, water, hydrogen, Etc. is the semiconductor layer 10
8 can be suppressed.

As the gate electrode 104, a metal element selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten, or an alloy containing the above metal element as a component,
It can be formed using an alloy or the like in which the above metal elements are combined. Alternatively, a metal element selected from one or more of manganese and zirconium may be used. Also,
The gate electrode 104 may have a single-layer structure or a stacked structure including two or more layers. For example, a single layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is stacked on an aluminum film,
A two-layer structure in which a titanium film is laminated on a titanium nitride film, a two-layer structure in which a tungsten film is laminated on a titanium nitride film, a two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film, a titanium film, There is a three-layer structure in which an aluminum film is laminated on the titanium film and a titanium film is further formed thereon. Alternatively, aluminum may be a film of an element selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium, or an alloy film or a nitride film in combination of a plurality of elements.

The gate electrode 104 includes indium tin oxide, indium oxide including tungsten oxide, indium zinc oxide including tungsten oxide, indium oxide including titanium oxide, indium tin oxide including titanium oxide, and indium zinc oxide. Alternatively, a light-transmitting conductive material such as indium tin oxide to which silicon oxide is added can be used. Alternatively, a stacked structure of the above light-transmitting conductive material and the above metal element can be employed.

Further, an In—Ga—Zn-based oxynitride semiconductor film, an In—Sn-based oxynitride semiconductor film, an In—Ga-based oxynitride semiconductor film, an In—Zn film is provided between the gate electrode 104 and the gate insulating film 106.
Oxynitride semiconductor film, Sn oxynitride semiconductor film, In oxynitride semiconductor film, metal nitride film (
InN, ZnN, etc.) may be provided. These films are 5 eV or more, preferably 5.5 eV.
Since it has the above work function and a value larger than the electron affinity of the oxide semiconductor, the threshold voltage of the transistor using the oxide semiconductor can be positively shifted, so-called normally-off switching. An element can be realized. For example, in the case of using an In—Ga—Zn-based oxynitride semiconductor film, at least a nitrogen concentration higher than that of the semiconductor layer 108, specifically, 7 atomic%.
The above In—Ga—Zn-based oxynitride semiconductor film is used.

As the gate insulating film 106, for example, a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, a hafnium oxide film, a gallium oxide film, a Ga—Zn-based metal oxide film, or the like is used. What is necessary is just to provide by lamination or a single layer. Note that in order to improve interface characteristics with the semiconductor layer 108, at least a region in contact with the semiconductor layer 108 in the gate insulating film 106 is preferably formed using an oxide insulating film.

In addition, by providing the gate insulating film 106 with an insulating film having a blocking effect such as oxygen, hydrogen, and water, diffusion of oxygen from the semiconductor layer 108 to the outside and hydrogen, water, and the like from the outside to the semiconductor layer 108 can be performed. It can be prevented from entering. Examples of the insulating film having a blocking effect of oxygen, hydrogen, water, and the like include aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide, and hafnium oxynitride.

In addition, the gate insulating film 106 has a stacked structure, the first silicon nitride film is a silicon nitride film with few defects, and the second silicon nitride film is formed over the first silicon nitride film with a hydrogen release amount and ammonia release. By providing a silicon nitride film with a small amount and providing an oxide insulating film over the second silicon nitride film, the gate insulating film 106 with few defects and a small amount of hydrogen and ammonia released is formed as the gate insulating film 106. can do. As a result, movement of hydrogen and nitrogen contained in the gate insulating film 106 to the semiconductor layer 108 can be suppressed.

Further, by using a silicon nitride film for the gate insulating film 106, the following effects can be obtained. Since the silicon nitride film has a higher relative dielectric constant than that of the silicon oxide film and has a large film thickness necessary for obtaining an equivalent capacitance, the gate insulating film can be physically thickened.
Therefore, reduction in the withstand voltage of the first transistor 101, the second transistor 103, and the third transistor 105 is suppressed, and further, the withstand voltage is improved to suppress electrostatic breakdown of the transistor used for the display device. Can do.

Also, copper is used for the gate electrode 104 and the gate insulating film 10 in contact with the gate electrode 104 is used.
When a silicon nitride film is used for 6, it is preferable to reduce the amount of ammonia molecule released by heating as much as possible in order to suppress the reaction between copper and ammonia molecules.

In a transistor in which an oxide semiconductor film is used for the semiconductor layer 108, when there is a trap state (also referred to as an interface state) in the interface between the oxide semiconductor film and the gate insulating film or in the gate insulating film,
Sub-threshold coefficient (S) indicating a change in threshold voltage of a transistor, typically a negative shift of the threshold voltage, and a gate voltage required for the drain current to change by an order of magnitude when the transistor is turned on. Value). As a result, there is a problem that electric characteristics vary from transistor to transistor. Therefore, by using a silicon nitride film with few defects as the gate insulating film, a negative shift in threshold voltage and variations in electric characteristics of transistors can be reduced.

As the gate insulating film 106, hafnium silicate (HfSiO _x ), hafnium silicate added with nitrogen (HfSi _x O _y N _z ), hafnium aluminate added with nitrogen (HfAl _x O _y N _z ), hafnium oxide High such as yttrium oxide
The gate leakage of the transistor can be reduced by using the −k material.

The thickness of the gate insulating film 106 is 5 nm to 400 nm, more preferably 10 nm to 300 nm, and more preferably 50 nm to 250 nm.

The semiconductor layer 108 is formed using an oxide semiconductor and preferably contains at least indium (In) or zinc (Zn). Or it is preferable that both In and Zn are included. In addition, in order to reduce variation in electrical characteristics of the transistor including the oxide semiconductor, it is preferable to include one or more stabilizers together with the transistor.

Examples of the stabilizer include gallium (Ga), tin (Sn), hafnium (Hf), aluminum (Al), and zirconium (Zr). Other stabilizers include lanthanoids such as lanthanum (La), cerium (Ce), praseodymium (
Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium ( Yb) and lutetium (Lu).

For example, indium oxide, tin oxide, zinc oxide, In—Zn metal oxide, Sn—Zn metal oxide, Al—Zn metal oxide, Zn—Mg metal oxide, Sn— Mg-based metal oxide, In-Mg-based metal oxide, In-Ga-based metal oxide, In-
W-based metal oxide, In-Ga-Zn-based metal oxide (also expressed as IGZO), In-Al
-Zn metal oxide, In-Sn-Zn metal oxide, Sn-Ga-Zn metal oxide,
Al-Ga-Zn metal oxide, Sn-Al-Zn metal oxide, In-Hf-Zn metal oxide, In-La-Zn metal oxide, In-Ce-Zn metal oxide, In-Pr
-Zn metal oxide, In-Nd-Zn metal oxide, In-Sm-Zn metal oxide,
In-Eu-Zn metal oxide, In-Gd-Zn metal oxide, In-Tb-Zn metal oxide, In-Dy-Zn metal oxide, In-Ho-Zn metal oxide, In-Er
-Zn metal oxide, In-Tm-Zn metal oxide, In-Yb-Zn metal oxide,
In-Lu-Zn-based metal oxide, In-Sn-Ga-Zn-based metal oxide, In-Hf-G
a-Zn-based metal oxide, In-Al-Ga-Zn-based metal oxide, In-Sn-Al-Zn
A metal oxide, an In—Sn—Hf—Zn metal oxide, or an In—Hf—Al—Zn metal oxide can be used.

Note that here, for example, an In—Ga—Zn-based metal oxide means an oxide containing In, Ga, and Zn as its main components, and there is no limitation on the ratio of In, Ga, and Zn. I
Metal elements other than n, Ga, and Zn may be contained.

Alternatively, a material represented by InMO ₃ (ZnO) _m (m> 0 is satisfied, and m is not an integer) may be used as the oxide semiconductor. Note that M represents one metal element or a plurality of metal elements selected from Ga, Fe, Mn, and Co. As an oxide semiconductor, In ₂ SnO
₅ (ZnO) _n (n> 0 and n is an integer) may be used.

For example, In: Ga: Zn = 1: 1: 1 (= 1/3: 1/3: 1/3), In: Ga:
Zn = 2: 2: 1 (= 2/5: 2/5: 1/5) or In: Ga: Zn = 3: 1:
An In—Ga—Zn-based metal oxide having an atomic ratio of 2 (= 1/2: 1/6: 1/3) or an oxide in the vicinity of the composition can be used. Alternatively, In: Sn: Zn = 1: 1: 1 (= 1
/ 3: 1/3: 1/3), In: Sn: Zn = 2: 1: 3 (= 1/3: 1/6: 1/2)
Alternatively, In: Sn: Zn = 2: 1: 5 (= 1/4: 1/8: 5/8) atomic ratio In
A —Sn—Zn-based metal oxide is preferably used. Note that the atomic ratio of the metal oxide includes a variation of plus or minus 20% of the above atomic ratio as an error.

However, the composition is not limited thereto, and a material having an appropriate composition may be used according to required semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, variation, and the like). In order to obtain the required semiconductor characteristics, it is preferable that the carrier density, impurity concentration, defect density, atomic ratio of metal element to oxygen, interatomic distance, density, and the like are appropriate.

For example, high mobility can be obtained relatively easily with an In—Sn—Zn-based metal oxide. However, field effect mobility can be increased by reducing the defect density in the bulk also in the case of using an In—Ga—Zn-based metal oxide.

An oxide semiconductor film that can be used as the semiconductor layer 108 has an energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more.
In this manner, the off-state current of the transistor can be reduced by using an oxide semiconductor film with a wide energy gap.

Next, a structure of an oxide semiconductor film that can be used as the semiconductor layer 108 is described.

An oxide semiconductor film is roughly classified into a non-single-crystal oxide semiconductor film and a single-crystal oxide semiconductor film.
The non-single-crystal oxide semiconductor film is a CAAC-OS (C Axis Aligned Cry
a "stalline oxide semiconductor" film, a polycrystalline oxide semiconductor film, a microcrystalline oxide semiconductor film, an amorphous oxide semiconductor film, or the like.

  Here, the CAAC-OS film is described.

The CAAC-OS film is one of oxide semiconductor films having a plurality of crystal parts, and most of the crystal parts are large enough to fit in a cube whose one side is less than 100 nm. Therefore, CAAC-
The crystal part included in the OS film includes a case where one side has a size that can fit in a cube of less than 10 nm, less than 5 nm, or less than 3 nm.

A CAAC-OS film is transmitted through a transmission electron microscope (TEM).
When observed with a tron microscope, a clear boundary between crystal parts, that is, a crystal grain boundary (also referred to as a grain boundary) cannot be confirmed. Therefore, C
It can be said that the AAC-OS film is unlikely to decrease in electron mobility due to crystal grain boundaries.

When the CAAC-OS film is observed by TEM (cross-sectional TEM observation) from a direction substantially parallel to the sample surface, it can be confirmed that metal atoms are arranged in layers in the crystal part. Each layer of metal atoms has a shape reflecting unevenness of a surface (also referred to as a formation surface) or an upper surface on which the CAAC-OS film is formed, and is arranged in parallel with the formation surface or the upper surface of the CAAC-OS film. .

On the other hand, the CAAC-OS film is observed with a TEM from a direction substantially perpendicular to the sample surface (plane T
(EM observation), it can be confirmed that the metal atoms are arranged in a triangular or hexagonal shape in the crystal part. However, there is no regularity in the arrangement of metal atoms between different crystal parts.

In this specification, “parallel” refers to a state in which two straight lines are arranged at an angle of −10 ° to 10 °. Therefore, the case of −5 ° to 5 ° is also included. Also,"
“Vertical” means a state in which two straight lines are arranged at an angle of 80 ° to 100 °.
Therefore, the case of 85 ° to 95 ° is also included.

From the cross-sectional TEM observation and the planar TEM observation, it is found that the crystal part of the CAAC-OS film has orientation.

X-ray diffraction (XRD: X-Ray Diffraction) for CAAC-OS film
When structural analysis is performed using an apparatus, for example, a CAAC-OS including a crystal of InGaZnO ₄
In the analysis of the film by the out-of-plane method, a peak may appear at a diffraction angle (2θ) of around 31 °. Since this peak is attributed to the (009) plane of the InGaZnO ₄ crystal, the CAAC-OS film crystal has c-axis orientation, and the c-axis is in a direction substantially perpendicular to the formation surface or the top surface. Can be confirmed.

On the other hand, in-p in which X-rays are incident on the CAAC-OS film from a direction substantially perpendicular to the c-axis.
In the analysis by the lane method, a peak may appear when 2θ is around 56 °. This peak is attributed to the (110) plane of the InGaZnO ₄ crystal. In the case of a single crystal oxide semiconductor film of InGaZnO ₄ , 2θ is fixed in the vicinity of 56 °, and the normal vector of the sample surface is the axis (φ axis).
When analysis (φ scan) is performed while rotating the sample, six peaks attributed to the crystal plane equivalent to the (110) plane are observed. On the other hand, in the case of a CAAC-OS film, a peak is not clearly observed even when φ scan is performed with 2θ fixed at around 56 °.

From the above, in the CAAC-OS film, the orientation of the a-axis and the b-axis is irregular between different crystal parts, but the c-axis is aligned, and the c-axis is a normal line of the formation surface or the top surface. It can be seen that the direction is parallel to the vector. Therefore, each layer of metal atoms arranged in a layer shape confirmed by the above-mentioned cross-sectional TEM observation is a plane parallel to the ab plane of the crystal.

Note that the crystal part is formed when a CAAC-OS film is formed or when crystallization treatment such as heat treatment is performed. As described above, the c-axis of the crystal is oriented in a direction parallel to the normal vector of the formation surface or the top surface of the CAAC-OS film. Therefore, for example, when the shape of the CAAC-OS film is changed by etching or the like, the c-axis of the crystal may not be parallel to the normal vector of the formation surface or the top surface of the CAAC-OS film.

Further, the crystallinity in the CAAC-OS film is not necessarily uniform. For example, CAAC-OS
In the case where the crystal part of the film is formed by crystal growth from the vicinity of the top surface of the CAAC-OS film, the region near the top surface may have a higher degree of crystallinity than the region near the formation surface. CA
In the case where an impurity is added to the AC-OS film, the crystallinity of a region to which the impurity is added changes, and a region having a different degree of crystallinity may be formed.

Note that an out-of-plane of a CAAC-OS film having a crystal of InGaZnO ₄ is used.
In the analysis by the method, there is a case where a peak appears when 2θ is around 36 ° in addition to the peak when 2θ is around 31 °. Since the peak at 2θ of around 36 ° is attributed to the (311) plane of the ZnGa ₂ O ₄ crystal, a part of the CAAC-OS film having the InGaZnO ₄ crystal has a Z
It shows that a crystal of nGa ₂ O ₄ is included. The CAAC-OS film preferably has a peak at 2θ of around 31 ° and no peak at 2θ of around 36 °.

The CAAC-OS film is an oxide semiconductor film with a low impurity concentration. The impurity is an element other than the main component of the oxide semiconductor film, such as hydrogen, carbon, silicon, or a transition metal element. In particular, an element such as silicon, which has a stronger bonding force with oxygen than the metal element included in the oxide semiconductor film, disturbs the atomic arrangement of the oxide semiconductor film by depriving the oxide semiconductor film of oxygen, and has crystallinity. It becomes a factor to reduce. In addition, heavy metals such as iron and nickel, argon, carbon dioxide, and the like have large atomic radii (or molecular radii). Therefore, if they are contained inside an oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disturbed, resulting in crystallinity. It becomes a factor to reduce. Note that the impurity contained in the oxide semiconductor film might serve as a carrier trap or a carrier generation source.

The CAAC-OS film is an oxide semiconductor film with a low density of defect states. For example, oxygen vacancies in the oxide semiconductor film can serve as carrier traps or can generate carriers by capturing hydrogen.

A low impurity concentration and a low density of defect states (small number of oxygen vacancies) is called high purity intrinsic or substantially high purity intrinsic. A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has few carrier generation sources, and thus can have a low carrier density. Therefore, a transistor including the oxide semiconductor film rarely has electrical characteristics (also referred to as normally-on) in which the threshold voltage is negative. A highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has few carrier traps. Therefore, a transistor including the oxide semiconductor film has a small change in electrical characteristics and has high reliability. Note that the charge trapped in the carrier trap of the oxide semiconductor film takes a long time to be released, and may behave as if it were a fixed charge. Therefore, a transistor including an oxide semiconductor film with a high impurity concentration and a high density of defect states may have unstable electrical characteristics.

In addition, the transistor using the CAAC-OS film has little change in electrical characteristics due to irradiation with visible light or ultraviolet light.

The CAAC-OS film is formed by a sputtering method using a polycrystalline oxide semiconductor sputtering target, for example. When ions collide with the sputtering target, the crystal region included in the sputtering target is cleaved from the ab plane, and may be separated as flat or pellet-like sputtering particles having a plane parallel to the ab plane. is there. In this case, the flat-plate-like sputtered particle reaches the substrate while maintaining a crystalline state, whereby a CAAC-OS film can be formed.

  In order to form the CAAC-OS film, the following conditions are preferably applied.

By reducing the mixing of impurities during film formation, the crystal state can be prevented from being broken by impurities. For example, the concentration of impurities present in the deposition chamber (hydrogen, water, carbon dioxide, nitrogen, etc.)
Should be reduced. Further, the impurity concentration in the deposition gas may be reduced. Specifically, a deposition gas having a dew point of −80 ° C. or lower, preferably −100 ° C. or lower is used.

Further, by increasing the substrate heating temperature during film formation, migration of sputtered particles occurs after reaching the substrate. Specifically, the film formation is performed at a substrate heating temperature of 100 ° C. to 740 ° C., preferably 150 ° C. to 500 ° C. By increasing the substrate heating temperature during film formation,
When the flat sputtered particles reach the substrate, migration occurs on the substrate, and the flat surface of the sputtered particles adheres to the substrate.

In addition, it is preferable to reduce plasma damage during film formation by increasing the oxygen ratio in the film formation gas and optimizing electric power. The oxygen ratio in the film forming gas is 30% by volume or more, preferably 100%.
Volume%.

The oxide semiconductor film used as the semiconductor layer 108 may have a structure in which a plurality of oxide semiconductor films are stacked. For example, the oxide semiconductor film is a stack of a first oxide semiconductor film and a second oxide semiconductor film, and the first oxide semiconductor film and the second oxide semiconductor film have different metal oxide compositions. May be used. For example, one of a binary metal oxide or a quaternary metal oxide is used for the first oxide semiconductor film, and a binary metal oxide different from the first oxide semiconductor film is used for the second oxide semiconductor film. Materials or quaternary metal oxides may be used.

Alternatively, the constituent elements of the first oxide semiconductor film and the second oxide semiconductor film may be the same, and the compositions of the elements may be different. For example, the atomic ratio of the first oxide semiconductor film is set to In: Ga: Zn =
1: 1: 1 and the atomic ratio of the second oxide semiconductor film may be In: Ga: Zn = 3: 1: 2. The atomic ratio of the first oxide semiconductor film is In: Ga: Zn = 1: 3: 2, and the atomic ratio of the second oxide semiconductor film is In: Ga: Zn = 2: 1: 3. It is good. Note that the atomic ratio of each oxide semiconductor film includes a variation of plus or minus 20% of the atomic ratio described above as an error.

At this time, of the first oxide semiconductor film and the second oxide semiconductor film, the side closer to the gate electrode (
The content ratio of In and Ga in the oxide semiconductor film on the channel side is preferably In> Ga. The In and Ga contents of the oxide semiconductor film on the side far from the gate electrode (back channel side)
≦ Ga is good.

Alternatively, the oxide semiconductor film may have a three-layer structure, the constituent elements of the first oxide semiconductor film to the third oxide semiconductor film may be the same, and the compositions thereof may be different. For example, the atomic ratio of the first oxide semiconductor film is In: Ga: Zn = 1: 3: 2, and the atomic ratio of the second oxide semiconductor film is In: Ga: Zn = 3: 1: 2. And the atomic ratio of the third oxide semiconductor film is In: G
It is good also as a: Zn = 1: 1: 1.

An oxide semiconductor film having a smaller atomic ratio of In than Ga and Zn, typically having an atomic ratio of In
: Ga: Zn = 1: 3: 2 is an oxide semiconductor film in which the atomic ratio of In is larger than Ga and Zn, typically the second oxide semiconductor film, and Compared with an oxide semiconductor film having the same atomic ratio of Ga, Zn, and In, typically a third oxide semiconductor film,
Since oxygen deficiency is unlikely to occur, an increase in carrier density can be suppressed. In addition, when the first oxide semiconductor film with an atomic ratio of In: Ga: Zn = 1: 3: 2 has an amorphous structure, the second oxide semiconductor film is likely to be a CAAC-OS film.

In addition, since the constituent elements of the first oxide semiconductor film to the third oxide semiconductor film are the same, the first oxide semiconductor film has a trap level at the interface with the second oxide semiconductor film. Few.
Therefore, when the oxide semiconductor film has the above structure, the amount of change in threshold voltage due to aging of the transistor or photodegradation can be reduced.

In oxide semiconductors, s orbitals of heavy metals mainly contribute to carrier conduction, and by increasing the In content, more s orbitals overlap. Therefore, an oxide having a composition of In> Ga has In ≦ Ga. Compared with the oxide which becomes the composition, it has a high carrier mobility. Ga
Has a larger formation energy of oxygen vacancies than In, and oxygen vacancies are less likely to occur.
An oxide having a composition of Ga has stable characteristics as compared with an oxide having a composition of In> Ga.

An oxide semiconductor having a composition In> Ga is applied to the channel side, and In is applied to the back channel side.
By using an oxide semiconductor having a composition of ≦ Ga, the field-effect mobility and reliability of the transistor can be further increased.

Alternatively, oxide semiconductors having different crystallinities may be used for the first oxide semiconductor film to the third oxide semiconductor film. In other words, a single crystal oxide semiconductor, a polycrystalline oxide semiconductor, a microcrystalline oxide semiconductor, an amorphous oxide semiconductor, or a CAAC-OS may be combined as appropriate. In addition, when an amorphous oxide semiconductor is applied to any one of the first oxide semiconductor film and the second oxide semiconductor film, internal stress and external stress of the oxide semiconductor film are reduced, so that the transistor The variation in characteristics can be reduced, and the reliability of the transistor can be further improved.

The thickness of the oxide semiconductor film is 1 nm to 100 nm, more preferably 1 nm to 30 nm.
nm or less, more preferably 1 nm or more and 50 nm or less, more preferably 3 nm or more and 20 nm.
The following is preferable.

In the oxide semiconductor film used for the semiconductor layer 108, secondary ion mass spectrometry (SIMS)
The concentration of alkali metal or alkaline earth metal obtained by Secondary Ion Mass Spectrometry is preferably 1 × 10 ¹⁸ atoms / cm ³ or less, more preferably 2 × 10 ¹⁶ atoms / cm ³ or less. Alkali metal and alkaline earth metal may generate carriers when combined with an oxide semiconductor,
This is because it causes an increase in off-state current of the transistor.

Further, in the oxide semiconductor film used for the semiconductor layer 108, the hydrogen concentration obtained by secondary ion mass spectrometry is less than 5 × 10 ¹⁸ atoms / cm ³ , preferably 1 × 10 ¹⁸ a.
It is preferable that it is not more than toms / cm ³ , more preferably not more than 5 × 10 ¹⁷ atoms / cm ³ , still more preferably not more than 1 × 10 ¹⁶ atoms / cm ³ .

Hydrogen contained in the oxide semiconductor film reacts with oxygen bonded to metal atoms to become water, and defects are formed in a lattice from which oxygen is released (or a portion where oxygen is removed). In addition, when hydrogen is partly bonded to oxygen, electrons as carriers are generated. Therefore, in the oxide semiconductor film formation step, it is possible to reduce the hydrogen concentration of the oxide semiconductor film by extremely reducing impurities containing hydrogen. Therefore, by using an oxide semiconductor film from which hydrogen is removed as much as possible as a channel region, a negative shift in threshold voltage can be suppressed and variation in electrical characteristics can be reduced. In addition, leakage current at the source and drain of the transistor, typically, off-state current can be reduced.

In addition, the nitrogen concentration of the oxide semiconductor film used for the semiconductor layer 108 is set to 5 × 10 ¹⁸ atoms /
By setting it to cm ³ or less, a negative shift of the threshold voltage of the transistor can be suppressed and variation in electrical characteristics can be reduced.

Note that various experiments can prove that the off-state current of a transistor in which a highly purified oxide semiconductor film is removed in a channel region by removing hydrogen as much as possible is low. For example, even in a transistor having a channel width of 1 × 10 ⁶ μm and a channel length of 10 μm, the off-state current of the semiconductor parameter analyzer is reduced when the voltage between the source electrode and the drain electrode (drain voltage) is in the range of 1V to 10V. It is possible to obtain characteristics that are below the measurement limit, that is, 1 × 10 ⁻¹³ A or less. In this case, it can be seen that the off current corresponding to a value obtained by dividing the off current by the channel width of the transistor is 100 zA / μm or less. In addition, off-state current was measured using a circuit in which a capacitor and a transistor were connected and charge flowing into or out of the capacitor was controlled by the transistor. In this measurement, a highly purified oxide semiconductor film of the transistor was used for a channel region, and the off-state current of the transistor was measured from the change in the amount of charge per unit time of the capacitor. As a result, it was found that when the voltage between the source electrode and the drain electrode of the transistor is 3 V, an even lower off-current of several tens of yA / μm can be obtained. Therefore, a transistor using a highly purified oxide semiconductor film for a channel region has extremely low off-state current.

As the source electrode 110 and the drain electrode 112, aluminum,
A single metal composed of titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or an alloy containing this as a main component is used as a single layer structure or a multilayer structure. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is stacked on an aluminum film, a two-layer structure in which a titanium film is stacked on a tungsten film, and a copper film on a copper-magnesium-aluminum alloy film A two-layer structure to be laminated, a three-layer structure in which a titanium film or a titanium nitride film and an aluminum film or a copper film are laminated on the titanium film or the titanium nitride film, and a titanium film or a titanium nitride film is further formed thereon. There is a three-layer structure in which a molybdenum film or a molybdenum nitride film, an aluminum film or a copper film is stacked over the molybdenum film or the molybdenum nitride film, and a molybdenum film or a molybdenum nitride film is further formed thereon. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

Note that in this embodiment, the source electrode 110 and the drain electrode 112 are formed of the semiconductor layer 108.
Although provided above, it may be provided between the gate insulating film 106 and the semiconductor layer 108.

As the first interlayer insulating film 114, an oxide insulating film is preferably used in order to improve interface characteristics with the oxide semiconductor film used as the semiconductor layer 108. First interlayer insulating film 11
4 can be a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, a hafnium oxide film, a gallium oxide film, a Ga—Zn-based metal oxide film, or the like with a thickness of 150 nm to 400 nm. Further, the first interlayer insulating film 114 may have a stacked structure of an oxide insulating film and a nitride insulating film. For example, the first interlayer insulating film 114 can have a stacked structure of a silicon oxynitride film and a silicon nitride film.

As the second interlayer insulating film 116, an organic insulating material having heat resistance such as an acrylic resin, a polyimide resin, a benzocyclobutene resin, a polyamide resin, or an epoxy resin can be used. In addition, by laminating a plurality of insulating films formed of these materials,
A second interlayer insulating film 116 may be formed. By using the second interlayer insulating film 116, unevenness of the first transistor 101 and the like can be planarized.

As the capacitor electrode 118, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO) ), A light-transmitting conductive material such as indium zinc oxide or indium tin oxide to which silicon oxide is added can be used.

As the third interlayer insulating film 120, an inorganic insulating material such as a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, or an aluminum oxide film can be used. In particular, the third interlayer insulating film 120 is preferably any one selected from a silicon nitride film, a silicon nitride oxide film, and an aluminum oxide film. Silicon nitride film,
By using any one selected from a silicon nitride oxide film and an aluminum oxide film as the third interlayer insulating film 120, release of hydrogen and moisture from the second interlayer insulating film 116 can be suppressed. .

As the pixel electrode 122, a material similar to the material shown for the capacitor electrode 118 can be used. As materials used for the capacitor electrode 118 and the pixel electrode 122, the same material or different materials may be used. However, the same material is preferable because the manufacturing cost can be reduced.

As the first alignment film 124 and the second alignment film 164, an organic material having heat resistance such as an acrylic resin, a polyimide resin, a benzocyclobutene resin, a polyamide resin, or an epoxy resin is used. it can.

As the liquid crystal layer 162, a liquid crystal material such as a thermotropic liquid crystal, a low molecular liquid crystal, a polymer liquid crystal, a polymer dispersed liquid crystal, a ferroelectric liquid crystal, or an antiferroelectric liquid crystal can be used. These liquid crystal materials exhibit a cholesteric phase, a smectic phase, a cubic phase, a chiral nematic phase, an isotropic phase, and the like depending on conditions.

In the case of adopting the horizontal electric field method, the alignment films (the first alignment film 124 and the second alignment film 16 are used.
You may use the liquid crystal which shows the blue phase which does not use 4). The blue phase is one of the liquid crystal phases. When the temperature of the cholesteric liquid crystal is increased, the blue phase appears immediately before the transition from the cholesteric phase to the isotropic phase. Since the blue phase appears only in a narrow temperature range, in order to improve the temperature range, a liquid crystal composition mixed with several weight percent or more of a chiral agent is used for the liquid crystal layer. A liquid crystal composition including a liquid crystal exhibiting a blue phase and a chiral agent has a short response speed and is optically isotropic, so that alignment treatment is unnecessary and viewing angle dependency is small. Further, since it is not necessary to provide an alignment film, a rubbing process is not required, so that electrostatic breakdown caused by the rubbing process can be prevented, and defects or breakage of the liquid crystal display device during the manufacturing process can be reduced. . Therefore, the productivity of the liquid crystal display device can be improved. In a transistor using an oxide semiconductor film, the electrical characteristics of the transistor may fluctuate significantly due to the influence of static electricity and deviate from the design range. Therefore, it is more effective to use a blue phase liquid crystal material for a liquid crystal display device including a transistor including an oxide semiconductor film.

The specific resistance of the liquid crystal material is 1 × 10 ⁹ Ω · cm or more, preferably 1 × 10 ^1.
1 Ω · cm or more, more preferably 1 × 10 ¹² Ω · cm or more. In addition, the value of the specific resistance in this specification shall be the value measured at 20 degreeC.

The size of the storage capacitor provided in the display device is set so as to hold a charge for a predetermined period in consideration of a leakage current of a transistor arranged in the pixel region. The size of the storage capacitor may be set in consideration of the off-state current of the transistor. By using a transistor having an oxide semiconductor layer with high purity and suppressed formation of oxygen vacancies, for example, when a liquid crystal element is used as a display element, the liquid crystal capacity in each pixel is 1/3 or less, preferably 1 It is sufficient to provide a storage capacitor having a capacity of / 5 or less.

In addition, a transistor in which a highly purified oxide semiconductor in which formation of oxygen vacancies is suppressed is used for the semiconductor layer in this embodiment can reduce a current value in an off state (off-state current value). Therefore, the holding time of an electric signal such as an image signal can be increased, and the writing interval can be set longer in the power-on state. Therefore, since the frequency of the refresh operation can be reduced, there is an effect of suppressing power consumption.

In the display device shown in FIGS. 1 and 2, the driving mode of the liquid crystal element 150 is as follows.
TN (Twisted Nematic) mode, IPS (In-Plane-Switch)
ching) mode, FFS (Fringe Field Switching) mode, ASM (Axial Symmetrical Aligned Micro-cel)
l) mode, OCB (Optical Compensated Birefringe)
nce) mode, FLC (Ferroelectric Liquid Crystal)
) Mode, AFLC (Antiferroelectric Liquid Cryst)
al) mode or the like. In particular, it is preferable to use the FFS mode to obtain a high viewing angle.

Alternatively, a normally black liquid crystal display device such as a transmissive liquid crystal display device employing a vertical alignment (VA) mode may be used. There are several vertical alignment modes,
For example, MVA (Multi-Domain Vertical Alignment)
Mode, PVA (Patterned Vertical Alignment) mode, etc. can be used. Also, the pixel (pixel) is divided into several areas (sub-pixels)
It is also possible to use a method called multi-domain or multi-domain design, which is devised to divide molecules in different directions.

Although not shown in FIGS. 1 and 2, an optical member (optical substrate) such as a polarizing member, a retardation member, or an antireflection member may be provided as appropriate. For example, circularly polarized light using a polarizing substrate and a retardation substrate may be used. Further, a backlight, a sidelight, or the like may be used as the light source.

As a display method in the pixel region 142, a progressive method, an interlace method, or the like can be used. In addition, as color elements controlled by pixels when performing color display, R
It is not limited to three colors GB (R represents red, G represents green, and B represents blue). For example, there is RGBW (W represents white) or RGB in which one or more colors of yellow, cyan, magenta, etc. are added. The size of the display area may be different for each dot of the color element. Note that the disclosed invention is not limited to a display device for color display, and can be applied to a display device for monochrome display.

Further, a spacer 160 is formed below the second substrate 152, and the first substrate 1
It is provided in order to control the distance (also referred to as a cell gap) between 02 and the second substrate 152. Note that the thickness of the liquid crystal layer 162 is determined by the cell gap. Spacer 1
As 60, a spacer having an arbitrary shape such as a columnar spacer or a spherical spacer obtained by selectively etching the insulating film may be used.

The colored film 153 functions as a so-called color filter. As the colored film 153,
A material that transmits light in a specific wavelength band may be used, and an organic resin film containing a dye or a pigment may be used.

The light shielding film 154 functions as a so-called black matrix. As the light shielding film 154, it is only necessary to shield the radiation light between adjacent pixels, and a metal film, an organic resin film containing a black dye or a black pigment, or the like can be used. In the present embodiment, a light shielding film 154 made of an organic resin film containing a black pigment is illustrated.

The organic protective insulating film 156 is provided so that an ionic substance contained in the colored film 153 does not diffuse into the liquid crystal layer 162. However, the organic protective insulating film 156 is not limited to this structure, and may be a structure without being provided.

As the sealant 166, a thermosetting resin, an ultraviolet curable resin, or the like can be used. In the sealing region of the sealing material 166 shown in FIG.
2 and the second substrate 152, the gate insulating film 106, the source electrode 110, and the drain electrode 1
12 illustrates the configuration in which the electrode 113, the first interlayer insulating film 114, and the second interlayer insulating film 116 formed in the same process as in FIG. 12 are provided, but the present invention is not limited thereto. For example, only the gate insulating film 106 and the first interlayer insulating film 114 may be used. Note that, when the second interlayer insulating film 116 is removed, moisture or the like does not enter from the outside. Therefore, as shown in FIG. 2, a part of the second interlayer insulating film 116 is removed or a part thereof is retracted. A structure is preferred.

As described above, the display device described in this embodiment includes a transistor formed in each of a pixel region and a driver circuit region, a first interlayer insulating film formed over the transistor, and a first interlayer insulating film. A second interlayer insulating film formed thereon, and a third interlayer insulating film formed on the second interlayer insulating film, the third interlayer insulating film being part of the pixel region The end portion of the third interlayer insulating film is provided inside the drive circuit region. With such a structure, degassing from the second interlayer insulating film is prevented from entering the transistor side, and a highly reliable display device can be obtained. Further, the first interlayer insulating film can suppress degassing from the second interlayer insulating film from entering the transistor side.

The structure described in this embodiment can be combined as appropriate with any of the structures described in the other embodiments or examples.

(Embodiment 2)
In this embodiment, a display device using an organic EL panel is described as an embodiment of the display device with reference to FIGS. In addition, the same code | symbol is attached | subjected to the location same as the structure shown in Embodiment 1, and the detailed description is abbreviate | omitted.

As a mode of the display device, a top view of the display device is shown in FIG. 3, and a cross-sectional view of the display device is shown in FIG. 4 corresponds to a cross-sectional view taken along line X2-Y2 in FIG.

In the display device illustrated in FIG. 3, a gate driver circuit portion which is a pixel region 142 provided on the first substrate 102 and a drive circuit region that is adjacent to the outside of the pixel region 142 and supplies a signal to the pixel region 142. A sealing material 166 is provided so as to surround 140 and the source driver circuit portion 144 and is sealed by the second substrate 152. A second substrate 152 is provided so as to face the pixel region 142 and the first substrate 102 provided with the gate driver circuit portion 140 and the source driver circuit portion 144. Therefore, the pixel region 142,
The gate driver circuit portion 140 and the source driver circuit portion 144 are sealed together with the display element by the first substrate 102, the sealant 166, and the second substrate 152.

In this manner, part or the whole of the driver circuit including the transistor can be formed over the first substrate 102 that is the same as the pixel region 142 to form a system-on-panel.

Next, the configuration of the pixel region 142 and the gate driver circuit portion 140 will be described in detail below with reference to FIG. 4 corresponding to a cross-sectional view taken along line X2-Y2 in FIG.

In the pixel region 142, the first substrate 102, the gate electrode 104 formed on the first substrate 102, the gate insulating film 106 formed on the gate electrode 104, and the gate insulating film 106 are in contact with the gate electrode. 104, the semiconductor layer 108 provided at a position overlapping with the gate 104, the gate insulating film 106, and the source electrode 110 and the drain electrode 1 formed on the semiconductor layer 108.
Thus, the first transistor 101 is formed.

In the pixel region 142, a first interlayer insulating film formed of an inorganic insulating material over the first transistor 101, more specifically, over the gate insulating film 106, the semiconductor layer 108, the source electrode 110, and the drain electrode 112. 114, a second interlayer insulating film 116 formed of an organic insulating material on the first interlayer insulating film 114, and a third interlayer insulating film formed of an inorganic insulating material on the second interlayer insulating film 116 120, a partition 126 formed on the second interlayer insulating film 116 and the third interlayer insulating film 120, a pixel electrode 122 formed on the third interlayer insulating film 120 and the partition 126, and a pixel The light emitting layer 128 formed on the electrode 122 and the light emitting layer 12
8 is formed on the electrode 8.

Note that the pixel electrode 122, the light emitting layer 128, and the electrode 130 form a light emitting element 170.

Further, a filler 172 is provided on the light emitting element 170, more specifically on the electrode 130,
A second substrate 152 is provided over the filler 172. That is, the first substrate 102
The light emitting element 170 and the filler 172 are sandwiched between the second substrate 152 and the second substrate 152.

In the gate driver circuit portion 140, the first substrate 102 and the first substrate 102
The gate electrode 104 formed thereon and the gate insulating film 10 formed on the gate electrode 104
6, the semiconductor layer 108 in contact with the gate insulating film 106 and overlapped with the gate electrode 104, and the source electrode 110 formed on the gate insulating film 106 and the semiconductor layer 108.
The second transistor 103 and the third transistor 105 are formed by the drain electrode 112 and the drain electrode 112.

In the gate driver circuit portion 140, an inorganic insulating material is formed over the second transistor 103 and the third transistor 105, more specifically, over the gate insulating film 106, the semiconductor layer 108, the source electrode 110, and the drain electrode 112. First interlayer insulating film 11
4 and a second interlayer insulating film 116 made of an organic insulating material is formed on the first interlayer insulating film 114.

In other words, the third interlayer insulating film 120 is provided in a part on the pixel region 142, and an end portion of the third interlayer insulating film 120 is formed inside the gate driver circuit unit 140 that is a driving circuit region. .

With such a structure, moisture taken in from the outside or moisture, hydrogen, or other gas generated inside the display device can be released upward from the second interlayer insulating film 116 of the gate driver circuit portion 140. . Accordingly, it is possible to suppress gas such as moisture and hydrogen from being taken into the first transistor 101, the second transistor 103, and the third transistor 105.

Note that the second interlayer insulating film 116 formed of an organic insulating material requires a highly flat organic insulating material in order to reduce unevenness of a transistor included in the display device. However, the organic insulating material releases hydrogen, moisture, or an organic component as a gas by heating or the like.

However, in a transistor using, for example, a silicon film that is a silicon-based semiconductor material as the semiconductor layer 108, the above-described hydrogen, moisture, or organic component gas is unlikely to be a serious problem. However, in one embodiment of the present invention, since an oxide semiconductor film is used for the semiconductor layer 108, it is necessary to suitably release gas from the second interlayer insulating film 116 formed using an organic insulating material to the outside. Note that the structure in which the end portion of the third interlayer insulating film 120 is formed on the inner side of the gate driver circuit portion 140 which is a driver circuit region is excellent in the case where the semiconductor layer 108 is formed using an oxide semiconductor film. Play. Note that a similar effect can be obtained also in a transistor in which the semiconductor layer 108 is formed using a material other than an oxide semiconductor (eg, amorphous silicon or crystalline silicon which is a silicon-based semiconductor material).

In the present embodiment, the third interlayer insulating film 120 formed on the second interlayer insulating film 116 prevents the gas emitted from the second interlayer insulating film 116 from entering the light emitting element 170 side. In order to suppress and / or improve the adhesion between the pixel electrode 122 and the second interlayer insulating film 116. With such a structure, gas such as hydrogen and moisture from the second interlayer insulating film 116 can be suppressed from entering the light emitting element 170 side.

However, if the third interlayer insulating film 120 is formed over the second transistor 103 used in the gate driver circuit portion 140 and the second interlayer insulating film 116 on the third transistor 105, the second interlayer insulating film 116 is formed. Gas emitted from the organic insulating material used for the diffusion cannot be diffused to the outside, and enters the second transistor 103 and the third transistor 105.

When the above gas enters an oxide semiconductor used for the semiconductor layer 108 of the transistor, it is taken in as an impurity in the oxide semiconductor film, and characteristics of the transistor including the semiconductor layer 108 are changed.

However, as shown in FIG. 4, a configuration in which the second transistor 103 used in the gate driver circuit portion 140 and the third interlayer insulating film 120 over the third transistor 105 are opened,
That is, the third interlayer insulating film 120 is provided in a part of the pixel region 142, and the end of the third interlayer insulating film 120 is formed inside the gate driver circuit portion 140. A structure in which the gas released from the two interlayer insulating films 116 can be diffused to the outside can be obtained.

As shown in FIG. 4, also in the first transistor 101 used for the pixel region 142, the third interlayer insulating film 120 formed of an inorganic insulating material at a position where the semiconductor layer 108 overlaps.
A configuration in which is removed is preferable. With such a structure, gas released from the second interlayer insulating film 116 formed of an organic insulating material can be prevented from entering the first transistor 101.

Here, the other components of the display device illustrated in FIGS. 3 and 4 will be described in detail below with respect to the configuration different from the display device described in Embodiment 1.

The partition 126 is formed using an organic insulating material or an inorganic insulating material. In particular, it is preferable to use a photosensitive resin material and form an opening on the pixel electrode 122 so that the side wall of the opening has an inclined surface formed with a continuous curvature.

As the filler 172, in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin or a thermosetting resin can be used. PVC (polyvinyl chloride), acrylic resin, polyimide resin, epoxy resin, Silicone resin, PVB (polyvinyl butyral) or EVA (ethylene vinyl acetate) can be used. For example, filler 17
As nitrogen, nitrogen may be used.

As the light-emitting element 170, a light-emitting element using electroluminescence can be used. A light-emitting element using electroluminescence is distinguished depending on whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former is called an organic EL element and the latter is called an inorganic EL element. Here, description is made using an organic EL element.

The organic EL element is applied with a pair of electrodes (pixel electrodes 122) by applying a voltage to the light emitting element.
In addition, electrons and holes are injected from the electrode 130) into the layer containing a light-emitting organic compound, and current flows. And when those carriers (electrons and holes) recombine,
A light-emitting organic compound forms an excited state, and emits light when the excited state returns to the ground state.
Due to such a mechanism, such a light-emitting element is referred to as a current-excitation light-emitting element.

In order to extract light emitted from the light-emitting element 170, at least one of the pair of electrodes (the pixel electrode 122 or the electrode 130) may be light-transmitting. Then, top emission for extracting light emission from the surface opposite to the first substrate 102, bottom emission for extracting light emission from the surface on the first substrate 102 side, and the first substrate 102 side and the first substrate 102 There is a light-emitting element having a dual emission structure in which light emission is extracted from the opposite surface, and any light-emitting element having an emission structure can be applied.

In addition, a protective film may be formed over the electrode 130 and the partition wall 126 so that oxygen, hydrogen, moisture, carbon dioxide, or the like does not enter the light-emitting element 170. As the protective film, a silicon nitride film, a silicon nitride oxide film, or the like can be formed. A space sealed with the first substrate 102, the second substrate 152, and the sealant 166 is provided with a filler 172 and sealed. Thus, it is preferable to package (enclose) with a protective film (bonded film, ultraviolet curable resin film, etc.) or a cover material that has high air tightness and little degassing so as not to be exposed to the outside air.

Further, if necessary, an optical film such as a polarizing plate, a circularly polarizing plate (including an elliptical polarizing plate), a retardation plate (λ / 4 plate, λ / 2 plate), a color filter, or the like on the emission surface of the light emitting element 170. May be provided as appropriate. Further, an antireflection film may be provided on the polarizing plate or the circularly polarizing plate. For example, anti-glare treatment can be performed that diffuses reflected light due to surface irregularities and reduces reflection.

The light-emitting layer 128 includes a guest material that is a light-emitting material that changes triplet excitation energy into light emission, and a host material that has a triplet excitation energy level (T1 level) higher than that of the guest material. It is preferable to use an organic compound. Note that the light-emitting layer 128 has a structure in which a plurality of light-emitting layers are stacked (a so-called tandem structure) or a functional layer other than the light-emitting layer (a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, a charge generation layer). Etc.).

As the sealant 166, in addition to the material described in Embodiment 1, a glass body formed by melting and solidifying a material containing a glass material, for example, powder glass (also referred to as frit glass) may be used. . Since such a material can effectively suppress the permeation of moisture and gas, when the light-emitting element 170 is used as a display element, the deterioration of the light-emitting element 170 is suppressed and an extremely reliable display is achieved. A device can be realized.

4 illustrates the structure in which only the gate insulating film 106 is provided between the first substrate 102 and the second substrate 152 in the sealing region of the sealant 166 illustrated in FIG. 4, the present invention is not limited thereto. For example, the gate insulating film 106 and the first interlayer insulating film 114 may be stacked. However, as illustrated in FIG. 4, a configuration in which the sealant 166 is disposed in a region where the second interlayer insulating film 116 is removed is preferable.

As described above, the display device described in this embodiment includes a transistor formed in each of a pixel region and a driver circuit region, a first interlayer insulating film formed over the transistor, and a first interlayer insulating film. A second interlayer insulating film formed thereon, and a third interlayer insulating film formed on the second interlayer insulating film, the third interlayer insulating film being part of the pixel region The end portion of the third interlayer insulating film is provided inside the drive circuit region. With such a structure, degassing from the second interlayer insulating film is prevented from entering the transistor side, and a highly reliable display device can be obtained. Further, the first interlayer insulating film can suppress degassing from the second interlayer insulating film from entering the transistor side.

The structure described in this embodiment can be combined as appropriate with any of the structures described in the other embodiments or examples.

(Embodiment 3)
In this embodiment, an image sensor that can be combined with the display device described in the above embodiment will be described.

FIG. 5A illustrates an example of a display device with an image sensor. FIG. 5A is an equivalent circuit illustrating one pixel of a display device with an image sensor.

In the photodiode element 4002, one electrode is electrically connected to the reset signal line 4058 and the other electrode is electrically connected to the gate electrode of the transistor 4040. Transistor 404
In the case of 0, one of the source electrode and the drain electrode is electrically connected to the power supply potential (VDD), and the other of the source electrode and the drain electrode is electrically connected to one of the source electrode and the drain electrode of the transistor 4056. In the transistor 4056, the gate electrode is electrically connected to the gate selection line 4057, and the other of the source electrode and the drain electrode is electrically connected to the output signal line 4071.

The first transistor 4030 is a pixel switching transistor. One of the source electrode and the drain electrode is electrically connected to the video signal line 4059, and the other of the source electrode and the drain electrode is electrically connected to the capacitor 4032 and the liquid crystal element 4034. It is connected. Also,
A gate electrode of the first transistor 4030 is electrically connected to the gate line 4036.

Note that the first transistor 4030, the capacitor 4032, and the liquid crystal element 4034 may have a structure similar to that of the display device described in Embodiment 1.

FIG. 5B is a cross-sectional view illustrating part of one pixel of a display device with an image sensor and a cross-sectional view of a driver circuit portion. In the pixel region 5042, a photodiode is formed over the first substrate 4001. An element 4002 and a first transistor 4030 are provided. In the gate driver circuit portion 5040 which is a driver circuit, a second transistor 4060 and a third transistor 4062 are provided over the first substrate 4001.

Note that the first interlayer insulating film 4014, the second interlayer insulating film 4016, and the third interlayer insulating film 4014 are provided over the photodiode element 4002 and the first transistor 4030 in the pixel region 5042.
An interlayer insulating film 4020 is formed. In addition, a capacitor element 4032 that uses the third interlayer insulating film 4020 as a dielectric is formed over the second interlayer insulating film 4016.

In other words, the third interlayer insulating film 4020 is provided in part of the pixel region 5042, and the end of the third interlayer insulating film 4020 is formed inside the gate driver circuit portion 5040. With such a structure, a structure in which the gas released from the second interlayer insulating film 4016 can be diffused to the outside can be obtained. Therefore, the second interlayer insulating film 40
The degassing from 16 can be prevented from entering the transistor side, and a highly reliable display device can be obtained.

Note that the photodiode element 4002 includes a pair of a lower electrode formed in the same process as the source electrode and the drain electrode of the first transistor 4030 and an upper electrode formed in the same process as the pixel electrode of the liquid crystal element 4034. The electrode has a diode between the pair of electrodes.

As a diode that can be used for the photodiode element 4002, a p-type semiconductor film, a pn-type diode including a stack of n-type semiconductor films, a p-type semiconductor film, an i-type semiconductor film, and a pin-type including a stack of n-type semiconductor films are used. A diode, a Schottky diode, or the like may be used.

A first alignment film 4024 and a liquid crystal layer 4096 are provided over the photodiode element 4002.
A second alignment film 4084, a counter electrode 4088, an organic insulating film 4086, a colored film 4085, a second substrate 4052, and the like are provided.

A pin type diode exhibits higher photoelectric conversion characteristics when the p type semiconductor film side is the light receiving surface. This is because the hole mobility is smaller than the electron mobility. In this embodiment mode, a structure in which light incident on the photodiode element 4002 is converted into an electric signal from the surface of the second substrate 4052 through the colored film 4085, the liquid crystal layer 4096, and the like is illustrated. It is not limited to this. For example, a configuration without the colored film 4085 may be employed.

The photodiode element 4002 described in this embodiment includes the photodiode element 400.
Utilizing the fact that current flows between a pair of electrodes when light enters 2. When the photodiode element 4002 detects light, information on an object to be detected can be read.

In the display device with an image sensor described in this embodiment mode, productivity can be increased by sharing the steps of the display device and the image sensor, such as manufacturing a transistor.
Note that the display device described in the above embodiment and the image sensor described in this embodiment may be manufactured over different substrates. Specifically, an image sensor may be manufactured over the second substrate in the display device described in the above embodiment.

This embodiment can be implemented in appropriate combination with any of the structures described in the other embodiments or examples.

(Embodiment 4)
In this embodiment, an example of a tablet terminal using the display device of one embodiment of the present invention will be described.

6A and 6B illustrate a tablet terminal that can be folded. FIG. 6 (A)
The tablet terminal is open. The tablet terminal includes a housing 8630 and a housing 86.
30, a display portion 8631a, a display portion 8631b, a display mode changeover switch 8034, a power switch 8035, a power saving mode changeover switch 8036, and a fastener 80.
33 and an operation switch 8038.

The display device which is one embodiment of the present invention can be applied to the display portion 8631a and the display portion 8631b.

Part or all of the display portion 8631a can function as a touch panel, and input can be performed by touching displayed operation keys. For example, a keyboard button may be displayed on the entire surface of the display portion 8631a to function as a touch panel, and the display portion 8631b may be used as a display screen.

Further, like the display portion 8631a, part or all of the display portion 8631b can function as a touch panel.

Further, the touch panel area of the display portion 8631a and the touch panel area of the display portion 8631b can be simultaneously touch-inputted.

A display mode switch 8034 can select a display direction such as a vertical display or a horizontal display, and a monochrome display or a color display. The power saving mode changeover switch 8036 can optimize the display luminance in accordance with the external light detected by the optical sensor built in the tablet terminal. Note that the tablet terminal may include not only an optical sensor but also other detection devices such as a gyro capable of detecting an inclination and an acceleration sensor.

6A illustrates an example in which the areas of the display portion 8631b and the display portion 8631a are the same, there is no particular limitation thereto. The areas of the display portion 8631b and the display portion 8631a may be different, and the display quality may be different. For example, one display panel may be capable of displaying images with higher definition than the other.

FIG. 6B shows a state in which the tablet terminal is closed. The tablet terminal has a housing 86.
30, and a solar cell 8633 and a charge / discharge control circuit 8634 provided in the housing 8630. Note that in FIG. 6B, the battery 86 is an example of the charge / discharge control circuit 8634.
35, a configuration having a DCDC converter 8636 is shown.

Note that since the tablet terminal can be folded in two, the housing 8630 can be closed when not in use. Therefore, since the display portion 8631a and the display portion 8631b can be protected,
Excellent durability and excellent reliability from the viewpoint of long-term use.

In addition, the tablet terminal shown in FIGS. 6A and 6B has a function for displaying various information (still images, moving images, text images, etc.), a calendar, a date or a time. A function for displaying on the display unit, a touch input function for performing touch input operation or editing of information displayed on the display unit, a function for controlling processing by various software (programs), and the like can be provided.

The tablet terminal can use the power obtained by the solar battery 8633 for the operation of the tablet terminal. Alternatively, the power can be stored in the battery 8635. Note that the solar battery 8633 can be provided on two surfaces of the housing 8630. Note that when a lithium ion battery is used as the battery 8635, there is an advantage that the battery can be downsized.

FIG. 6C illustrates the structure and operation of the charge / discharge control circuit 8634 illustrated in FIG.
Will be described with reference to a block diagram. FIG. 6C illustrates a solar cell 8633 and a battery 863.
5, a DCDC converter 8636, a converter 8637, a switch SW 1, a switch SW 2, a switch SW 3, and a display portion 8631. In FIG. 6C, a battery 8635, a DCDC converter 8636, a converter 8637, a switch SW1, a switch SW2, and a switch SW3 are included in the charge / discharge control circuit 86 shown in FIG.
34.

When power is generated by the solar cell 8633, the power generated by the solar cell is the battery 8
The voltage is stepped up or stepped down by a DCDC converter 8636 so as to be a voltage for charging 635. Next, the switch SW1 is turned on, and the converter 8637 boosts or lowers the voltage to an optimum voltage for the display portion 8631. When the display on the display portion 8631 is not performed, the switch S
W1 is turned off and switch SW2 is turned on to charge battery 8635.

Note that although the solar cell 8633 is shown as an example of the power generation means, the invention is not particularly limited, and other power generation means such as a piezoelectric element (piezo element) or a thermoelectric conversion element (Peltier element) may be substituted. For example, it is good also as a structure performed combining other charging means, such as the non-contact power transmission module which transmits / receives electric power wirelessly (non-contact) and charges.

This embodiment can be implemented in appropriate combination with any of the structures described in the other embodiments or examples.

(Embodiment 5)
In this embodiment, examples of electronic devices each including the display device described in the above embodiment will be described.

FIG. 7A illustrates a portable information terminal. A portable information terminal illustrated in FIG.
0, button 9301, microphone 9302, display portion 9303, speaker 93
04 and a camera 9305, and has a function as a mobile phone. Display unit 93
The display device described in the above embodiment and / or the display device with an image sensor can be applied to 03.

FIG. 7B shows a display. A display illustrated in FIG.
And a display portion 9311. The display device and / or the display device with an image sensor described in the above embodiment can be applied to the display portion 9311.

FIG. 7C illustrates a digital still camera. A digital still camera illustrated in FIG. 7C includes a housing 9320, a button 9321, a microphone 9322, and a display portion 9323. The display device and / or the display device with an image sensor described in the above embodiment can be applied to the display portion 9323.

  By using one embodiment of the present invention, the reliability of an electronic device can be increased.

This embodiment can be implemented in appropriate combination with any of the structures described in the other embodiments or examples.

In this example, the release gas of an acrylic resin, which is a typical organic resin that can be used in a display device, was investigated.

For the sample, an acrylic resin was applied on a glass substrate, and a heat treatment was performed at 250 ° C. for 1 hour in a nitrogen gas atmosphere. The acrylic resin was formed to have a thickness of 1.5 μm after the heat treatment.

For the prepared sample, TDS (Thermal Desorption Spectror)
The emission gas was measured by oscopy (thermal desorption gas spectroscopy).

FIG. 8 shows the ionic strength of the released gas at each mass-to-charge ratio (also referred to as M / z) when the substrate surface temperature is 250 ° C. In FIG. 8, the horizontal axis represents the mass-to-charge ratio, and the vertical axis represents the intensity (arbitrary unit). From FIG. 8, the sample shows that the mass-to-charge ratio that is considered to be due to water is 18 (H
₂ O) gas and the mass-to-charge ratio that appears to be due to hydrocarbons are 28 (C ₂ H ₄ ), 44 (C ₃ H
₈ ) and 56 (C ₄ H ₈ ) gases were detected. In addition, each fragment ion was detected in the vicinity of each mass to charge ratio.

Similarly, FIG. 9 shows each mass-to-charge ratio (18, 28, 44 and 56) with respect to the substrate surface temperature.
The ionic strength of is shown. In FIG. 9, the horizontal axis represents the substrate surface temperature (° C.), and the vertical axis represents the strength (arbitrary unit). When the substrate surface temperature is in the range of 55 ° C. to 270 ° C., it is found that the ionic strength with a mass-to-charge ratio of 18 considered to be due to water has peaks at 55 ° C. to 100 ° C. and 150 ° C. to 270 ° C. It was. On the other hand, it was found that the ionic strengths having a mass-to-charge ratio of 28, 44 and 56, which are considered to be attributable to hydrocarbons, have a peak at 150 ° C. or higher and 270 ° C. or lower.

As described above, it was found that impurities from the organic resin such as water and hydrocarbons to the oxide semiconductor film were released. In particular, it has been found that water is released even at relatively low temperatures of 55 ° C. or more and 100 ° C. or less. That is, it has been suggested that when the impurities attributed to the organic resin reach the oxide semiconductor film, the electrical characteristics of the transistor are deteriorated.

In addition, when an organic resin is covered with a film (such as a silicon nitride film, a silicon nitride oxide film, or an aluminum oxide film) that does not transmit a release gas such as water or hydrocarbon, the gas is released from the organic resin, thereby It was suggested that the pressure on the film that does not allow the release of gas such as hydrogen increased, and eventually the film that did not transmit the release gas such as water and hydrocarbons was destroyed, resulting in poor transistor shape.

  In this example, transistors were manufactured, and cross-sectional shapes and electrical characteristics were evaluated.

Each sample is provided with a transistor using an oxide semiconductor film having a channel etch structure of a bottom gate / top contact type. The transistor includes a gate electrode provided over a glass substrate, a gate insulating film provided over the gate electrode, an oxide semiconductor film provided over the gate electrode with the gate insulating film interposed therebetween, and an oxide semiconductor film And a pair of electrodes provided in contact with the oxide semiconductor film. Here, the gate electrode is a tungsten film, the gate insulating film is a silicon nitride film and a silicon oxynitride film over the silicon nitride film, the oxide semiconductor film is an In—Ga—Zn oxide film, and the pair of electrodes is tungsten. A film, an aluminum film on a tungsten film, and a titanium film on an aluminum film were used.

A protective insulating film (a 450 nm thick silicon oxynitride film and a 50 nm thick silicon nitride film provided over the silicon oxynitride film) is provided over the pair of electrodes.

In addition, the example sample is provided with an acrylic resin with a thickness of 2 μm on the protective insulating film,
A silicon nitride film having a thickness of 200 nm is provided on the acrylic resin so as to expose part of the side surface of the acrylic resin. In the comparative sample, an acrylic resin having a thickness of 1.5 μm is provided on the protective insulating film, and 200 n so as to cover the acrylic resin on the acrylic resin.
A silicon nitride film is provided with a thickness of m.

FIG. 10 shows a transmission electron image (Transm by TEM) of a region in which a part of the comparative sample is enlarged.
It is also called an iterated Electron: TE image ) Shows the cross-sectional shape. For the observation of the cross-sectional shape, “Hitachi ultra-thin film evaluation apparatus HD-2300” manufactured by Hitachi High-Technologies Corporation was used. In FIG. 10, only one electrode of the pair of electrodes is shown. When attention is paid to the electrode shown in FIG. 10 and the protective insulating film provided so as to cover the electrode, it has been found that the protective insulating film is cracked from the stepped portion formed by the electrode. In the observation region, since the example sample and the comparative example sample have substantially the same structure, the cross-sectional shape of the example sample is omitted.

Therefore, the example sample has a structure in which the released gas from the acrylic resin escapes to the outside of the example sample, and the comparative example sample has a structure in which the released gas from the acrylic resin does not escape to the outside of the comparative example sample.
That is, in the comparative sample, it was found that the gas released from the acrylic resin does not escape to the outside and reaches the transistor through a crack generated in the protective insulating film.

Next, gate voltage (Vg) −drain current (I
d) The characteristics were measured. The Vg-Id characteristics were measured using a transistor having a channel length of 3 μm and a channel width of 3 μm. In the measurement of the Vg-Id characteristic, the drain voltage (
Vd) was set to 1V or 10V, and the gate voltage (Vg) was swept from -20V to 15V.

FIG. 11 shows the Vg-Id characteristics of each sample. Note that the Vg-Id characteristics of 20 transistors were measured as evenly as possible on a 600 mm × 720 mm glass substrate. Note that FIG. 11A shows Vg-Id characteristics and field-effect mobility of the transistor of the example sample.
FIG. 11B shows Vg-Id characteristics of the transistor of the comparative example sample. Note that FIG.
The field-effect mobility shown in FIG. 4 is a value at a drain voltage (Vd) of 10V. In addition, FIG.
In (B), the calculation of the field effect mobility is difficult, so that the description is omitted.

FIG. 11A shows that good switching characteristics can be obtained in the transistor of the example sample. Further, from FIG. 11B, it was found that the transistor of the comparative example sample did not obtain switching characteristics and was always on.

From the comparison with the example sample, it can be understood that the switching characteristic defect of the comparative example sample is due to the gas released from the acrylic resin affecting the transistor. Specifically, it is presumed that the carrier density of the oxide semiconductor film was increased by the influence of the gas released from the acrylic resin, and the transistor could not be turned off by the electric field from the gate electrode.

According to the present embodiment, when the organic resin is covered with a film that does not transmit a release gas such as water and hydrocarbons (here, a silicon nitride film having a thickness of 200 nm), the emission characteristic from the organic resin causes a defective switching characteristic of the transistor. I understand that Also, water covering organic resin,
It can be seen that by providing a passage of the released gas to the outside of the sample in a part of the film that does not transmit the released gas such as hydrocarbons, the switching characteristics of the transistor can be avoided and good switching characteristics can be obtained.

101 first transistor 102 first substrate 103 second transistor 104 gate electrode 105 third transistor 106 gate insulating film 107 capacitor 108 semiconductor layer 110 source electrode 112 drain electrode 113 electrode 114 first interlayer insulating film 116 first Second interlayer insulating film 118 Capacitance electrode 120 Third interlayer insulating film 122 Pixel electrode 124 First alignment film 126 Partition 128 Light emitting layer 130 Electrode 140 Gate driver circuit unit 142 Pixel region 144 Source driver circuit unit 146 FPC terminal unit 148 FPC
150 Liquid crystal element 152 Second substrate 153 Colored film 154 Light shielding film 156 Organic protective insulating film 158 Counter electrode 160 Spacer 162 Liquid crystal layer 164 Second alignment film 166 Sealing material 170 Light emitting element 172 Filling material 4001 First substrate 4002 Photodiode Element 4014 First interlayer insulating film 4016 Second interlayer insulating film 4020 Third interlayer insulating film 4024 First alignment film 4030 First transistor 4032 Capacitor element 4034 Liquid crystal element 4036 Gate line 4040 Transistor 4052 Second substrate 4056 Transistor 4057 Gate selection line 4058 Reset signal line 4059 Video signal line 4060 Second transistor 4062 Third transistor 4071 Output signal line 4084 Second alignment film 4085 Colored film 4086 Organic insulating film 4088 Counter electrode 4 96 Liquid crystal layer 5040 Gate driver circuit portion 5042 Pixel region 8033 Fastener 8034 Switch 8035 Power switch 8036 Switch 8038 Operation switch 8630 Case 8633 Display portion 8631a Display portion 8633b Display portion 8633 Solar cell 8634 Charge / discharge control circuit 8635 Battery 8636 DCDC converter 8637 Converter 9300 Case 9301 Button 9302 Microphone 9303 Display unit 9304 Speaker 9305 Camera 9310 Case 9311 Display unit 9320 Case 9321 Button 9322 Microphone 9323 Display unit

Claims (4)

A pixel region and a drive circuit region;
The pixel region is
A first transistor;
A first insulating film on the first transistor;
A second insulating film on the first insulating film;
A third insulating film on the second insulating film;
A pixel electrode on the third insulating film and electrically connected to the first transistor;
The drive circuit region is
A second transistor;
The first insulating film on the second transistor;
And the second insulating film on the first insulating film,
The first insulating film has an inorganic material,
The second insulating film has an organic material,
The third insulating film has an inorganic material,
The third insulating film is provided on a part of the pixel region;
An end portion of the third insulating film is provided inside the drive circuit region. A pixel region and a drive circuit region;
The pixel region is
A first gate electrode;
A gate insulating film on the first gate electrode;
A first oxide semiconductor film having a region overlapping with the first gate electrode through the gate insulating film;
A first source electrode electrically connected to the first oxide semiconductor film;
A first drain electrode electrically connected to the first oxide semiconductor film;
A first insulating film on the first source electrode and on the first drain electrode;
A second insulating film on the first insulating film;
A third insulating film on the second insulating film;
A pixel electrode on the third insulating film and electrically connected to one of the first source electrode or the first drain electrode;
The drive circuit region is
A second gate electrode;
The gate insulating film on the second gate electrode;
A second oxide semiconductor film having a region overlapping with the second gate electrode through the gate insulating film;
A second source electrode electrically connected to the second oxide semiconductor film;
A second drain electrode electrically connected to the second oxide semiconductor film;
The first insulating film on the second source electrode and on the second drain electrode;
And the second insulating film on the first insulating film,
The first insulating film has an inorganic material,
The second insulating film has an organic material,
The third insulating film has an inorganic material,
The third insulating film is provided on a part of the pixel region;
An end portion of the third insulating film is provided inside the drive circuit region. A pixel region and a drive circuit region;
The pixel region is
A first transistor;
A first insulating film on the first transistor;
A second insulating film on the first insulating film;
A third insulating film on the second insulating film;
A pixel electrode on the third insulating film and electrically connected to the first transistor;
The drive circuit region is
A second transistor;
The first insulating film on the second transistor;
And the second insulating film on the first insulating film,
The first insulating film has an inorganic material,
The second insulating film has an organic material,
The third insulating film has an inorganic material,
The display device, wherein the third insulating film does not overlap with the second transistor. A pixel region and a drive circuit region;
The pixel region is
A first gate electrode;
A gate insulating film on the first gate electrode;
A first oxide semiconductor film having a region overlapping with the first gate electrode through the gate insulating film;
A first source electrode electrically connected to the first oxide semiconductor film;
A first drain electrode electrically connected to the first oxide semiconductor film;
A first insulating film on the first source electrode and on the first drain electrode;
A second insulating film on the first insulating film;
A third insulating film on the second insulating film;
A pixel electrode on the third insulating film and electrically connected to one of the first source electrode or the first drain electrode;
The drive circuit region is
A second gate electrode;
The gate insulating film on the second gate electrode;
A second oxide semiconductor film having a region overlapping with the second gate electrode through the gate insulating film;
A second source electrode electrically connected to the second oxide semiconductor film;
A second drain electrode electrically connected to the second oxide semiconductor film;
The first insulating film on the second source electrode and on the second drain electrode;
And the second insulating film on the first insulating film,
The first insulating film has an inorganic material,
The second insulating film has an organic material,
The third insulating film has an inorganic material,
The display device, wherein the third insulating film does not overlap with the second oxide semiconductor film.