JP6993982B2 - 予めパターン形成されたリソグラフィ・テンプレート、該テンプレートを使用した放射線パターニングに基づくプロセス、及び該テンプレートを形成するためのプロセス - Google Patents

予めパターン形成されたリソグラフィ・テンプレート、該テンプレートを使用した放射線パターニングに基づくプロセス、及び該テンプレートを形成するためのプロセス Download PDF

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JP6993982B2
JP6993982B2 JP2018547903A JP2018547903A JP6993982B2 JP 6993982 B2 JP6993982 B2 JP 6993982B2 JP 2018547903 A JP2018547903 A JP 2018547903A JP 2018547903 A JP2018547903 A JP 2018547903A JP 6993982 B2 JP6993982 B2 JP 6993982B2
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template
hardmask
layer
patterned
buffer
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JP2019514042A (ja
JP2019514042A5 (OSRAM
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ジェイソン・ケイ・ストワーズ
アンドリュー・グレンビル
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Inpria Corp
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Inpria Corp
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0035—Multiple processes, e.g. applying a further resist layer on an already in a previously step, processed pattern or textured surface
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/76—Patterning of masks by imaging
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0002—Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/0042—Photosensitive materials with inorganic or organometallic light-sensitive compounds not otherwise provided for, e.g. inorganic resists
    • G03F7/0043—Chalcogenides; Silicon, germanium, arsenic or derivatives thereof; Metals, oxides or alloys thereof
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/0045—Photosensitive materials with organic non-macromolecular light-sensitive compounds not otherwise provided for, e.g. dissolution inhibitors
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004—Photosensitive materials
    • G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/11—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers having cover layers or intermediate layers, e.g. subbing layers
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/30—Imagewise removal using liquid means
    • G03F7/32—Liquid compositions therefor, e.g. developers
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/30—Imagewise removal using liquid means
    • G03F7/32—Liquid compositions therefor, e.g. developers
    • G03F7/325—Non-aqueous compositions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0338—Process specially adapted to improve the resolution of the mask
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30625—With simultaneous mechanical treatment, e.g. mechanico-chemical polishing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76811—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving multiple stacked pre-patterned masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76813—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving a partial via etch

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Architecture (AREA)
  • Structural Engineering (AREA)
  • Organic Chemistry (AREA)
  • Metallurgy (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Materials For Photolithography (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Drying Of Semiconductors (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
JP2018547903A 2016-03-11 2017-03-10 予めパターン形成されたリソグラフィ・テンプレート、該テンプレートを使用した放射線パターニングに基づくプロセス、及び該テンプレートを形成するためのプロセス Active JP6993982B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201662306979P 2016-03-11 2016-03-11
US62/306,979 2016-03-11
PCT/US2017/021769 WO2017156388A1 (en) 2016-03-11 2017-03-10 Pre-patterned lithography templates, processes based on radiation patterning using the templates and processes to form the templates

Publications (3)

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JP2019514042A JP2019514042A (ja) 2019-05-30
JP2019514042A5 JP2019514042A5 (OSRAM) 2021-08-12
JP6993982B2 true JP6993982B2 (ja) 2022-02-04

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US (2) US10649328B2 (OSRAM)
JP (1) JP6993982B2 (OSRAM)
KR (1) KR102394042B1 (OSRAM)
CN (1) CN108780739B (OSRAM)
TW (1) TWI721125B (OSRAM)
WO (1) WO2017156388A1 (OSRAM)

Families Citing this family (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9176377B2 (en) 2010-06-01 2015-11-03 Inpria Corporation Patterned inorganic layers, radiation based patterning compositions and corresponding methods
US9778561B2 (en) 2014-01-31 2017-10-03 Lam Research Corporation Vacuum-integrated hardmask processes and apparatus
GB201413924D0 (en) 2014-08-06 2014-09-17 Univ Manchester Electron beam resist composition
GB201517273D0 (en) 2015-09-30 2015-11-11 Univ Manchester Resist composition
US10649328B2 (en) 2016-03-11 2020-05-12 Inpria Corporation Pre-patterned lithography templates, processes based on radiation patterning using the templates and processes to form the templates
JP6831452B2 (ja) * 2016-09-13 2021-02-17 グーグル エルエルシーＧｏｏｇｌｅ ＬＬＣ フォトレジスト現像液によるエッチングを防ぐためのバッファ層
US10217633B2 (en) * 2017-03-13 2019-02-26 Globalfoundries Inc. Substantially defect-free polysilicon gate arrays
US10796912B2 (en) 2017-05-16 2020-10-06 Lam Research Corporation Eliminating yield impact of stochastics in lithography
WO2019169122A1 (en) * 2018-03-02 2019-09-06 Tokyo Electron Limited Method to transfer patterns to a layer
KR102716596B1 (ko) * 2018-04-03 2024-10-11 도쿄엘렉트론가부시키가이샤 완전 자기 정렬 방식을 사용하는 서브트랙티브 상호연결부 형성
KR20250159741A (ko) * 2018-04-16 2025-11-11 어플라이드 머티어리얼스, 인코포레이티드 임시 및 영구 접합을 사용하는 다중 적층 광학 요소들
KR102678588B1 (ko) 2018-11-14 2024-06-27 램 리써치 코포레이션 차세대 리소그래피에서 유용한 하드 마스크들을 제조하기 위한 방법들
WO2020132281A1 (en) * 2018-12-20 2020-06-25 Lam Research Corporation Dry development of resists
US12125711B2 (en) 2019-03-18 2024-10-22 Lam Research Corporation Reducing roughness of extreme ultraviolet lithography resists
US12062538B2 (en) 2019-04-30 2024-08-13 Lam Research Corporation Atomic layer etch and selective deposition process for extreme ultraviolet lithography resist improvement
TWI869221B (zh) * 2019-06-26 2025-01-01 美商蘭姆研究公司 利用鹵化物化學品的光阻顯影
EP4651192A2 (en) 2020-01-15 2025-11-19 Lam Research Corporation Underlayer for photoresist adhesion and dose reduction
US12261044B2 (en) 2020-02-28 2025-03-25 Lam Research Corporation Multi-layer hardmask for defect reduction in EUV patterning
JP7700151B2 (ja) * 2020-05-06 2025-06-30 インプリア・コーポレイション 中間凍結工程による有機金属光パターニング可能層を用いたマルチパターニング
US12416863B2 (en) * 2020-07-01 2025-09-16 Applied Materials, Inc. Dry develop process of photoresist
US11621172B2 (en) 2020-07-01 2023-04-04 Applied Materials, Inc. Vapor phase thermal etch solutions for metal oxo photoresists
JP7382512B2 (ja) 2020-07-07 2023-11-16 ラム リサーチ コーポレーション 照射フォトレジストパターニングのための統合乾式プロセス
CN113937182B (zh) * 2020-07-13 2024-07-12 中国科学院理化技术研究所 一种具有柔性基底的尺寸可控的氧化锌基光电器件及其制备方法
US11079682B1 (en) * 2020-11-13 2021-08-03 Tokyo Electron Limited Methods for extreme ultraviolet (EUV) resist patterning development
CN115598943A (zh) 2020-11-13 2023-01-13 朗姆研究公司（Us） 用于干法去除光致抗蚀剂的处理工具
US20220199406A1 (en) * 2020-12-17 2022-06-23 Applied Materials, Inc. Vapor deposition of carbon-doped metal oxides for use as photoresists
US20220262625A1 (en) * 2021-02-18 2022-08-18 Applied Materials, Inc. Chemical vapor condensation deposition of photoresist films
US12494368B2 (en) * 2021-11-12 2025-12-09 Taiwan Semiconductor Manufacturing Co., Ltd. Photoresist and method
EP4435517A4 (en) 2021-11-15 2025-03-19 Nissan Chemical Corporation Polycyclic aromatic hydrocarbon-based light-curable resin composition
TW202409732A (zh) 2022-04-22 2024-03-01 日商日產化學股份有限公司 阻劑下層膜形成用組成物
CN118159914A (zh) 2022-07-01 2024-06-07 朗姆研究公司 用于阻止蚀刻停止的金属氧化物基光致抗蚀剂的循环显影
JP2025526829A (ja) 2022-08-12 2025-08-15 ジェレスト， インコーポレイテッド 不飽和置換基を含有する高純度スズ化合物及びそれを調製する方法
CN119998302A (zh) 2022-10-04 2025-05-13 盖列斯特有限公司 环状氮杂锡烷和环状氧杂锡烷化合物及其制备方法
KR20250121560A (ko) 2022-12-15 2025-08-12 닛산 가가쿠 가부시키가이샤 레지스트 하층막 형성용 조성물
EP4636486A1 (en) 2022-12-15 2025-10-22 Nissan Chemical Corporation Composition for forming resist underlayer film
WO2024157904A1 (ja) 2023-01-23 2024-08-02 日産化学株式会社 金属酸化物レジストパターン形成用有機樹脂組成物
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CN120584325A (zh) 2023-02-09 2025-09-02 日产化学株式会社 抗蚀剂下层膜形成用组合物
EP4657158A1 (en) 2023-02-27 2025-12-03 Nissan Chemical Corporation Resist underlayer film formation composition
JPWO2024181394A1 (OSRAM) 2023-02-28 2024-09-06
JP7769144B2 (ja) 2023-03-17 2025-11-12 ラム リサーチ コーポレーション Ｅｕｖパターニングのための乾式現像およびエッチングプロセスの単一プロセスチャンバへの統合
TW202511058A (zh) 2023-03-24 2025-03-16 日商日產化學股份有限公司 光學繞射體製造用阻劑下層膜形成用組成物
CN119096336B (zh) * 2023-03-29 2025-10-28 京东方科技集团股份有限公司 金属网格的制备方法和天线的制备方法
WO2024204780A1 (ja) 2023-03-30 2024-10-03 日産化学株式会社 レジスト下層膜形成用組成物
TW202442707A (zh) 2023-03-31 2024-11-01 日商日產化學股份有限公司 阻劑下層膜形成用組成物
WO2024232380A1 (ja) 2023-05-09 2024-11-14 日産化学株式会社 レジスト下層膜形成用組成物
CN117364235B (zh) * 2023-12-07 2024-03-26 度亘核芯光电技术(苏州)有限公司 选区外延生长方法及其中使用的掩膜结构

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003303824A (ja) 2002-04-12 2003-10-24 Sony Corp 半導体装置の製造方法
JP2005156576A (ja) 2003-09-16 2005-06-16 Macronix Internatl Co Ltd 集積回路の製造における位置合わせ精度条件を緩和する方法
JP2007281428A (ja) 2006-02-13 2007-10-25 Asml Netherlands Bv デバイス製造方法およびコンピュータプログラム
JP2014239191A (ja) 2013-06-10 2014-12-18 富士通セミコンダクター株式会社 半導体装置の製造方法
JP2016530565A (ja) 2013-08-22 2016-09-29 インプリア・コーポレイションＩｎｐｒｉａ Ｃｏｒｐｏｒａｔｉｏｎ 有機金属溶液に基づいた高解像度パターニング組成物

Family Cites Families (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5302198A (en) 1990-09-14 1994-04-12 Ncr Corporation Coating solution for forming glassy layers
US5270265A (en) * 1992-09-01 1993-12-14 Harris Corporation Stress relief technique of removing oxide from surface of trench-patterned semiconductor-on-insulator structure
JP3198310B2 (ja) 1993-01-06 2001-08-13 株式会社ニコン 露光方法及び装置
KR20030007904A (ko) 2000-06-06 2003-01-23 이케이씨 테크놀로지, 인코포레이티드 전자 재료 제조 방법
US7270886B2 (en) 2000-10-12 2007-09-18 Samsung Electronics Co., Ltd. Spin-on glass composition and method of forming silicon oxide layer in semiconductor manufacturing process using the same
US6368982B1 (en) * 2000-11-15 2002-04-09 Advanced Micro Devices, Inc. Pattern reduction by trimming a plurality of layers of different handmask materials
US20020157418A1 (en) 2001-03-19 2002-10-31 Rahul Ganguli Process for reducing or eliminating bubble defects in sol-gel silica glass
US7160746B2 (en) 2001-07-27 2007-01-09 Lightwave Microsystems Corporation GeBPSG top clad for a planar lightwave circuit
US7037639B2 (en) * 2002-05-01 2006-05-02 Molecular Imprints, Inc. Methods of manufacturing a lithography template
US7348281B2 (en) * 2003-09-19 2008-03-25 Brewer Science Inc. Method of filling structures for forming via-first dual damascene interconnects
KR100583957B1 (ko) 2003-12-03 2006-05-26 삼성전자주식회사 희생금속산화막을 채택하여 이중다마신 금속배선을형성하는 방법
JP4839723B2 (ja) 2005-08-10 2011-12-21 富士電機株式会社 保護膜形成方法およびその保護膜を備えた磁気記録媒体
JP4699140B2 (ja) 2005-08-29 2011-06-08 東京応化工業株式会社 パターン形成方法
US7572572B2 (en) * 2005-09-01 2009-08-11 Micron Technology, Inc. Methods for forming arrays of small, closely spaced features
US20070166648A1 (en) * 2006-01-17 2007-07-19 International Business Machines Corporation Integrated lithography and etch for dual damascene structures
US20070190762A1 (en) 2006-02-13 2007-08-16 Asml Netherlands B.V. Device manufacturing method and computer program product
KR100790999B1 (ko) * 2006-10-17 2008-01-03 삼성전자주식회사 더블 패터닝 공정을 이용하는 반도체 소자의 미세 패턴형성 방법
US8907456B2 (en) * 2007-03-21 2014-12-09 Olambda, Inc. Multi-material hard mask or prepatterned layer for use with multi-patterning photolithography
US20090131295A1 (en) * 2007-11-16 2009-05-21 Hua Cui Compositions for Removal of Metal Hard Mask Etching Residues from a Semiconductor Substrate
KR100933868B1 (ko) * 2008-03-10 2009-12-24 주식회사 하이닉스반도체 마스크 패턴 형성 방법
US9176377B2 (en) 2010-06-01 2015-11-03 Inpria Corporation Patterned inorganic layers, radiation based patterning compositions and corresponding methods
JP5558327B2 (ja) * 2010-12-10 2014-07-23 株式会社東芝 パターン形成方法、半導体装置の製造方法およびテンプレートの製造方法
KR101732936B1 (ko) * 2011-02-14 2017-05-08 삼성전자주식회사 반도체 소자의 미세 패턴 형성 방법
KR20120092950A (ko) 2011-02-14 2012-08-22 에스케이하이닉스 주식회사 리소그래피-리소그래피-식각 공정에서의 오버레이 버니어 형성 방법
WO2012118847A2 (en) * 2011-02-28 2012-09-07 Inpria Corportion Solution processible hardmarks for high resolusion lithography
US9684234B2 (en) 2011-03-24 2017-06-20 Uchicago Argonne, Llc Sequential infiltration synthesis for enhancing multiple-patterning lithography
US8409965B2 (en) * 2011-04-26 2013-04-02 Taiwan Semiconductor Manufacturing Company, Ltd. Method and structure for LED with nano-patterned substrate
JP2012253056A (ja) * 2011-05-31 2012-12-20 Toshiba Corp 半導体装置の製造方法
TWI492298B (zh) * 2011-08-26 2015-07-11 Applied Materials Inc 雙重圖案化蝕刻製程
EP2766920B1 (en) 2011-10-10 2020-12-02 Brewer Science, Inc. Spin-on carbon compositions for lithographic processing
US9452574B2 (en) * 2011-12-19 2016-09-27 Canon Nanotechnologies, Inc. Fabrication of seamless large area master templates for imprint lithography using step and repeat tools
US8551690B2 (en) * 2012-01-20 2013-10-08 Micron Technology, Inc. Methods of forming patterns
US8916337B2 (en) * 2012-02-22 2014-12-23 International Business Machines Corporation Dual hard mask lithography process
US8703386B2 (en) 2012-02-27 2014-04-22 International Business Machines Corporation Metal peroxo compounds with organic co-ligands for electron beam, deep UV and extreme UV photoresist applications
KR102121081B1 (ko) * 2012-04-16 2020-06-18 브레우어 사이언스 인코포레이션 유도된 자기-조립을 위한 실리콘 하드마스크 층
JP6028384B2 (ja) * 2012-05-07 2016-11-16 大日本印刷株式会社 ナノインプリントリソグラフィ用テンプレートの製造方法
US8647981B1 (en) * 2012-08-31 2014-02-11 Micron Technology, Inc. Methods of forming patterns, and methods of forming integrated circuitry
US9679095B1 (en) 2013-02-19 2017-06-13 Mentor Graphics, A Siemens Business Layout decomposition for multiple patterning lithography
US9005875B2 (en) * 2013-03-15 2015-04-14 Intel Corporation Pre-patterned hard mask for ultrafast lithographic imaging
US9176373B2 (en) 2013-07-31 2015-11-03 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for decomposition of a single photoresist mask pattern into 3 photoresist mask patterns
US9372402B2 (en) 2013-09-13 2016-06-21 The Research Foundation For The State University Of New York Molecular organometallic resists for EUV
JP2016541119A (ja) 2013-12-05 2016-12-28 東京エレクトロン株式会社 直流重ね合わせフリーズ
US20150234272A1 (en) 2014-02-14 2015-08-20 Intel Corporation Metal oxide nanoparticles and photoresist compositions
KR101860249B1 (ko) 2014-02-23 2018-05-21 도쿄엘렉트론가부시키가이샤 다수의 패터닝된 층을 교차시켜 패턴 밀도를 증가시키는 방법
KR102696070B1 (ko) 2014-10-23 2024-08-16 인프리아 코포레이션 유기 금속 용액 기반의 고해상도 패터닝 조성물 및 상응하는 방법
KR102346372B1 (ko) 2015-10-13 2021-12-31 인프리아 코포레이션 유기주석 옥사이드 하이드록사이드 패터닝 조성물, 전구체 및 패터닝
US9996004B2 (en) * 2015-11-20 2018-06-12 Lam Research Corporation EUV photopatterning of vapor-deposited metal oxide-containing hardmasks
US10649328B2 (en) 2016-03-11 2020-05-12 Inpria Corporation Pre-patterned lithography templates, processes based on radiation patterning using the templates and processes to form the templates
TWI804224B (zh) 2016-08-12 2023-06-01 美商英培雅股份有限公司 減少邊緣珠區域中來自含金屬光阻劑之金屬殘留物的方法
US11098070B2 (en) 2017-11-20 2021-08-24 Inpria Corporation Organotin clusters, solutions of organotin clusters, and application to high resolution patterning
TW202523764A (zh) 2018-04-05 2025-06-16 美商英培雅股份有限公司 包含錫化合物的輻射可圖案化塗層及其應用
WO2020210660A1 (en) 2019-04-12 2020-10-15 Inpria Corporation Organometallic photoresist developer compositions and processing methods

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003303824A (ja) 2002-04-12 2003-10-24 Sony Corp 半導体装置の製造方法
JP2005156576A (ja) 2003-09-16 2005-06-16 Macronix Internatl Co Ltd 集積回路の製造における位置合わせ精度条件を緩和する方法
JP2007281428A (ja) 2006-02-13 2007-10-25 Asml Netherlands Bv デバイス製造方法およびコンピュータプログラム
JP2014239191A (ja) 2013-06-10 2014-12-18 富士通セミコンダクター株式会社 半導体装置の製造方法
JP2016530565A (ja) 2013-08-22 2016-09-29 インプリア・コーポレイションＩｎｐｒｉａ Ｃｏｒｐｏｒａｔｉｏｎ 有機金属溶液に基づいた高解像度パターニング組成物

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