JP6753066B2 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 152
- 238000004519 manufacturing process Methods 0.000 title claims description 21
- 238000000034 method Methods 0.000 title claims description 16
- 239000000758 substrate Substances 0.000 claims description 78
- 238000005530 etching Methods 0.000 claims description 15
- 239000012535 impurity Substances 0.000 description 14
- 239000011229 interlayer Substances 0.000 description 9
- 238000001514 detection method Methods 0.000 description 6
- 239000010410 layer Substances 0.000 description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 6
- 229920005591 polysilicon Polymers 0.000 description 6
- 238000002347 injection Methods 0.000 description 5
- 239000007924 injection Substances 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 230000000052 comparative effect Effects 0.000 description 3
- 230000001590 oxidative effect Effects 0.000 description 3
- 238000009413 insulation Methods 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
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- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
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Description
特許文献1 特開2002−270841号公報
Claims (4)
- 半導体基板のおもて面側に素子絶縁膜を形成する絶縁膜形成段階と、
前記素子絶縁膜に溝部を形成する溝部形成段階と、
前記素子絶縁膜の前記溝部に半導体素子を形成する素子形成段階と、
前記絶縁膜形成段階と前記溝部形成段階との間に、前記半導体基板のおもて面にマスク用絶縁膜を形成するマスク形成段階と
を備え、
前記溝部形成段階において、前記溝部を形成するのと同時に前記マスク用絶縁膜に開口を形成する半導体装置の製造方法。 - 前記絶縁膜形成段階において、前記半導体素子よりも前記半導体基板の外側にフィールド絶縁膜を、前記素子絶縁膜と同時に形成する
請求項1に記載の半導体装置の製造方法。 - 前記絶縁膜形成段階よりも前に、前記半導体基板のおもて面に1以上のリセス部を形成するリセス形成段階を更に備え、
前記絶縁膜形成段階において、前記素子絶縁膜の少なくとも一部を前記リセス部に形成する
請求項1または2に記載の半導体装置の製造方法。 - 前記リセス形成段階において、前記リセス部を等方性エッチングで形成する
請求項3に記載の半導体装置の製造方法。
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JP2016022660A JP6753066B2 (ja) | 2016-02-09 | 2016-02-09 | 半導体装置および半導体装置の製造方法 |
US15/390,551 US10026833B2 (en) | 2016-02-09 | 2016-12-26 | Semiconductor device and semiconductor device manufacturing method |
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JP2016022660A JP6753066B2 (ja) | 2016-02-09 | 2016-02-09 | 半導体装置および半導体装置の製造方法 |
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JP6753066B2 true JP6753066B2 (ja) | 2020-09-09 |
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JP7163603B2 (ja) * | 2018-03-20 | 2022-11-01 | 株式会社デンソー | 半導体装置の製造方法 |
JP7099115B2 (ja) * | 2018-07-19 | 2022-07-12 | 株式会社デンソー | 半導体装置 |
JP7115951B2 (ja) * | 2018-09-28 | 2022-08-09 | エイブリック株式会社 | 半導体装置及びその製造方法 |
JP7268330B2 (ja) * | 2018-11-05 | 2023-05-08 | 富士電機株式会社 | 半導体装置および製造方法 |
JP7324603B2 (ja) * | 2019-03-29 | 2023-08-10 | ローム株式会社 | 半導体装置 |
JP7383917B2 (ja) * | 2019-07-11 | 2023-11-21 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP7467918B2 (ja) | 2020-01-09 | 2024-04-16 | 富士電機株式会社 | 半導体装置 |
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JP2002270841A (ja) | 2001-03-13 | 2002-09-20 | Denso Corp | 半導体装置及びその製造方法 |
JP4740523B2 (ja) | 2003-01-27 | 2011-08-03 | ルネサスエレクトロニクス株式会社 | 絶縁ゲート型半導体装置 |
US7109551B2 (en) * | 2003-08-29 | 2006-09-19 | Fuji Electric Holdings Co., Ltd. | Semiconductor device |
US7544545B2 (en) * | 2005-12-28 | 2009-06-09 | Vishay-Siliconix | Trench polysilicon diode |
JP2008028110A (ja) * | 2006-07-20 | 2008-02-07 | Toshiba Corp | 半導体装置 |
JP4994853B2 (ja) * | 2007-01-16 | 2012-08-08 | シャープ株式会社 | 温度センサを組み込んだ電力制御装置及びその製造方法 |
JP5515248B2 (ja) * | 2008-03-26 | 2014-06-11 | 富士電機株式会社 | 半導体装置 |
JP5255305B2 (ja) * | 2008-03-27 | 2013-08-07 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置および半導体集積回路装置の製造方法 |
JP5422167B2 (ja) * | 2008-09-29 | 2014-02-19 | 株式会社日立製作所 | 半導体装置 |
US7989249B2 (en) * | 2009-02-04 | 2011-08-02 | Northrop Grumman Systems Corporation | Method of manufacturing a micro-electrical-mechanical system with thermally isolated active elements |
JP5407438B2 (ja) * | 2009-03-06 | 2014-02-05 | トヨタ自動車株式会社 | 半導体装置 |
JP2010287786A (ja) | 2009-06-12 | 2010-12-24 | Renesas Electronics Corp | 半導体装置 |
JP2011066184A (ja) * | 2009-09-17 | 2011-03-31 | Renesas Electronics Corp | 半導体装置、及びその製造方法 |
JP2012054378A (ja) * | 2010-09-01 | 2012-03-15 | Renesas Electronics Corp | 半導体装置 |
JP5569600B2 (ja) * | 2011-01-17 | 2014-08-13 | 富士電機株式会社 | 半導体装置およびその製造方法 |
KR20120105828A (ko) * | 2011-03-16 | 2012-09-26 | 삼성전자주식회사 | 반도체 발광다이오드 칩, 그 제조방법 및 품질관리방법 |
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JP2017143136A (ja) | 2017-08-17 |
US20170229448A1 (en) | 2017-08-10 |
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