JP6534813B2 - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
- Publication number
- JP6534813B2 JP6534813B2 JP2015002664A JP2015002664A JP6534813B2 JP 6534813 B2 JP6534813 B2 JP 6534813B2 JP 2015002664 A JP2015002664 A JP 2015002664A JP 2015002664 A JP2015002664 A JP 2015002664A JP 6534813 B2 JP6534813 B2 JP 6534813B2
- Authority
- JP
- Japan
- Prior art keywords
- region
- semiconductor device
- semiconductor
- pillar
- conductivity type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims description 180
- 238000004519 manufacturing process Methods 0.000 title claims description 52
- 239000012535 impurity Substances 0.000 claims description 78
- 238000000605 extraction Methods 0.000 claims description 55
- 230000015556 catabolic process Effects 0.000 claims description 28
- 238000000034 method Methods 0.000 claims description 16
- 230000008569 process Effects 0.000 claims description 5
- 230000007423 decrease Effects 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 67
- 239000000758 substrate Substances 0.000 description 31
- 230000002093 peripheral effect Effects 0.000 description 29
- 150000002500 ions Chemical class 0.000 description 26
- 239000011229 interlayer Substances 0.000 description 19
- 229920002120 photoresistant polymer Polymers 0.000 description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 13
- 230000015572 biosynthetic process Effects 0.000 description 13
- 229910052814 silicon oxide Inorganic materials 0.000 description 13
- 239000004020 conductor Substances 0.000 description 10
- 230000006378 damage Effects 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 6
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 5
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 5
- 229910052785 arsenic Inorganic materials 0.000 description 5
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 5
- 229910052796 boron Inorganic materials 0.000 description 5
- 238000002513 implantation Methods 0.000 description 5
- 230000006872 improvement Effects 0.000 description 5
- 238000005468 ion implantation Methods 0.000 description 5
- 229910052698 phosphorus Inorganic materials 0.000 description 5
- 239000011574 phosphorus Substances 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 4
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 230000003071 parasitic effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 238000005224 laser annealing Methods 0.000 description 2
- 238000000059 patterning Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 230000003252 repetitive effect Effects 0.000 description 2
- 238000000638 solvent extraction Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 238000004380 ashing Methods 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 230000012447 hatching Effects 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66727—Vertical DMOS transistors, i.e. VDMOS transistors with a step of recessing the source electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/38—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76237—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823412—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823418—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823487—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0688—Integrated circuits having a three-dimensional layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0688—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions characterised by the particular shape of a junction between semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
- H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
- H01L29/0873—Drain regions
- H01L29/0878—Impurity concentration or distribution
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41741—Source or drain electrodes for field effect devices for vertical or pseudo-vertical devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Composite Materials (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
[構造説明]
図1は、本実施の形態の半導体装置の構成を模式的に示す平面図である。図2は、本実施の形態の半導体装置の構成を示す断面図である。図2に示す断面は、例えば、図1のA−A部と対応する。本実施の形態の半導体装置(半導体素子)は、縦型のパワーMOSFET(Metal Oxide Semiconductor Field Effect Transistor)である。MOSFETは、MISFET(Metal Insulator Semiconductor Field Effect Transistor)と呼ばれることもある。図3は、本実施の形態の半導体装置のp型カラム領域の構成を示す平面図である。
図2に示すように、セル領域CRには、パワーMOSFETが形成されている。このパワーMOSFETは、半導体基板1S(図2においては、n型半導体領域LRに対応する)上のエピタキシャル層EPSの主表面に形成されている。エピタキシャル層EPSは、複数のp型カラム領域(p型ピラー、ピラーともいう)PC1と複数のn型カラム領域(n型ピラー、ピラーともいう)NC1とから成る。p型カラム領域PC1とn型カラム領域NC1とはX方向に交互に配置されている。このようなp型カラム領域PC1とn型カラム領域NC1とが周期的に配置された構造を、スーパージャンクション(Superjunction)構造と言う。図3に示すように、p型カラム領域PC1の上面からの平面視における形状は、ライン状(Y方向に長辺を有する矩形状)である。
図2に示すように、中間領域TRには、ゲート引き出し部GPU、ゲート引き出し電極GPE、ソース引き出し領域SPRおよびソース引き出し電極SPEが形成されている。
図2に示すように、周辺領域PERには、フィールドプレート電極(電極、ダミー電極とも言う)FFPが形成されている。
ここで、本実施の形態においては、セル領域CRのp型カラム領域(PC1)とn型カラム領域(NC1)とが周期的に配置された構造体(スーパージャンクション構造)の下方に、カウンタードープ領域CDが設けられている。このため、セル領域CRのp型カラム領域PC1の下においては、p型不純物が相殺され、実効的なp型不純物濃度が低くなっている。よって、セル領域CRにおいては、p型カラム領域(PC1)の深さが小さくなっている。言い換えれば、セル領域CRのp型カラム領域PC1の深さ(Z方向の寸法、TCR)は、中間領域TRのp型カラム領域PC2の深さ(Z方向の寸法、TTR)より小さくなっている(浅くなっている、TCR<TTR)。なお、周辺領域PERのp型カラム領域PC3の深さ(Z方向の寸法、TPER)は、中間領域TRのp型カラム領域PC2の深さ(Z方向の寸法、TTR)と同程度である。また、セル領域CRのn型カラム領域NC1の深さ(Z方向の寸法)、中間領域TRのn型カラム領域NC2の深さ(Z方向の寸法)および周辺領域PERのn型カラム領域NC3の深さ(Z方向の寸法)は、同程度である。
次いで、図4〜図21を参照しながら、本実施の形態の半導体装置の製造方法を説明するとともに、本実施の形態の半導体装置の構成をより明確にする。図4〜図21は、本実施の形態の半導体装置の製造工程を示す断面図または平面図である。本実施の形態の半導体装置は、いわゆる「トレンチフィル法」と呼ばれる方法を用いて製造される。
本実施の形態においては、様々な応用例について説明する。なお、実施の形態1等と同様の部位には同一または関連する符号を付し、その繰り返しの説明は省略する。
図24は、本実施の形態の応用例1の半導体装置の構成を示す平面図であり、図25は、本実施の形態の応用例1の半導体装置の構成を示す断面図である。
図26は、本実施の形態の応用例2の半導体装置の構成を示す平面図であり、図27は、本実施の形態の応用例2の半導体装置の他の構成を示す平面図である。
図28は、本実施の形態の応用例3の半導体装置の構成を示す断面図である。図28に示すように、カウンタードープ領域CDの厚さを変化させてもよい。ここでは、セル領域CRの中央部から外周部へ向かうにしたがってカウンタードープ領域CDの厚さを小さくしている。これにより、セル領域CRのp型カラム領域PC1の深さ(Z方向の寸法、TCR)が、中間領域TRの方向へ向かうにしたがって徐々に大きくなる。
図29は、本実施の形態の応用例4の半導体装置の構成を示す平面図である。
BC ボディコンタクト領域
CD カウンタードープ領域
CH チャネル領域
CR セル領域
DE ドレイン電極
DT1 溝
DT2 溝
DT3 溝
EP エピタキシャル層
EPI エピタキシャル層
EPS エピタキシャル層
FFP フィールドプレート電極
GE ゲート電極
GOX ゲート絶縁膜
GPE ゲート引き出し電極
GPU ゲート引き出し部
IL 層間絶縁膜
LR n型半導体領域
M 遮蔽マスク
NC1 n型カラム領域
NC2 n型カラム領域
NC3 n型カラム領域
PAS 表面保護膜
PC1 p型カラム領域
PC2 p型カラム領域
PC3 p型カラム領域
PER 周辺領域
PF1 導体膜
PR フォトレジスト膜
SE ソース電極
SPE ソース引き出し電極
SPR ソース引き出し領域
SR ソース領域
TR 中間領域
Claims (11)
- 第1領域と前記第1領域を囲む第2領域と有する半導体層と、
前記第1領域の前記半導体層中に形成された第1導電型の複数の第1ピラーおよび前記第1導電型と逆導電型の第2導電型の複数の第2ピラーと、
前記第1領域の半導体層の上方に形成された半導体素子と、
前記第2領域の前記半導体層中に形成された前記第1導電型の複数の第3ピラーおよび前記第2導電型の複数の第4ピラーと、
を有し、
前記第1ピラーと前記第2ピラーは交互に配置され、
前記第3ピラーと前記第4ピラーは交互に配置され、
前記第1ピラーは、前記半導体層中に形成された第1溝中に配置され、
前記第3ピラーは、前記半導体層中に形成された第2溝中に配置され、
前記第1溝中の前記第1導電型の領域の深さである前記第1ピラーの深さは、前記第2溝中の前記第1導電型の領域の深さである前記第3ピラーの深さより小さく、
前記第1領域において、前記第1ピラーと前記第2ピラーが交互に配置された領域の下に、前記第2導電型が注入された半導体領域を有し、
前記半導体領域において、前記第1ピラーの下の前記半導体領域の前記第1導電型の不純物の濃度は、前記第1ピラーの前記第1導電型の不純物の濃度より低く、
前記第1領域の外周部へ向かうにしたがって前記半導体領域の厚さが小さくなる、半導体装置。 - 請求項1記載の半導体装置において、
前記第1領域の前記半導体層の上方に形成された半導体素子は、複数の単位セルを有し、
前記単位セルは、
前記第2ピラー上にゲート絶縁膜を介して配置されたゲート電極と、
前記ゲート電極の一方の側に位置する前記第1ピラーの上部に配置されたソース領域と、を有する、半導体装置。 - 請求項2記載の半導体装置において、
前記複数の単位セルのソース領域は、前記単位セルの上方に配置されたソース電極と接続されている、半導体装置。 - 請求項3記載の半導体装置において、
前記第2領域の前記半導体層の上方に配置されたゲート引き出し部と、
前記第2領域の前記半導体層の上部に配置されたソース引き出し領域と、
を有し、
前記ゲート引き出し部は、前記ゲート電極と接続され、
前記ソース引き出し領域は、前記ソース領域と接続されている、半導体装置。 - 請求項4記載の半導体装置において、
前記ゲート引き出し部と接続されるゲート引き出し電極と、
前記ソース引き出し領域と接続されるソース引き出し電極と、
を有し、
前記ゲート引き出し電極と、前記ソース引き出し領域とは、前記第2領域に配置されている、半導体装置。 - 請求項1記載の半導体装置において、
前記第1領域のアバランシェ降伏電圧は、前記第2領域のアバランシェ降伏電圧よりも低い、半導体装置。 - 請求項1記載の半導体装置において、
前記第2領域を囲む第3領域の前記半導体層中に形成された前記第1導電型の複数の第5ピラーおよび前記第2導電型の複数の第6ピラーを有し、
前記第5ピラーは、前記半導体層中に形成された第3溝中に配置され、
前記第1溝中の前記第1導電型の領域の深さである前記第1ピラーの深さは、前記第3溝中の前記第1導電型の領域の深さである前記第5ピラーの深さより小さい、半導体装置。 - 請求項7記載の半導体装置において、
前記第3領域の前記半導体層上に形成された電極を有する、半導体装置。 - (a)第1導電型の半導体層の第1領域に複数の第1溝を形成し、前記半導体層の前記第1領域を囲む第2領域に複数の第2溝を形成する工程、
(b)前記第1溝および第2溝中に、前記第1導電型と逆導電型の第2導電型の半導体を埋め込むことにより、
(b1)前記第1溝中に第1ピラーを形成するとともに、前記第1ピラー間の前記半導体層よりなる第2ピラーを形成し、
(b2)前記第2溝中に第3ピラーを形成するとともに、前記第3ピラー間の前記半導体層よりなる第4ピラーを形成する工程、
(c)前記第1領域に、半導体素子を形成する工程、
(d)前記第1溝中の前記第1ピラーの下部に、前記第1導電型の不純物を注入する工程、
を有し、
前記(d)工程は、前記半導体層の前記第1溝の底部側を上面とし、前記第2領域をマスクで覆った状態で、前記第1導電型の不純物を注入することにより半導体領域を形成する工程であり、
前記(d)工程により、前記第1溝中の前記第1導電型の領域の深さである前記第1ピラーの深さは、前記第2溝中の前記第1導電型の領域の深さである前記第3ピラーの深さより小さくなり、かつ、前記第1領域の外周部へ向かうにしたがって前記半導体領域の厚さが小さくなる、半導体装置の製造方法。 - 請求項9記載の半導体装置の製造方法において、
前記(c)工程は、
(c1)前記第2ピラー上にゲート絶縁膜を介してゲート電極を形成する工程、
(c2)前記第2ピラーの一方の側に位置する前記第1ピラーの上部にソース領域を形成する工程、
を有する、半導体装置の製造方法。 - 請求項10記載の半導体装置の製造方法において、
(e)前記ソース領域と接続されるソース電極を形成する工程を有する、半導体装置の製造方法。
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015002664A JP6534813B2 (ja) | 2015-01-08 | 2015-01-08 | 半導体装置および半導体装置の製造方法 |
EP15190523.9A EP3043388B1 (en) | 2015-01-08 | 2015-10-20 | Semiconductor device and manufacturing method for the semiconductor device |
US14/965,899 US9905644B2 (en) | 2015-01-08 | 2015-12-11 | Semiconductor device and manufacturing method for the semiconductor device |
CN201510977440.7A CN105789308B (zh) | 2015-01-08 | 2015-12-23 | 半导体器件及其制造方法 |
TW104144132A TW201635550A (zh) | 2015-01-08 | 2015-12-29 | 半導體裝置及半導體裝置之製造方法 |
KR1020160000846A KR20160085707A (ko) | 2015-01-08 | 2016-01-05 | 반도체 장치 및 반도체 장치의 제조 방법 |
US15/869,023 US10204987B2 (en) | 2015-01-08 | 2018-01-11 | Semiconductor device and manufacturing method for the semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015002664A JP6534813B2 (ja) | 2015-01-08 | 2015-01-08 | 半導体装置および半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2016127245A JP2016127245A (ja) | 2016-07-11 |
JP6534813B2 true JP6534813B2 (ja) | 2019-06-26 |
Family
ID=54337191
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2015002664A Active JP6534813B2 (ja) | 2015-01-08 | 2015-01-08 | 半導体装置および半導体装置の製造方法 |
Country Status (6)
Country | Link |
---|---|
US (2) | US9905644B2 (ja) |
EP (1) | EP3043388B1 (ja) |
JP (1) | JP6534813B2 (ja) |
KR (1) | KR20160085707A (ja) |
CN (1) | CN105789308B (ja) |
TW (1) | TW201635550A (ja) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6375176B2 (ja) * | 2014-08-13 | 2018-08-15 | ルネサスエレクトロニクス株式会社 | 半導体装置および半導体装置の製造方法 |
CN106816468B (zh) | 2015-11-30 | 2020-07-10 | 无锡华润上华科技有限公司 | 具有resurf结构的横向扩散金属氧化物半导体场效应管 |
JP2017117882A (ja) * | 2015-12-22 | 2017-06-29 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
US11222962B2 (en) * | 2016-05-23 | 2022-01-11 | HUNTECK SEMICONDUCTOR (SHANGHAI) CO. Ltd. | Edge termination designs for super junction device |
JP6531731B2 (ja) * | 2016-07-21 | 2019-06-19 | 株式会社デンソー | 半導体装置 |
DE102016114389B3 (de) | 2016-08-03 | 2017-11-23 | Infineon Technologies Austria Ag | Halbleitervorrichtung mit Driftzone und rückseitigem Emitter und Verfahren zur Herstellung |
JP6713885B2 (ja) * | 2016-09-09 | 2020-06-24 | ルネサスエレクトロニクス株式会社 | 半導体装置および半導体装置の製造方法 |
CN108428632B (zh) * | 2017-02-15 | 2021-03-12 | 深圳尚阳通科技有限公司 | 超结器件的制造方法 |
JP6850659B2 (ja) * | 2017-03-31 | 2021-03-31 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
CN107591451A (zh) * | 2017-08-31 | 2018-01-16 | 上海华虹宏力半导体制造有限公司 | 超结器件 |
DE102018132237A1 (de) * | 2018-12-14 | 2020-06-18 | Infineon Technologies Ag | Leistungshalbleitervorrichtung |
JP7505217B2 (ja) * | 2019-05-15 | 2024-06-25 | 富士電機株式会社 | 超接合半導体装置および超接合半導体装置の製造方法 |
CN111883585B (zh) * | 2020-08-21 | 2024-02-06 | 上海华虹宏力半导体制造有限公司 | 超结器件 |
KR20220028679A (ko) * | 2020-08-31 | 2022-03-08 | 주식회사 디비하이텍 | 수퍼 정션 반도체 장치 및 이의 제조 방법 |
JP7492415B2 (ja) | 2020-09-18 | 2024-05-29 | 株式会社東芝 | 半導体装置 |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4843843B2 (ja) * | 2000-10-20 | 2011-12-21 | 富士電機株式会社 | 超接合半導体素子 |
JP3899231B2 (ja) * | 2000-12-18 | 2007-03-28 | 株式会社豊田中央研究所 | 半導体装置 |
DE10205345B9 (de) * | 2001-02-09 | 2007-12-20 | Fuji Electric Co., Ltd., Kawasaki | Halbleiterbauelement |
JP4839519B2 (ja) * | 2001-03-15 | 2011-12-21 | 富士電機株式会社 | 半導体装置 |
JP4126915B2 (ja) * | 2002-01-30 | 2008-07-30 | 富士電機デバイステクノロジー株式会社 | 半導体装置 |
JP3931138B2 (ja) * | 2002-12-25 | 2007-06-13 | 三菱電機株式会社 | 電力用半導体装置及び電力用半導体装置の製造方法 |
JP5342752B2 (ja) * | 2006-05-16 | 2013-11-13 | 株式会社東芝 | 半導体装置 |
US7737469B2 (en) | 2006-05-16 | 2010-06-15 | Kabushiki Kaisha Toshiba | Semiconductor device having superjunction structure formed of p-type and n-type pillar regions |
DE102006025218B4 (de) * | 2006-05-29 | 2009-02-19 | Infineon Technologies Austria Ag | Leistungshalbleiterbauelement mit Ladungskompensationsstruktur und Verfahren zur Herstellung desselben |
JP2009004668A (ja) * | 2007-06-25 | 2009-01-08 | Toshiba Corp | 半導体装置 |
US7911023B2 (en) * | 2007-11-06 | 2011-03-22 | Denso Corporation | Semiconductor apparatus including a double-sided electrode element and method for manufacturing the same |
JP4844605B2 (ja) * | 2008-09-10 | 2011-12-28 | ソニー株式会社 | 半導体装置 |
US8466510B2 (en) * | 2009-10-30 | 2013-06-18 | Alpha And Omega Semiconductor Incorporated | Staggered column superjunction |
JP5235960B2 (ja) * | 2010-09-10 | 2013-07-10 | 株式会社東芝 | 電力用半導体装置及びその製造方法 |
TWI407568B (zh) * | 2010-11-22 | 2013-09-01 | Sinopower Semiconductor Inc | 半導體元件 |
JP5999748B2 (ja) * | 2011-08-12 | 2016-09-28 | ルネサスエレクトロニクス株式会社 | パワーmosfet、igbtおよびパワーダイオード |
CN103000665B (zh) * | 2011-09-08 | 2015-08-19 | 上海华虹宏力半导体制造有限公司 | 超级结器件及制造方法 |
JP5754425B2 (ja) * | 2011-09-27 | 2015-07-29 | 株式会社デンソー | 半導体装置 |
CN105789271B (zh) * | 2011-09-27 | 2019-01-01 | 株式会社电装 | 半导体器件 |
US20130200499A1 (en) * | 2012-02-03 | 2013-08-08 | Inergy Technology Inc. | Semiconductor device |
US9496331B2 (en) * | 2012-12-07 | 2016-11-15 | Denso Corporation | Semiconductor device having vertical MOSFET with super junction structure, and method for manufacturing the same |
US8975136B2 (en) * | 2013-02-18 | 2015-03-10 | Infineon Technologies Austria Ag | Manufacturing a super junction semiconductor device |
TW201438232A (zh) * | 2013-03-26 | 2014-10-01 | Anpec Electronics Corp | 半導體功率元件及其製作方法 |
US9041096B2 (en) * | 2013-04-16 | 2015-05-26 | Rohm Co., Ltd. | Superjunction semiconductor device and manufacturing method therefor |
CN103618006B (zh) * | 2013-10-30 | 2017-02-01 | 国家电网公司 | 一种快恢复二极管及其制造方法 |
-
2015
- 2015-01-08 JP JP2015002664A patent/JP6534813B2/ja active Active
- 2015-10-20 EP EP15190523.9A patent/EP3043388B1/en active Active
- 2015-12-11 US US14/965,899 patent/US9905644B2/en active Active
- 2015-12-23 CN CN201510977440.7A patent/CN105789308B/zh active Active
- 2015-12-29 TW TW104144132A patent/TW201635550A/zh unknown
-
2016
- 2016-01-05 KR KR1020160000846A patent/KR20160085707A/ko unknown
-
2018
- 2018-01-11 US US15/869,023 patent/US10204987B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
EP3043388B1 (en) | 2023-05-10 |
US10204987B2 (en) | 2019-02-12 |
CN105789308A (zh) | 2016-07-20 |
TW201635550A (zh) | 2016-10-01 |
US20160204192A1 (en) | 2016-07-14 |
US20180158910A1 (en) | 2018-06-07 |
CN105789308B (zh) | 2020-10-16 |
JP2016127245A (ja) | 2016-07-11 |
US9905644B2 (en) | 2018-02-27 |
KR20160085707A (ko) | 2016-07-18 |
EP3043388A1 (en) | 2016-07-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6534813B2 (ja) | 半導体装置および半導体装置の製造方法 | |
US11594613B2 (en) | Sawtooh electric field drift region structure for planar and trench power semiconductor devices | |
TWI388059B (zh) | The structure of gold-oxygen semiconductor and its manufacturing method | |
TWI659534B (zh) | 半導體裝置及半導體裝置之製造方法 | |
JP2015220367A (ja) | 半導体装置およびその製造方法 | |
JP2007042892A (ja) | トレンチ型misfet | |
JP6557123B2 (ja) | 半導体装置の製造方法 | |
US10141397B2 (en) | Semiconductor device and method of manufacturing the same | |
JP7289258B2 (ja) | 半導体装置 | |
JP2006526287A (ja) | 半導体装置のための終端構造及びこの構造の製造方法 | |
KR102400895B1 (ko) | 반도체 장치 및 그 제조 방법 | |
TWI613812B (zh) | 超接面半導體元件 | |
US10217857B2 (en) | Super junction MOSFET and method of manufacturing the same | |
CN115732558A (zh) | 半导体器件及其制造方法 | |
JP2020174170A (ja) | 超接合半導体装置および超接合半導体装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20171120 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20180926 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20181009 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20181207 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20190507 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20190530 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6534813 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |