JP6135528B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP6135528B2 JP6135528B2 JP2014017218A JP2014017218A JP6135528B2 JP 6135528 B2 JP6135528 B2 JP 6135528B2 JP 2014017218 A JP2014017218 A JP 2014017218A JP 2014017218 A JP2014017218 A JP 2014017218A JP 6135528 B2 JP6135528 B2 JP 6135528B2
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- 239000004065 semiconductor Substances 0.000 title claims description 81
- 238000004519 manufacturing process Methods 0.000 title claims description 40
- 238000007689 inspection Methods 0.000 claims description 94
- 229910052751 metal Inorganic materials 0.000 claims description 54
- 239000002184 metal Substances 0.000 claims description 54
- 230000004888 barrier function Effects 0.000 claims description 34
- 238000000034 method Methods 0.000 claims description 27
- 238000009792 diffusion process Methods 0.000 claims description 20
- 229910021332 silicide Inorganic materials 0.000 claims description 18
- 150000002739 metals Chemical class 0.000 claims description 11
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 8
- 238000000059 patterning Methods 0.000 claims 2
- 238000010438 heat treatment Methods 0.000 claims 1
- 239000010410 layer Substances 0.000 description 69
- 229910052782 aluminium Inorganic materials 0.000 description 47
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 47
- 235000012431 wafers Nutrition 0.000 description 33
- 230000008569 process Effects 0.000 description 21
- 238000005259 measurement Methods 0.000 description 18
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 12
- 229910052710 silicon Inorganic materials 0.000 description 12
- 239000010703 silicon Substances 0.000 description 12
- 239000011229 interlayer Substances 0.000 description 9
- 239000000758 substrate Substances 0.000 description 8
- 230000015556 catabolic process Effects 0.000 description 7
- 230000004048 modification Effects 0.000 description 7
- 238000012986 modification Methods 0.000 description 7
- 230000006866 deterioration Effects 0.000 description 6
- 238000000206 photolithography Methods 0.000 description 5
- 238000005520 cutting process Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 3
- 239000004642 Polyimide Substances 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000015654 memory Effects 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000012467 final product Substances 0.000 description 1
- 238000013100 final test Methods 0.000 description 1
- 229910001385 heavy metal Inorganic materials 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
- H01L21/3043—Making grooves, e.g. cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Automation & Control Theory (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Dicing (AREA)
Description
本発明の実施の形態1に係る半導体装置の製造方法について図面を用いて説明する。まず、図1に示すようにウエハプロセスにより半導体ウエハ1を形成する。この半導体ウエハ1には平面四角形状の複数の半導体装置2がダイシング領域3を挟んで行列状に配置されている。
図15は、本発明の実施の形態2に係るインライン検査用モニタを示す上面図である。図16は図15のX−X’に沿った断面図であり、図17は図15のY−Y’に沿った断面図である。実施の形態1のインライン検査用モニタ15に比べて、バリアメタル10c,10dが無い点が異なる。インライン検査を行う際に、シリサイド12c,12dにそれぞれ検査針19a,19bを接触させる。
図21は、本発明の実施の形態3に係るインライン検査用モニタを示す上面図である。図22及び図23は図21のX−X’に沿った断面図である。インライン検査用モニタ15の測定用電極であるアルミ電極11cは、ダイシングブレード20が通過するための溝23を有する。
Claims (5)
- ダイシング領域を挟んで配置された複数の半導体装置と、前記ダイシング領域内に配置されたインライン検査用モニタとを有する半導体ウエハを形成する工程と、
前記半導体ウエハを形成した後に、前記インライン検査用モニタを用いて前記半導体装置のインライン検査を行う工程と、
前記インライン検査の後に、前記ダイシング領域に沿って前記半導体ウエハをダイシングして前記複数の半導体装置を個々に分離する工程とを備え、
前記半導体ウエハを形成する工程は、
前記半導体装置の第1の拡散層と前記インライン検査用モニタの第2の拡散層を同時に形成する工程と、
前記第1及び第2の拡散層上に金属層を同時に形成する工程と、
前記第2の拡散層上の前記金属層の少なくとも一部を除去する工程とを有し、
前記半導体ウエハをダイシングする際に、前記第2の拡散層上において前記金属層を除去した部分をダイシングブレードで切断することを特徴とする半導体装置の製造方法。 - 前記半導体ウエハを形成する工程は、
前記金属層を形成する前に前記第1及び第2の拡散層上にバリアメタルを同時に形成する工程と、
前記バリアメタルをパターニングして前記第1及び第2の拡散層上にそれぞれ配置された第1及び第2のバリアメタルに分離する工程とを有し、
前記インライン検査を行う際に、前記第2のバリアメタルに検査針を接触させることを特徴とする請求項1に記載の半導体装置の製造方法。 - 前記半導体ウエハを形成する工程は、
熱処理を行って前記第1及び第2の拡散層と前記金属層との間にそれぞれ第1及び第2のシリサイドを同時に形成する工程を有し、
前記インライン検査を行う際に、前記第2のシリサイドに検査針を接触させることを特徴とする請求項1に記載の半導体装置の製造方法。 - 前記半導体ウエハを形成する工程は、
前記金属層をパターニングして前記第1及び第2の拡散層上にそれぞれ配置された第1及び第2の金属層に分離する工程と、
前記第2の金属層の一部を除去して前記第2の金属層に溝を形成する工程とを有し、
前記インライン検査を行う際に、前記第2の金属層に検査針を接触させ、
前記半導体ウエハをダイシングする際に、前記溝の部分を前記ダイシングブレードで切断することを特徴とする請求項1に記載の半導体装置の製造方法。 - 前記溝の幅は、前記検査針の直径より小さく、前記ダイシングブレードの幅より大きいことを特徴とする請求項4に記載の半導体装置の製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014017218A JP6135528B2 (ja) | 2014-01-31 | 2014-01-31 | 半導体装置の製造方法 |
US14/486,221 US9406571B2 (en) | 2014-01-31 | 2014-09-15 | Method for manufacturing semiconductor device including inline inspection |
DE102014223787.4A DE102014223787B4 (de) | 2014-01-31 | 2014-11-21 | Verfahren zur Herstellung einer Halbleitervorrichtung |
CN201510050184.7A CN104821292B (zh) | 2014-01-31 | 2015-01-30 | 半导体装置的制造方法 |
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JP2014017218A JP6135528B2 (ja) | 2014-01-31 | 2014-01-31 | 半導体装置の製造方法 |
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JP2015144211A JP2015144211A (ja) | 2015-08-06 |
JP6135528B2 true JP6135528B2 (ja) | 2017-05-31 |
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US (1) | US9406571B2 (ja) |
JP (1) | JP6135528B2 (ja) |
CN (1) | CN104821292B (ja) |
DE (1) | DE102014223787B4 (ja) |
Families Citing this family (2)
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JP6815237B2 (ja) * | 2017-03-16 | 2021-01-20 | 三菱電機株式会社 | 半導体装置 |
CN108933090A (zh) * | 2017-05-26 | 2018-12-04 | 中芯国际集成电路制造(上海)有限公司 | 测试结构的形成方法及功函数的检测方法 |
Family Cites Families (19)
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US4100486A (en) * | 1977-03-11 | 1978-07-11 | International Business Machines Corporation | Monitor for semiconductor diffusion operations |
JPS62261139A (ja) | 1986-05-07 | 1987-11-13 | Nippon Denso Co Ltd | 半導体装置 |
JP2850393B2 (ja) * | 1988-12-15 | 1999-01-27 | 株式会社デンソー | アルミニウム配線及びその製造方法 |
JPH0350732A (ja) | 1989-07-18 | 1991-03-05 | Seiko Epson Corp | 半導体装置 |
JP3563446B2 (ja) * | 1993-07-16 | 2004-09-08 | 富士通株式会社 | 半導体装置の製造方法 |
JPH09213759A (ja) | 1996-01-30 | 1997-08-15 | Sony Corp | 半導体装置 |
JPH09321103A (ja) | 1996-05-29 | 1997-12-12 | Seiko Epson Corp | 高電流プローブ試験用プロービングパッド |
JP2001308036A (ja) | 2000-04-25 | 2001-11-02 | Hitachi Ltd | 半導体装置の製造方法 |
JP2002237473A (ja) * | 2001-02-09 | 2002-08-23 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
JP2003158159A (ja) * | 2001-11-20 | 2003-05-30 | Seiko Epson Corp | 半導体装置、その製造方法及び半導体装置の検査方法 |
JP2006140276A (ja) * | 2004-11-11 | 2006-06-01 | Yamaha Corp | 半導体ウェーハとそれを用いた半導体素子及びチップサイズ・パッケージ並びに半導体ウェーハの製造方法、半導体ウェーハの検査方法 |
US20070111340A1 (en) * | 2005-11-15 | 2007-05-17 | Credence Systems Corporation | Method for in-line testing of semiconductor wafers |
JP2008124437A (ja) * | 2006-10-19 | 2008-05-29 | Matsushita Electric Ind Co Ltd | 半導体ウェハ、その製造方法、および半導体チップの製造方法 |
JP4744463B2 (ja) * | 2007-03-13 | 2011-08-10 | Okiセミコンダクタ株式会社 | 半導体装置の製造方法 |
US8043966B2 (en) * | 2008-04-11 | 2011-10-25 | International Business Machines Corporation | Method for monitoring patterning integrity of etched openings and forming conductive structures with the openings |
JP2013105937A (ja) * | 2011-11-15 | 2013-05-30 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
JP2013171897A (ja) | 2012-02-20 | 2013-09-02 | Renesas Electronics Corp | 半導体装置および半導体装置の製造方法 |
US20130240882A1 (en) | 2012-03-15 | 2013-09-19 | Infineon Technologies Ag | Die, wafer and method of processing a wafer |
JP5805027B2 (ja) | 2012-07-11 | 2015-11-04 | シシド静電気株式会社 | イオン生成装置及び異常放電検知方法 |
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- 2014-01-31 JP JP2014017218A patent/JP6135528B2/ja active Active
- 2014-09-15 US US14/486,221 patent/US9406571B2/en active Active
- 2014-11-21 DE DE102014223787.4A patent/DE102014223787B4/de active Active
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- 2015-01-30 CN CN201510050184.7A patent/CN104821292B/zh active Active
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Publication number | Publication date |
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JP2015144211A (ja) | 2015-08-06 |
CN104821292B (zh) | 2018-02-13 |
US20150221564A1 (en) | 2015-08-06 |
CN104821292A (zh) | 2015-08-05 |
DE102014223787B4 (de) | 2022-11-24 |
US9406571B2 (en) | 2016-08-02 |
DE102014223787A1 (de) | 2015-08-06 |
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