JP5968753B2 - 配線基板 - Google Patents
配線基板 Download PDFInfo
- Publication number
- JP5968753B2 JP5968753B2 JP2012228210A JP2012228210A JP5968753B2 JP 5968753 B2 JP5968753 B2 JP 5968753B2 JP 2012228210 A JP2012228210 A JP 2012228210A JP 2012228210 A JP2012228210 A JP 2012228210A JP 5968753 B2 JP5968753 B2 JP 5968753B2
- Authority
- JP
- Japan
- Prior art keywords
- hole
- protrusion
- wiring board
- capacitor
- core substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09854—Hole or via having special cross-section, e.g. elliptical
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/063—Lamination of preperforated insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012228210A JP5968753B2 (ja) | 2012-10-15 | 2012-10-15 | 配線基板 |
| KR1020130118347A KR20140048042A (ko) | 2012-10-15 | 2013-10-04 | 배선 기판 |
| US14/050,505 US8804361B2 (en) | 2012-10-15 | 2013-10-10 | Wiring substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012228210A JP5968753B2 (ja) | 2012-10-15 | 2012-10-15 | 配線基板 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2014082276A JP2014082276A (ja) | 2014-05-08 |
| JP2014082276A5 JP2014082276A5 (enExample) | 2015-11-05 |
| JP5968753B2 true JP5968753B2 (ja) | 2016-08-10 |
Family
ID=50475136
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012228210A Active JP5968753B2 (ja) | 2012-10-15 | 2012-10-15 | 配線基板 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US8804361B2 (enExample) |
| JP (1) | JP5968753B2 (enExample) |
| KR (1) | KR20140048042A (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR102105403B1 (ko) * | 2013-11-28 | 2020-04-28 | 삼성전기주식회사 | 전자소자 내장 기판 및 그 제조 방법 |
| JP6384118B2 (ja) * | 2014-05-13 | 2018-09-05 | 日立化成株式会社 | 半導体装置の製造方法、半導体装置及び半導体装置製造用部材 |
| KR101591749B1 (ko) | 2014-08-13 | 2016-02-05 | 주식회사 뉴마이크로 | 칼라 샤프심 제조용 식물성 가소제 및 이의 제조방법 |
| KR101591750B1 (ko) | 2014-08-13 | 2016-02-11 | 주식회사 뉴마이크로 | 칼라 샤프심의 제조방법 |
| KR101591751B1 (ko) | 2014-08-13 | 2016-02-05 | 주식회사 뉴마이크로 | 컬러 샤프심 제조용 가공 수지, 및 이의 제조방법 |
| KR101591752B1 (ko) | 2014-08-13 | 2016-02-12 | 주식회사 뉴마이크로 | 칼라 샤프심 |
| KR101609264B1 (ko) | 2014-12-09 | 2016-04-05 | 삼성전기주식회사 | 전자소자 내장 기판 및 그 제조 방법 |
| JP6639934B2 (ja) * | 2016-02-08 | 2020-02-05 | 新光電気工業株式会社 | 配線基板、半導体装置及び配線基板の製造方法 |
| US9743526B1 (en) | 2016-02-10 | 2017-08-22 | International Business Machines Corporation | Wiring board with stacked embedded capacitors and method of making |
| JP6678090B2 (ja) * | 2016-10-04 | 2020-04-08 | 新光電気工業株式会社 | 電子部品内蔵基板及びその製造方法と電子部品装置 |
| TWI694756B (zh) * | 2018-12-27 | 2020-05-21 | 欣興電子股份有限公司 | 一種具有散熱塊的電路板及其製造方法 |
| US11445596B2 (en) | 2018-12-27 | 2022-09-13 | Unimicron Technology Corp. | Circuit board having heat-dissipation block and method of manufacturing the same |
| US20200279814A1 (en) * | 2019-02-28 | 2020-09-03 | Advanced Semiconductor Engineering, Inc. | Wiring structure and method for manufacturing the same |
| US10790241B2 (en) | 2019-02-28 | 2020-09-29 | Advanced Semiconductor Engineering, Inc. | Wiring structure and method for manufacturing the same |
| KR20220001634A (ko) * | 2020-06-30 | 2022-01-06 | 삼성전기주식회사 | 인쇄회로기판 |
| US20250070001A1 (en) * | 2023-08-24 | 2025-02-27 | Qualcomm Incorporated | Device including substrate with passive electronic component embedded therein |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6239485B1 (en) * | 1998-11-13 | 2001-05-29 | Fujitsu Limited | Reduced cross-talk noise high density signal interposer with power and ground wrap |
| EP1771050B1 (en) * | 1999-09-02 | 2011-06-15 | Ibiden Co., Ltd. | Printed circuit board and method of manufacturing printed circuit board |
| JP2005116943A (ja) * | 2003-10-10 | 2005-04-28 | Seiko Epson Corp | プリント配線基板、実装基板モジュール、プリント配線基板の製造方法、およびそれを用いた電気光学装置、電子機器 |
| JP2006073763A (ja) * | 2004-09-01 | 2006-03-16 | Denso Corp | 多層基板の製造方法 |
| JP4882880B2 (ja) | 2007-06-12 | 2012-02-22 | 株式会社デンソー | プリント基板の製造方法およびプリント基板 |
| JP2012079994A (ja) * | 2010-10-05 | 2012-04-19 | Yamaichi Electronics Co Ltd | 部品内蔵プリント配線板およびその製造方法 |
-
2012
- 2012-10-15 JP JP2012228210A patent/JP5968753B2/ja active Active
-
2013
- 2013-10-04 KR KR1020130118347A patent/KR20140048042A/ko not_active Ceased
- 2013-10-10 US US14/050,505 patent/US8804361B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| KR20140048042A (ko) | 2014-04-23 |
| JP2014082276A (ja) | 2014-05-08 |
| US8804361B2 (en) | 2014-08-12 |
| US20140104797A1 (en) | 2014-04-17 |
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