JP5833398B2 - 配線基板及びその製造方法、半導体装置 - Google Patents
配線基板及びその製造方法、半導体装置 Download PDFInfo
- Publication number
- JP5833398B2 JP5833398B2 JP2011213528A JP2011213528A JP5833398B2 JP 5833398 B2 JP5833398 B2 JP 5833398B2 JP 2011213528 A JP2011213528 A JP 2011213528A JP 2011213528 A JP2011213528 A JP 2011213528A JP 5833398 B2 JP5833398 B2 JP 5833398B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- wiring
- hole
- core substrate
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/486—Via connections through the substrate with or without pins
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10378—Interposers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011213528A JP5833398B2 (ja) | 2011-06-27 | 2011-09-28 | 配線基板及びその製造方法、半導体装置 |
| US13/528,987 US9006586B2 (en) | 2011-06-27 | 2012-06-21 | Wiring substrate, its manufacturing method, and semiconductor device |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011142202 | 2011-06-27 | ||
| JP2011142202 | 2011-06-27 | ||
| JP2011213528A JP5833398B2 (ja) | 2011-06-27 | 2011-09-28 | 配線基板及びその製造方法、半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013033894A JP2013033894A (ja) | 2013-02-14 |
| JP2013033894A5 JP2013033894A5 (enExample) | 2014-08-14 |
| JP5833398B2 true JP5833398B2 (ja) | 2015-12-16 |
Family
ID=47361687
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011213528A Active JP5833398B2 (ja) | 2011-06-27 | 2011-09-28 | 配線基板及びその製造方法、半導体装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US9006586B2 (enExample) |
| JP (1) | JP5833398B2 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5602584B2 (ja) * | 2010-10-28 | 2014-10-08 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| US8610280B2 (en) * | 2011-09-16 | 2013-12-17 | Micron Technology, Inc. | Platinum-containing constructions, and methods of forming platinum-containing constructions |
| US20140151095A1 (en) * | 2012-12-05 | 2014-06-05 | Samsung Electro-Mechanics Co., Ltd. | Printed circuit board and method for manufacturing the same |
| JP6013960B2 (ja) * | 2013-03-28 | 2016-10-25 | 京セラ株式会社 | 配線基板 |
| CN104185365B (zh) * | 2013-05-23 | 2018-06-26 | 比亚迪股份有限公司 | 一种线路板及其制备方法 |
| KR102171020B1 (ko) * | 2013-10-16 | 2020-10-29 | 삼성전자주식회사 | 엑스레이 흡수 필터를 갖는 엑스레이 시스템, 반도체 패키지, 및 트레이 |
| JP5994825B2 (ja) | 2014-08-06 | 2016-09-21 | 大日本印刷株式会社 | 貫通電極基板及びその製造方法、並びに貫通電極基板を用いた半導体装置 |
| KR102033317B1 (ko) * | 2014-09-30 | 2019-11-08 | 가부시키가이샤 무라타 세이사쿠쇼 | 다층 기판 |
| JP7266542B2 (ja) * | 2020-02-03 | 2023-04-28 | 株式会社東芝 | 電流測定装置 |
| EP4040926A1 (en) | 2021-02-09 | 2022-08-10 | AT & S Austria Technologie & Systemtechnik Aktiengesellschaft | Component carriers connected by staggered interconnect elements |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60169194A (ja) * | 1984-02-13 | 1985-09-02 | 松下電器産業株式会社 | ハイブリツド集積回路用基板 |
| US4712161A (en) | 1985-03-25 | 1987-12-08 | Olin Corporation | Hybrid and multi-layer circuitry |
| JPH0247892A (ja) * | 1988-08-10 | 1990-02-16 | Hitachi Ltd | セラミック多層配線基板 |
| JPH0797705B2 (ja) * | 1989-07-17 | 1995-10-18 | 日本電気株式会社 | 多層セラミツク基板 |
| JPH06268376A (ja) * | 1993-03-15 | 1994-09-22 | Fujitsu Ltd | 多層回路基板の製造方法 |
| JPH10284836A (ja) * | 1997-04-08 | 1998-10-23 | Hitachi Ltd | セラミック一括積層配線基板及びその製造方法 |
| JP2001308532A (ja) * | 2000-04-25 | 2001-11-02 | Toshiba Chem Corp | プリント配線板およびプリント配線板の製造方法 |
| US20030213617A1 (en) * | 2002-05-20 | 2003-11-20 | Subramanian Karthikeyan | Method and structure of a reducing intra-level and inter-level capacitance of a semiconductor device |
| JP4401070B2 (ja) * | 2002-02-05 | 2010-01-20 | ソニー株式会社 | 半導体装置内蔵多層配線基板及びその製造方法 |
| JP2004193505A (ja) * | 2002-12-13 | 2004-07-08 | Kyocera Corp | 配線基板 |
| KR100537892B1 (ko) | 2003-08-26 | 2005-12-21 | 삼성전자주식회사 | 칩 스택 패키지와 그 제조 방법 |
| EP1677349A4 (en) * | 2004-02-24 | 2010-12-01 | Ibiden Co Ltd | SUBSTRATE FOR MOUNTING A SEMICONDUCTOR |
| JP2007201254A (ja) * | 2006-01-27 | 2007-08-09 | Ibiden Co Ltd | 半導体素子内蔵基板、半導体素子内蔵型多層回路基板 |
| JP2009135321A (ja) * | 2007-11-30 | 2009-06-18 | Shinko Electric Ind Co Ltd | 多層配線基板及びその製造方法ならびに半導体装置 |
| JP5249132B2 (ja) * | 2009-06-03 | 2013-07-31 | 新光電気工業株式会社 | 配線基板 |
| JP5426261B2 (ja) * | 2009-07-17 | 2014-02-26 | 新光電気工業株式会社 | 半導体装置 |
| JP5367523B2 (ja) * | 2009-09-25 | 2013-12-11 | 新光電気工業株式会社 | 配線基板及び配線基板の製造方法 |
| JP5590869B2 (ja) * | 2009-12-07 | 2014-09-17 | 新光電気工業株式会社 | 配線基板及びその製造方法並びに半導体パッケージ |
| JP5413597B2 (ja) | 2010-03-01 | 2014-02-12 | 新光電気工業株式会社 | 配線基板 |
-
2011
- 2011-09-28 JP JP2011213528A patent/JP5833398B2/ja active Active
-
2012
- 2012-06-21 US US13/528,987 patent/US9006586B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US9006586B2 (en) | 2015-04-14 |
| US20120327626A1 (en) | 2012-12-27 |
| JP2013033894A (ja) | 2013-02-14 |
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