JP5656611B2 - 半導体装置及び固体撮像装置 - Google Patents
半導体装置及び固体撮像装置 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 108
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- 238000006243 chemical reaction Methods 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 8
- 239000004020 conductor Substances 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 39
- 239000000758 substrate Substances 0.000 description 18
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 7
- 229920005591 polysilicon Polymers 0.000 description 7
- 239000011229 interlayer Substances 0.000 description 6
- 238000002955 isolation Methods 0.000 description 5
- 238000002161 passivation Methods 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
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- 230000009467 reduction Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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Description
101 信号配線
102a〜102e パッド
104 画素
105 読み出し回路
106 主走査回路
107 出力回路
108 タイミング・ジェネレータ
109 制御回路
110 その他の回路
306a 第2導電部材
306b 第3導電部材
307 第1導電部材
Claims (22)
- 入力パッドと出力パッドとを含む複数のパッドと、第1回路部及び第2回路部と、前記第1回路部の出力ノードと前記第2回路部の入力ノードとを電気的に接続するための配線と、が配された半導体チップを有する半導体装置であって、
前記第1回路部及び前記第2回路部は前記複数のパッドよりも前記半導体チップの内周部に配され、
前記配線は、導電部材を含んで構成され、
前記導電部材の少なくとも一部が、前記複数のパッドに含まれる少なくとも一つのパッドと重なって配されたことを特徴とする半導体装置。 - 前記導電部材は、第1導電部材、第2導電部材、及び第3導電部材を含み、
前記第1導電部材は、前記少なくとも一つのパッドと平面的に重なり、
前記第2導電部材は、前記第1導電部材と前記出力ノードとを電気的に接続し、
前記第3導電部材は、前記第1導電部材と前記入力ノードとを電気的に接続し、
前記第1導電部材は、前記第2導電部材及び前記第3導電部材とは異なる配線層に配され、
前記第1導電部材と、前記少なくとも一つのパッドとの中間の配線層に、前記第1導電部材と平面的に重なった緩衝部が配されたことを特徴とする請求項1に記載の半導体装置。 - 前記半導体装置は、複数の光電変換部と、前記複数の光電変換部からの信号を処理するための信号処理回路と、をさらに有し、
前記複数のパッドが第1方向に沿って配され、
前記複数の光電変換部は前記複数のパッドと並行して前記第1方向に沿って配され、
前記信号処理回路は前記第1回路部及び前記第2回路部を含み、
前記配線は、前記信号または前記信号処理回路を駆動する駆動信号を伝達することを特徴とする請求項2に記載の半導体装置。 - 前記複数のパッドと、前記第1回路部及び前記第2回路部と、が、第1方向に沿って一直線上に配され、
前記少なくとも一つのパッドが、前記第1回路部と前記第2回路部との間に配されたことを特徴とする請求項2または請求項3のいずれかに記載の半導体装置。 - 前記第1回路部及び前記第2回路部が、前記第1方向に沿って配され、
前記第1回路部及び前記第2回路部が、前記複数のパッドと前記複数の光電変換部との間に配されたことを特徴とする請求項3に記載の半導体装置。 - 前記第2回路部が、前記第1回路部と前記複数の光電変換部との間に配され、
前記第2回路部が配された領域の前記第1方向に沿った長さが、前記第1回路部の前記第1方向に沿った長さよりも長いことを特徴とする請求項3または請求項5のいずれかに記載の半導体装置。 - 前記第1回路部はクロック信号を発生する回路を含み、
前記配線は、クロック信号を伝達することを特徴とする請求項2乃至請求項5のいずれか一項に記載の半導体装置。 - 入力パッドと出力パッドとを含む複数のパッドと、回路部と、前記複数のパッドに含まれる第1パッドと前記回路部のノードとを電気的に接続するための配線と、が配された半導体チップを有する半導体装置であって、
前記回路部は前記複数のパッドよりも前記半導体チップの内周部に配され、
前記配線は、導電部材を含んで構成され、
前記導電部材の一部が、前記複数のパッドに含まれる第2パッドと重なって配されたことを特徴とする半導体装置。 - 前記導電部材は、第1導電部材、第2導電部材、及び第3導電部材を含み、
前記第1導電部材は、前記第2パッドと平面的に重なり、
前記第2導電部材は、前記第1導電部材と前記ノードとを電気的に接続し、
前記第3導電部材は、前記第1導電部材と前記第1パッドとを電気的に接続し、
前記第1導電部材は、前記第2導電部材及び前記第3導電部材とは異なる配線層に配され、
前記第1導電部材と、前記第1導電部材と前記第2パッドとの中間の配線層に、前記第1導電部材と平面的に重なった緩衝部が配されたことを特徴とする請求項8に記載の半導体装置。 - 前記半導体装置は、複数の光電変換部と、前記複数の光電変換部からの信号を処理するための信号処理回路と、をさらに有し、
前記複数のパッドが第1方向に沿って配され、
前記複数の光電変換部は前記複数のパッドと並行して前記第1方向に沿って配され、
前記信号処理回路は前記回路部を含み、
前記配線は、前記信号または前記信号処理回路を駆動する駆動信号を伝達することを特徴とする請求項9に記載の半導体装置。 - 前記半導体装置は電源配線をさらに有し、
前記電源配線は導電性の電源配線部材を含んで構成され、
前記複数のパッドは前記電源配線部材と電気的に接続された電源パッドを含み、
前記電源配線部材は前記複数のパッドと同一の層に配され、かつ、前記電源配線部材は前記複数のパッドとは平面的に重ならないように配されたことを特徴とする請求項2乃至請求項7、請求項9、及び請求項10のいずれか一項に記載の半導体装置。 - 前記半導体装置は、第1配線層と、第2配線層と、をさらに有し、
前記複数のパッド、及び前記電源配線部材は、前記第1配線層に配され、
前記配線に含まれる前記第2導電部材及び前記第3導電部材は、前記第2配線層に配され、
前記緩衝部は、前記信号配線の前記第2導電部材及び第3導電部材と同じ材料で形成され、かつ、前記緩衝部は、前記第2配線層に配されたことを特徴とする請求項11に記載の半導体装置。 - 前記第1配線層は最上層の配線層であり、前記第1配線層に配されたパッドの厚さは、前記第2配線層に配された前記第2導電部材、前記第3導電部材、または前記緩衝部の厚さよりも大きいことを特徴とする請求項12に記載の半導体装置。
- 前記第1回路部、または、前記第2回路部にMOSトランジスタが配され、
前記MOSトランジスタのゲート電極と、前記配線を構成する前記導電部材の前記一部とが同じ配線層に配されたことを特徴とする請求項1乃至請求項7のいずれか一項に記載の半導体装置。 - 前記第1回路部、または、前記第2回路部にMOSトランジスタが配され、
前記MOSトランジスタのゲート電極と、前記配線を構成する前記導電部材の前記一部とが同じ材料で形成されたことを特徴とする請求項1乃至請求項7のいずれか一項に記載の半導体装置。 - 前記回路部にMOSトランジスタが配され、
前記MOSトランジスタのゲート電極と、前記配線を構成する前記導電部材の前記一部とが同じ配線層に配されたことを特徴とする請求項8乃至請求項13のいずれか一項に記載の半導体装置。 - 前記回路部にMOSトランジスタが配され、
前記MOSトランジスタのゲート電極と、前記配線を構成する前記導電部材の前記一部とが同じ材料で形成されたことを特徴とする請求項8乃至請求項13のいずれか一項に記載の半導体装置。 - 前記配線を構成する前記導電部材の前記一部の幅が、前記導電部材の前記一部とは異なる部分の幅よりも大きいことを特徴とする請求項1乃至請求項17のいずれか一項に記載の半導体装置。
- 前記少なくとも一つのパッドに供給される電圧が変化する期間と、前記配線に供給される電圧が変化する期間とが、異なる期間であることを特徴とする請求項1乃至請求項18のいずれか一項に記載の半導体装置。
- 前記緩衝部は、導電性の材料で構成され、かつ、電気的にフローティングであることを特徴とする請求項2、または、請求項9に記載の半導体装置。
- 入力パッドと出力パッドとを含む複数のパッドと、第1回路部及び第2回路部と、前記第1回路部の出力ノードと前記第2回路部の入力ノードとを電気的に接続するための配線と、が配された半導体チップを有する半導体装置であって、
前記第1回路部及び前記第2回路部は前記複数のパッドよりも前記半導体チップの内周部に配され、
前記配線は、導電部材を含んで構成され、
前記導電部材の少なくとも一部が、前記複数のパッドに含まれる少なくとも一つのパッドと重なって配され、
前記導電部材は、第1導電部材、第2導電部材、及び第3導電部材を含み、
前記第1導電部材は、前記少なくとも一つのパッドと平面的に重なり、
前記第2導電部材は、前記第1導電部材と前記出力ノードとを電気的に接続し、
前記第3導電部材は、前記第1導電部材と前記入力ノードとを電気的に接続し、
前記第1導電部材は、前記第2導電部材及び前記第3導電部材とは異なる配線層に配されたことを特徴とする半導体装置。 - 入力パッドと出力パッドとを含む複数のパッドと、回路部と、前記複数のパッドに含まれる第1パッドと前記回路部のノードとを電気的に接続するための配線と、が配された半導体チップを有する半導体装置であって、
前記回路部は前記複数のパッドよりも前記半導体チップの内周部に配され、
前記配線は、導電部材を含んで構成され、
前記導電部材の一部が、前記複数のパッドに含まれる第2パッドと重なって配され、
前記導電部材は、第1導電部材、第2導電部材、及び第3導電部材を含み、
前記第1導電部材は、前記第2パッドと平面的に重なり、
前記第2導電部材は、前記第1導電部材と前記ノードとを電気的に接続し、
前記第3導電部材は、前記第1導電部材と前記第1パッドとを電気的に接続し、
前記第1導電部材は、前記第2導電部材及び前記第3導電部材とは異なる配線層に配されたことを特徴とする半導体装置。
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