JP5459987B2 - 半導体基板及び半導体基板の作製方法、半導体装置、電子機器 - Google Patents
半導体基板及び半導体基板の作製方法、半導体装置、電子機器 Download PDFInfo
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- JP5459987B2 JP5459987B2 JP2008166433A JP2008166433A JP5459987B2 JP 5459987 B2 JP5459987 B2 JP 5459987B2 JP 2008166433 A JP2008166433 A JP 2008166433A JP 2008166433 A JP2008166433 A JP 2008166433A JP 5459987 B2 JP5459987 B2 JP 5459987B2
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- crystal semiconductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
- H10D86/021—Manufacture or treatment of multiple TFTs
- H10D86/0214—Manufacture or treatment of multiple TFTs using temporary substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
- H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
- H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
- H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Electromagnetism (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008166433A JP5459987B2 (ja) | 2007-06-26 | 2008-06-25 | 半導体基板及び半導体基板の作製方法、半導体装置、電子機器 |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007167356 | 2007-06-26 | ||
| JP2007167356 | 2007-06-26 | ||
| JP2008166433A JP5459987B2 (ja) | 2007-06-26 | 2008-06-25 | 半導体基板及び半導体基板の作製方法、半導体装置、電子機器 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009033135A JP2009033135A (ja) | 2009-02-12 |
| JP2009033135A5 JP2009033135A5 (enExample) | 2011-06-23 |
| JP5459987B2 true JP5459987B2 (ja) | 2014-04-02 |
Family
ID=40161087
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008166433A Expired - Fee Related JP5459987B2 (ja) | 2007-06-26 | 2008-06-25 | 半導体基板及び半導体基板の作製方法、半導体装置、電子機器 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7867873B2 (enExample) |
| JP (1) | JP5459987B2 (enExample) |
| KR (1) | KR101484296B1 (enExample) |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE10260149A1 (de) * | 2002-12-20 | 2004-07-01 | BSH Bosch und Siemens Hausgeräte GmbH | Vorrichtung zur Bestimmung des Leitwertes von Wäsche, Wäschetrockner und Verfahren zur Verhinderung von Schichtbildung auf Elektroden |
| CN101281912B (zh) | 2007-04-03 | 2013-01-23 | 株式会社半导体能源研究所 | Soi衬底及其制造方法以及半导体装置 |
| JP5490393B2 (ja) * | 2007-10-10 | 2014-05-14 | 株式会社半導体エネルギー研究所 | 半導体基板の製造方法 |
| JP5527956B2 (ja) * | 2007-10-10 | 2014-06-25 | 株式会社半導体エネルギー研究所 | 半導体基板の製造方法 |
| JP5503876B2 (ja) * | 2008-01-24 | 2014-05-28 | 株式会社半導体エネルギー研究所 | 半導体基板の製造方法 |
| JP5548395B2 (ja) * | 2008-06-25 | 2014-07-16 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法 |
| US8741740B2 (en) * | 2008-10-02 | 2014-06-03 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing SOI substrate |
| JP2010114431A (ja) * | 2008-10-10 | 2010-05-20 | Semiconductor Energy Lab Co Ltd | Soi基板の作製方法 |
| JP5338396B2 (ja) * | 2009-03-12 | 2013-11-13 | パナソニック株式会社 | 弾性表面波デバイスの製造方法 |
| KR20120059509A (ko) * | 2009-08-25 | 2012-06-08 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 그 제작 방법 |
| US8324084B2 (en) * | 2010-03-31 | 2012-12-04 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of semiconductor substrate and manufacturing method of semiconductor device |
| JP5917036B2 (ja) | 2010-08-05 | 2016-05-11 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法 |
| TWI500118B (zh) | 2010-11-12 | 2015-09-11 | Semiconductor Energy Lab | 半導體基底之製造方法 |
| JP2012156495A (ja) | 2011-01-07 | 2012-08-16 | Semiconductor Energy Lab Co Ltd | Soi基板の作製方法 |
| US8802534B2 (en) | 2011-06-14 | 2014-08-12 | Semiconductor Energy Laboratory Co., Ltd. | Method for forming SOI substrate and apparatus for forming the same |
| US8735219B2 (en) | 2012-08-30 | 2014-05-27 | Ziptronix, Inc. | Heterogeneous annealing method and device |
| JP5859497B2 (ja) * | 2013-08-22 | 2016-02-10 | 信越化学工業株式会社 | 界面近傍における欠陥密度が低いsos基板の製造方法 |
| JP5859496B2 (ja) * | 2013-08-22 | 2016-02-10 | 信越化学工業株式会社 | 表面欠陥密度が少ないsos基板の製造方法 |
| JP6396852B2 (ja) * | 2015-06-02 | 2018-09-26 | 信越化学工業株式会社 | 酸化物単結晶薄膜を備えた複合ウェーハの製造方法 |
| JP6454606B2 (ja) | 2015-06-02 | 2019-01-16 | 信越化学工業株式会社 | 酸化物単結晶薄膜を備えた複合ウェーハの製造方法 |
| JP6396853B2 (ja) | 2015-06-02 | 2018-09-26 | 信越化学工業株式会社 | 酸化物単結晶薄膜を備えた複合ウェーハの製造方法 |
| US11664357B2 (en) | 2018-07-03 | 2023-05-30 | Adeia Semiconductor Bonding Technologies Inc. | Techniques for joining dissimilar materials in microelectronics |
| KR20220107219A (ko) * | 2019-11-25 | 2022-08-02 | 코닝 인코포레이티드 | 접합 물품 및 이를 형성하는 방법 |
| US11081393B2 (en) * | 2019-12-09 | 2021-08-03 | Infineon Technologies Ag | Method for splitting semiconductor wafers |
| WO2021188846A1 (en) | 2020-03-19 | 2021-09-23 | Invensas Bonding Technologies, Inc. | Dimension compensation control for directly bonded structures |
| CN113541626B (zh) * | 2020-04-21 | 2025-07-22 | 济南晶正电子科技有限公司 | 一种复合单晶压电基板及制备方法 |
| CN111477543A (zh) * | 2020-04-23 | 2020-07-31 | 济南晶正电子科技有限公司 | 一种键合衬底晶圆与单晶压电晶圆的方法及复合单晶压电晶圆基板 |
| US12136691B2 (en) * | 2022-01-18 | 2024-11-05 | Apple Inc. | System with one-way filter over light-emitting elements |
Family Cites Families (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0834198B2 (ja) * | 1990-11-28 | 1996-03-29 | 信越半導体株式会社 | Soi基板における単結晶薄膜層の膜厚制御方法 |
| FR2681472B1 (fr) | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
| JPH05335530A (ja) * | 1992-05-28 | 1993-12-17 | Sony Corp | Soi基板の製造方法 |
| US6534380B1 (en) * | 1997-07-18 | 2003-03-18 | Denso Corporation | Semiconductor substrate and method of manufacturing the same |
| US6014944A (en) * | 1997-09-19 | 2000-01-18 | The United States Of America As Represented By The Secretary Of The Navy | Apparatus for improving crystalline thin films with a contoured beam pulsed laser |
| JPH11163363A (ja) | 1997-11-22 | 1999-06-18 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
| JP2000012864A (ja) | 1998-06-22 | 2000-01-14 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法 |
| US6271101B1 (en) | 1998-07-29 | 2001-08-07 | Semiconductor Energy Laboratory Co., Ltd. | Process for production of SOI substrate and process for production of semiconductor device |
| JP4476390B2 (ja) | 1998-09-04 | 2010-06-09 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP2000124092A (ja) | 1998-10-16 | 2000-04-28 | Shin Etsu Handotai Co Ltd | 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ |
| JP4379943B2 (ja) | 1999-04-07 | 2009-12-09 | 株式会社デンソー | 半導体基板の製造方法および半導体基板製造装置 |
| TW487959B (en) * | 1999-08-13 | 2002-05-21 | Semiconductor Energy Lab | Laser apparatus, laser annealing method, and manufacturing method of a semiconductor device |
| JP4919530B2 (ja) | 1999-08-18 | 2012-04-18 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| US6548370B1 (en) | 1999-08-18 | 2003-04-15 | Semiconductor Energy Laboratory Co., Ltd. | Method of crystallizing a semiconductor layer by applying laser irradiation that vary in energy to its top and bottom surfaces |
| US20010053559A1 (en) * | 2000-01-25 | 2001-12-20 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating display device |
| JP4507395B2 (ja) * | 2000-11-30 | 2010-07-21 | セイコーエプソン株式会社 | 電気光学装置用素子基板の製造方法 |
| TW544938B (en) | 2001-06-01 | 2003-08-01 | Semiconductor Energy Lab | Method of manufacturing a semiconductor device |
| EP2565924B1 (en) * | 2001-07-24 | 2018-01-10 | Samsung Electronics Co., Ltd. | Transfer method |
| US7119365B2 (en) | 2002-03-26 | 2006-10-10 | Sharp Kabushiki Kaisha | Semiconductor device and manufacturing method thereof, SOI substrate and display device using the same, and manufacturing method of the SOI substrate |
| JP2004087097A (ja) * | 2002-06-28 | 2004-03-18 | Victor Co Of Japan Ltd | 光記録媒体 |
| JP4328067B2 (ja) * | 2002-07-31 | 2009-09-09 | アプライド マテリアルズ インコーポレイテッド | イオン注入方法及びsoiウエハの製造方法、並びにイオン注入装置 |
| FR2847075B1 (fr) | 2002-11-07 | 2005-02-18 | Commissariat Energie Atomique | Procede de formation d'une zone fragile dans un substrat par co-implantation |
| JP4759919B2 (ja) | 2004-01-16 | 2011-08-31 | セイコーエプソン株式会社 | 電気光学装置の製造方法 |
| JP5110772B2 (ja) | 2004-02-03 | 2012-12-26 | 株式会社半導体エネルギー研究所 | 半導体薄膜層を有する基板の製造方法 |
| US7410882B2 (en) * | 2004-09-28 | 2008-08-12 | Palo Alto Research Center Incorporated | Method of manufacturing and structure of polycrystalline semiconductor thin-film heterostructures on dissimilar substrates |
| US7148124B1 (en) * | 2004-11-18 | 2006-12-12 | Alexander Yuri Usenko | Method for forming a fragile layer inside of a single crystalline substrate preferably for making silicon-on-insulator wafers |
| US20070281440A1 (en) * | 2006-05-31 | 2007-12-06 | Jeffrey Scott Cites | Producing SOI structure using ion shower |
| KR101440930B1 (ko) * | 2007-04-20 | 2014-09-15 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | Soi 기판의 제작방법 |
-
2008
- 2008-06-03 KR KR20080052126A patent/KR101484296B1/ko not_active Expired - Fee Related
- 2008-06-13 US US12/213,037 patent/US7867873B2/en not_active Expired - Fee Related
- 2008-06-25 JP JP2008166433A patent/JP5459987B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2009033135A (ja) | 2009-02-12 |
| KR20080114512A (ko) | 2008-12-31 |
| KR101484296B1 (ko) | 2015-01-19 |
| US7867873B2 (en) | 2011-01-11 |
| US20090004822A1 (en) | 2009-01-01 |
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