JP5445895B2 - 半導体素子の製造方法 - Google Patents

半導体素子の製造方法 Download PDF

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Publication number
JP5445895B2
JP5445895B2 JP2008166113A JP2008166113A JP5445895B2 JP 5445895 B2 JP5445895 B2 JP 5445895B2 JP 2008166113 A JP2008166113 A JP 2008166113A JP 2008166113 A JP2008166113 A JP 2008166113A JP 5445895 B2 JP5445895 B2 JP 5445895B2
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film
forming
substrate
manufacturing
gate
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Expired - Fee Related
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JP2008166113A
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Japanese (ja)
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JP2009016824A5 (enExample
JP2009016824A (ja
Inventor
東石 申
周遠 李
泰均 金
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2658—Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017—Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0184—Manufacturing their gate sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2008166113A 2007-06-29 2008-06-25 半導体素子の製造方法 Expired - Fee Related JP5445895B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020070064941A KR100846097B1 (ko) 2007-06-29 2007-06-29 반도체 소자의 제조 방법
KR10-2007-0064941 2007-06-29

Publications (3)

Publication Number Publication Date
JP2009016824A JP2009016824A (ja) 2009-01-22
JP2009016824A5 JP2009016824A5 (enExample) 2011-08-04
JP5445895B2 true JP5445895B2 (ja) 2014-03-19

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JP2008166113A Expired - Fee Related JP5445895B2 (ja) 2007-06-29 2008-06-25 半導体素子の製造方法

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US (1) US7732311B2 (enExample)
JP (1) JP5445895B2 (enExample)
KR (1) KR100846097B1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101376260B1 (ko) * 2008-04-14 2014-03-20 삼성전자 주식회사 반도체 소자 및 그 제조 방법
CN102456556A (zh) * 2010-10-18 2012-05-16 中芯国际集成电路制造(上海)有限公司 金属硅化物的形成方法
US9483266B2 (en) 2013-03-15 2016-11-01 Intel Corporation Fusible instructions and logic to provide OR-test and AND-test functionality using multiple test sources
CN118969730B (zh) * 2024-10-16 2025-03-04 物元半导体技术(青岛)有限公司 混合键合方法及混合键合结构

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2889295B2 (ja) * 1989-07-17 1999-05-10 株式会社東芝 半導体装置及びその製造方法
JP3359794B2 (ja) * 1994-08-31 2002-12-24 株式会社半導体エネルギー研究所 半導体装置の作製方法
US6323519B1 (en) * 1998-10-23 2001-11-27 Advanced Micro Devices, Inc. Ultrathin, nitrogen-containing MOSFET sidewall spacers using low-temperature semiconductor fabrication process
JP2000269490A (ja) * 1999-03-16 2000-09-29 Fujitsu Ltd 半導体装置の製造方法
JP4582837B2 (ja) * 1999-09-09 2010-11-17 シャープ株式会社 半導体装置の製造方法
KR100361576B1 (ko) 2000-04-07 2002-11-21 아남반도체 주식회사 반도체 소자의 금속전 절연막 제조 방법
US6534388B1 (en) * 2000-09-27 2003-03-18 Chartered Semiconductor Manufacturing Ltd. Method to reduce variation in LDD series resistance
JP2003077856A (ja) * 2001-06-18 2003-03-14 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JP2004153037A (ja) 2002-10-31 2004-05-27 Renesas Technology Corp 半導体装置の製造方法
JP2004303789A (ja) * 2003-03-28 2004-10-28 Toshiba Corp 半導体装置及びその製造方法
KR100610436B1 (ko) * 2003-12-23 2006-08-08 주식회사 하이닉스반도체 게이트 산화막의 열화 억제 방법
JP2006019366A (ja) * 2004-06-30 2006-01-19 Canon Inc 半導体装置の絶縁膜形成方法
JP2006049779A (ja) * 2004-08-09 2006-02-16 Renesas Technology Corp 半導体装置およびその製造方法
KR20060037776A (ko) * 2004-10-28 2006-05-03 주식회사 하이닉스반도체 원자층증착에 의한 게이트스페이서를 구비하는반도체소자의 제조 방법
KR100668954B1 (ko) 2004-12-15 2007-01-12 동부일렉트로닉스 주식회사 박막트랜지스터 제조 방법
KR20070043108A (ko) * 2005-10-20 2007-04-25 삼성전자주식회사 반도체 장치 제조방법

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Publication number Publication date
KR100846097B1 (ko) 2008-07-14
US7732311B2 (en) 2010-06-08
US20090004800A1 (en) 2009-01-01
JP2009016824A (ja) 2009-01-22

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