JP5368957B2 - 半導体レーザチップの製造方法 - Google Patents
半導体レーザチップの製造方法 Download PDFInfo
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- JP5368957B2 JP5368957B2 JP2009276555A JP2009276555A JP5368957B2 JP 5368957 B2 JP5368957 B2 JP 5368957B2 JP 2009276555 A JP2009276555 A JP 2009276555A JP 2009276555 A JP2009276555 A JP 2009276555A JP 5368957 B2 JP5368957 B2 JP 5368957B2
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- H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
- H01S5/343—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser
- H01S5/34333—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers in AIIIBV compounds, e.g. AlGaAs-laser, InP-based laser with a well layer based on Ga(In)N or Ga(In)P, e.g. blue laser
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- H01S5/00—Semiconductor lasers
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- H01S5/22—Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
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Description
図1および図2は、本発明の第1実施形態による半導体レーザチップの斜視図である。図3は、本発明の第1実施形態による半導体レーザチップを上側から見た平面図である。図4は、本発明の第1実施形態による半導体レーザチップの断面図である。図5および図6は、本発明の第1実施形態による半導体レーザチップの構造を説明するための図である。なお、図4は、図3のA−A線に沿った断面を示している。まず、図1〜図6を参照して、本発明の第1実施形態による半導体レーザチップ100の構造について説明する。
図25は、第1実施形態の変形例による半導体レーザチップの断面図である。次に、図25を参照して、第1実施形態の変形例による半導体レーザチップ100aの構造について説明する。
図27は、本発明の第2実施形態による半導体レーザチップの一部を拡大して示した断面図である。次に、図27を参照して、本発明の第2実施形態による半導体レーザチップ200の構造について説明する。
図33は、本発明の第3実施形態による半導体レーザチップの斜視図である。図34は、図33のB−B線に沿った断面図である。次に、図33および図34を参照して、本発明の第3実施形態による半導体レーザチップ300の構造について説明する。
図36は、本発明の第4実施形態による半導体レーザチップの斜視図である。図37は、図36のC−C線に沿った断面図である。次に、図36および図37を参照して、本発明の第4実施形態による半導体レーザチップ400について説明する。
6 切欠部(第2切欠部)
5a、6a 切欠面
10 基板
10a 表面(一方主面)
10b 裏面(他方主面)
11 下部コンタクト層
12 下部クラッド層
13 下部ガイド層
14 活性層
15 蒸発防止層
16 上部ガイド層
17 上部クラッド層
18 上部コンタクト層
19 リッジ部(電流通路部)
20 光導波路
21 埋め込み層
22 p側電極
23 n側電極(第1金属層)
24、223 金属層(第2金属層)
30 共振器端面
40 側端面
55 溝部
56 劈開補助溝
60 メッキ層
100、100a、200、300、400 半導体レーザチップ
110 ステム(放熱基台)
130 サブマウント
131 トレンチ(段差部)
131a、132a 底面
131b、132b 側壁
132 段差
140 キャップ
150 リードピン
160 ワイヤ
170 ハンダ(放熱材)
Claims (2)
- 基板の表面上に窒化物半導体層を成長させる工程と、
前記窒化物半導体層に電流通路部を形成する工程と、
前記基板の裏面側に、前記電流通路部と平行に溝部を設ける工程と、
前記溝部の側面の少なくとも一部に接するように金属層を形成する工程と、
前記基板の裏面上に接するように前記金属層とは別の金属層を形成する工程と、
前記溝部で前記基板を分離する工程と、
を備え、前記溝部を設ける工程が、レーザスクライブ法を用いて前記溝部を形成する工程を含むとともに、
前記金属層を形成する工程が、スパッタリング法を用いて前記金属層を形成する工程を含み、
前記別の金属層を形成する工程は、前記金属層上に前記別の金属層を形成する工程を含むことを特徴とする、半導体レーザチップの製造方法。 - 基板の表面上に窒化物半導体層を成長させる工程と、
前記窒化物半導体層に電流通路部を形成する工程と、
前記基板の裏面側に、前記電流通路部と平行に溝部を設ける工程と、
前記溝部の側面の少なくとも一部に接するように金属層を形成する工程と、
前記基板の裏面上に接するように前記金属層とは別の金属層を形成する工程と、
前記別の金属層を形成する工程の後に、前記別の金属層上にメッキ層を形成する工程と、
前記溝部で前記基板を分離する工程と、
を備え、前記溝部を設ける工程が、レーザスクライブ法を用いて前記溝部を形成する工程を含むとともに、
前記別の金属層を形成する工程は、前記金属層上に前記別の金属層を形成する工程を含むことを特徴とする、半導体レーザチップの製造方法。
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