JP5363384B2 - 配線基板及びその製造方法 - Google Patents

配線基板及びその製造方法 Download PDF

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Publication number
JP5363384B2
JP5363384B2 JP2010054149A JP2010054149A JP5363384B2 JP 5363384 B2 JP5363384 B2 JP 5363384B2 JP 2010054149 A JP2010054149 A JP 2010054149A JP 2010054149 A JP2010054149 A JP 2010054149A JP 5363384 B2 JP5363384 B2 JP 5363384B2
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JP
Japan
Prior art keywords
substrate
wiring
aluminum
aluminum oxide
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2010054149A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011187863A (ja
JP2011187863A5 (https=
Inventor
智生 山崎
道夫 堀内
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2010054149A priority Critical patent/JP5363384B2/ja
Priority to US13/032,071 priority patent/US8729401B2/en
Publication of JP2011187863A publication Critical patent/JP2011187863A/ja
Publication of JP2011187863A5 publication Critical patent/JP2011187863A5/ja
Application granted granted Critical
Publication of JP5363384B2 publication Critical patent/JP5363384B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/095—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers of vias therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H10W70/635—Through-vias
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10378—Interposers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0315—Oxidising metal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/6875—Shapes or dispositions thereof being on a metallic substrate, e.g. insulated metal substrates [IMS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base
    • Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
JP2010054149A 2010-03-11 2010-03-11 配線基板及びその製造方法 Expired - Fee Related JP5363384B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2010054149A JP5363384B2 (ja) 2010-03-11 2010-03-11 配線基板及びその製造方法
US13/032,071 US8729401B2 (en) 2010-03-11 2011-02-22 Wiring substrate and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010054149A JP5363384B2 (ja) 2010-03-11 2010-03-11 配線基板及びその製造方法

Publications (3)

Publication Number Publication Date
JP2011187863A JP2011187863A (ja) 2011-09-22
JP2011187863A5 JP2011187863A5 (https=) 2013-01-31
JP5363384B2 true JP5363384B2 (ja) 2013-12-11

Family

ID=44558879

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010054149A Expired - Fee Related JP5363384B2 (ja) 2010-03-11 2010-03-11 配線基板及びその製造方法

Country Status (2)

Country Link
US (1) US8729401B2 (https=)
JP (1) JP5363384B2 (https=)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5436963B2 (ja) * 2009-07-21 2014-03-05 新光電気工業株式会社 配線基板及び半導体装置
JP2011151185A (ja) * 2010-01-21 2011-08-04 Shinko Electric Ind Co Ltd 配線基板及び半導体装置
KR101739742B1 (ko) * 2010-11-11 2017-05-25 삼성전자 주식회사 반도체 패키지 및 이를 포함하는 반도체 시스템
TWI434380B (zh) * 2011-03-02 2014-04-11 矽品精密工業股份有限公司 內層散熱板結構暨具內層散熱之多晶片堆疊封裝結構及其製法
CN203151864U (zh) * 2013-03-05 2013-08-21 奥特斯(中国)有限公司 印制电路板
US9226396B2 (en) 2013-03-12 2015-12-29 Invensas Corporation Porous alumina templates for electronic packages
JP5873152B1 (ja) * 2014-09-29 2016-03-01 日本特殊陶業株式会社 配線基板
US9960120B2 (en) * 2015-03-31 2018-05-01 Shinko Electric Industries Co., Ltd. Wiring substrate with buried substrate having linear conductors
JP6600573B2 (ja) * 2015-03-31 2019-10-30 新光電気工業株式会社 配線基板及び半導体パッケージ
JP6741456B2 (ja) * 2016-03-31 2020-08-19 Fdk株式会社 多層回路基板
TWI655739B (zh) * 2018-04-19 2019-04-01 南亞電路板股份有限公司 封裝結構及其形成方法
CN113013125B (zh) * 2019-12-20 2024-07-09 奥特斯奥地利科技与系统技术有限公司 嵌入有在侧向上位于堆叠体的导电结构之间的内插件的部件承载件
US12476223B2 (en) * 2021-03-18 2025-11-18 Taiwan Semiconducotr Manufacturing Company, Ltd. Semiconductor package and method of manufacturing the same

Family Cites Families (19)

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Publication number Priority date Publication date Assignee Title
US3671819A (en) * 1971-01-26 1972-06-20 Westinghouse Electric Corp Metal-insulator structures and method for forming
JPS58141595A (ja) 1982-02-17 1983-08-22 アルプス電気株式会社 回路板の形成方法
JPS58137915A (ja) 1982-02-09 1983-08-16 アルプス電気株式会社 回路板の形成方法
US4463084A (en) 1982-02-09 1984-07-31 Alps Electric Co., Ltd. Method of fabricating a circuit board and circuit board provided thereby
JP3154713B2 (ja) * 1990-03-16 2001-04-09 株式会社リコー 異方性導電膜およびその製造方法
JPH0487213A (ja) * 1990-07-27 1992-03-19 Ricoh Co Ltd 異方性導電膜およびその製造方法
JPH06280093A (ja) * 1991-10-22 1994-10-04 Mitsuteru Kimura アルミニウム陽極酸化物の形成方法
JPH09130013A (ja) * 1995-10-30 1997-05-16 Ibiden Co Ltd プリント配線板の製造方法、多数個どり用基板
JP3587043B2 (ja) * 1998-01-30 2004-11-10 日立電線株式会社 Ｂｇａ型半導体装置及び該装置に用いるスティフナー
JP2003031945A (ja) * 2001-07-19 2003-01-31 Hitachi Ltd 配線基板、配線基板の製造方法、および、電気回路装置
JP2003243783A (ja) * 2002-02-14 2003-08-29 Ngk Spark Plug Co Ltd 配線基板およびその製造方法
JP2004273480A (ja) * 2003-03-05 2004-09-30 Sony Corp 配線基板およびその製造方法および半導体装置
US7868257B2 (en) * 2004-03-09 2011-01-11 Nec Corporation Via transmission lines for multilayer printed circuit boards
KR100656295B1 (ko) * 2004-11-29 2006-12-11 (주)웨이브닉스이에스피 선택적 양극 산화된 금속을 이용한 패키지 및 그 제작방법
TWI343109B (en) * 2007-03-23 2011-06-01 Unimicron Technology Corp Flip-chip substrate using aluminum oxide as its core sunbstrate
US7655292B2 (en) * 2007-04-11 2010-02-02 Kaylu Industrial Corporation Electrically conductive substrate with high heat conductivity
JP5344667B2 (ja) * 2007-12-18 2013-11-20 太陽誘電株式会社 回路基板およびその製造方法並びに回路モジュール
TWI421996B (zh) * 2008-01-10 2014-01-01 財團法人工業技術研究院 靜電放電防護架構
US8008682B2 (en) * 2008-04-04 2011-08-30 Hong Kong Applied Science And Technology Research Institute Co. Ltd. Alumina substrate and method of making an alumina substrate

Also Published As

Publication number Publication date
US8729401B2 (en) 2014-05-20
US20110220404A1 (en) 2011-09-15
JP2011187863A (ja) 2011-09-22

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