JP5355494B2 - 表示装置及びその製造方法 - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims description 31
- 239000000758 substrate Substances 0.000 claims description 62
- 238000005530 etching Methods 0.000 claims description 47
- 238000000034 method Methods 0.000 claims description 31
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 27
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 27
- 230000008569 process Effects 0.000 claims description 23
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 15
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 15
- 239000004973 liquid crystal related substance Substances 0.000 claims description 13
- 239000004065 semiconductor Substances 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 5
- 239000003990 capacitor Substances 0.000 description 23
- 238000002834 transmittance Methods 0.000 description 22
- 239000010408 film Substances 0.000 description 19
- 239000010409 thin film Substances 0.000 description 18
- 239000011159 matrix material Substances 0.000 description 11
- 230000007423 decrease Effects 0.000 description 6
- 238000007789 sealing Methods 0.000 description 6
- 239000003566 sealing material Substances 0.000 description 4
- 239000006185 dispersion Substances 0.000 description 3
- 239000011368 organic material Substances 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- 238000005401 electroluminescence Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 238000004380 ashing Methods 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136213—Storage capacitors associated with the pixel electrode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/13—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body combined with thin-film or thick-film passive components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1216—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/20—Changing the shape of the active layer in the devices, e.g. patterning
- H10K71/231—Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
- G02F2201/40—Arrangements for improving the aperture ratio
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Geometry (AREA)
- Optics & Photonics (AREA)
- Manufacturing & Machinery (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
- Liquid Crystal (AREA)
- Electroluminescent Light Sources (AREA)
- Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
Description
112 バッファ層
114 半導体層
116 第1絶縁層
118a ゲート電極
118b 下部電極
120 第2絶縁層
120a 誘電体層
122 導電層
122a 上部電極
123 エッチングマスク
124 第3絶縁層
126a ソース及びドレイン電極
128 第4絶縁層
130 画素電極
140 ゲートライン
150 データライン
160、240 偏光板
220 カラーフィルタ
230 共通電極
300 液晶層
600 封止基板
700 シール材
1000、2000 表示パネル
C1 キャパシタ
P1、P2 画素
T1 薄膜トランジスタ
Claims (15)
- 第1基板上に位置する第1絶縁層と、
前記第1絶縁層上に位置する下部電極と、
前記下部電極の上面及び側面を囲むように形成された誘電体層と、
前記誘電体層上に位置する上部電極と、
を備え、
シリコン酸化物を含む前記第1絶縁層は、シリコン窒化物を含む前記誘電体層に対してエッチング選択比を有し、
前記誘電体層は前記下部電極の上面および側面にのみ形成されることを特徴とする表示装置。 - 前記誘電体層の側面は、垂直形状(profile)を有することを特徴とする請求項1に記載の表示装置。
- 前記上部電極の側部外郭は、前記下部電極の側部外郭の外側に位置することを特徴とする請求項1に記載の表示装置。
- トランジスタをさらに備え、
前記トランジスタは、
前記第1基板と前記第1絶縁層との間に位置し、チャネル領域、ソース領域、及びドレイン領域を含む半導体層と、
前記第1絶縁層上に前記チャネル領域と重なるように位置するゲート電極と、
前記第1絶縁層上に前記ゲート電極及び前記下部電極を覆って形成される第2絶縁層と、
前記第2絶縁層を貫通して前記ソース領域及びドレイン領域にそれぞれ接続されるソース電極及びドレイン電極とを備えることを特徴とする請求項1に記載の表示装置。 - 前記ソース電極または前記ドレイン電極は、前記上部電極に接続され、
前記第2絶縁層上に形成された第3絶縁層と、
前記第3絶縁層に形成されたビアホールを介して前記ソース電極または前記ドレイン電極に接続された画素電極と、
前記第1基板に対向して配置された第2基板と、
前記第2基板上に形成された共通電極と、
前記第1基板と前記第2基板との間に注入された液晶層とをさらに備えることを特徴とする請求項4に記載の表示装置。 - 前記ソース電極または前記ドレイン電極は、前記上部電極に接続され、
前記第2絶縁層上に形成された第3絶縁層と、
前記第3絶縁層に形成されたビアホールを介して前記ソース電極または前記ドレイン電極に接続された画素電極と、
前記画素電極上に形成され、発光領域の前記画素電極が露出するように開口部が形成された画素定義膜と、
前記発光領域の前記画素電極上に形成された有機発光層と、
前記有機発光層上に形成されたカソード電極とをさらに備え、
前記画素電極は、アノード電極として用いられることを特徴とする請求項4に記載の表示装置。 - 基板上に第1絶縁層を形成するステップと、
前記第1絶縁層上に下部電極を形成するステップと、
前記下部電極を含む前記第1絶縁層上に第2絶縁層を形成するステップと、
前記第2絶縁層上に導電層を形成するステップと、
前記導電層上に前記下部電極の側部外郭より外側に位置する側部外郭を有するエッチングマスクを形成するステップと、
前記エッチングマスクを用いて前記第1絶縁層が露出するまで前記導電層及び前記第2絶縁層にエッチング工程を行い、前記導電層及び前記第2絶縁層をそれぞれ上部電極及び誘電体層に変化させるステップと、を含み、
シリコン酸化物を含む前記第1絶縁層は、シリコン窒化物を含む前記誘電体層に対してエッチング選択比を有し、
前記誘電体層は前記下部電極の上面および側面にのみ形成されることを特徴とする表示装置の製造方法。 - 前記エッチング工程は、エッチバック工程であることを特徴とする請求項7に記載の表示装置の製造方法。
- 前記エッチング工程は、異方性エッチング工程であることを特徴とする請求項7に記載の表示装置の製造方法。
- 前記エッチングマスクは、感光性物質を含むことを特徴とする請求項7に記載の表示装置の製造方法。
- 基板上に第1絶縁層を形成するステップと、
前記第1絶縁層上に下部電極を形成するステップと、
前記下部電極を含む前記第1絶縁層上に第2絶縁層を形成するステップと、
前記第2絶縁層上に前記下部電極と重なる上部電極を形成するステップと、
前記第2絶縁層上に前記上部電極の側壁及び上面を覆い、前記下部電極の側部外郭より外側に位置する側部外郭を有するエッチングマスクを形成するステップと、
前記エッチングマスクを用いて前記第1絶縁層が露出するまで前記第2絶縁層にエッチング工程を行い、前記第2絶縁層を誘電体層に変化させるステップと、を含み、
シリコン酸化物を含む前記第1絶縁層は、シリコン窒化物を含む前記誘電体層に対してエッチング選択比を有し、
前記誘電体層は前記下部電極の上面および側面にのみ形成されることを特徴とする表示装置の製造方法。 - 前記エッチング工程は、エッチバック工程であることを特徴とする請求項11に記載の表示装置の製造方法。
- 前記エッチング工程は、異方性エッチング工程であることを特徴とする請求項11に記載の表示装置の製造方法。
- 前記上部電極の側部外郭は、前記下部電極の側部外郭より外側に位置することを特徴とする請求項7に記載の表示装置の製造方法。
- 前記エッチングマスクは、感光性物質を含むことを特徴とする請求項11に記載の表示装置の製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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KR10-2009-0121773 | 2009-12-09 | ||
KR1020090121773A KR101101087B1 (ko) | 2009-12-09 | 2009-12-09 | 표시 장치 및 그의 제조 방법 |
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JP2011124531A JP2011124531A (ja) | 2011-06-23 |
JP5355494B2 true JP5355494B2 (ja) | 2013-11-27 |
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US (1) | US8390751B2 (ja) |
JP (1) | JP5355494B2 (ja) |
KR (1) | KR101101087B1 (ja) |
CN (1) | CN102096223B (ja) |
TW (1) | TWI424237B (ja) |
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KR101925540B1 (ko) * | 2011-08-04 | 2019-02-28 | 삼성디스플레이 주식회사 | 박막 트랜지스터 어레이 기판, 이를 포함하는 유기 발광 표시 장치 및 그 제조 방법 |
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- 2010-08-03 TW TW099125698A patent/TWI424237B/zh active
- 2010-09-16 CN CN201010287292.3A patent/CN102096223B/zh active Active
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TW201120550A (en) | 2011-06-16 |
KR101101087B1 (ko) | 2011-12-30 |
CN102096223B (zh) | 2015-06-17 |
KR20110064970A (ko) | 2011-06-15 |
CN102096223A (zh) | 2011-06-15 |
TWI424237B (zh) | 2014-01-21 |
US8390751B2 (en) | 2013-03-05 |
US20110134381A1 (en) | 2011-06-09 |
JP2011124531A (ja) | 2011-06-23 |
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