JP5209196B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP5209196B2
JP5209196B2 JP2006301719A JP2006301719A JP5209196B2 JP 5209196 B2 JP5209196 B2 JP 5209196B2 JP 2006301719 A JP2006301719 A JP 2006301719A JP 2006301719 A JP2006301719 A JP 2006301719A JP 5209196 B2 JP5209196 B2 JP 5209196B2
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Japan
Prior art keywords
insulating film
interlayer insulating
film
semiconductor device
manufacturing
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JP2006301719A
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English (en)
Japanese (ja)
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JP2007134712A (ja
JP2007134712A5 (enExample
Inventor
▲ヨン▼ 国 鄭
テ キム アンドリュー
東 石 申
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Publication date
Priority claimed from KR1020050106096A external-priority patent/KR100678636B1/ko
Priority claimed from KR1020060073912A external-priority patent/KR100834737B1/ko
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of JP2007134712A publication Critical patent/JP2007134712A/ja
Publication of JP2007134712A5 publication Critical patent/JP2007134712A5/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76825—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by exposing the layer to particle radiation, e.g. ion implantation, irradiation with UV light or electrons etc.
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/792—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions comprising applied insulating layers, e.g. stress liners
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0184—Manufacturing their gate sidewall spacers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2006301719A 2005-11-07 2006-11-07 半導体装置の製造方法 Active JP5209196B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR1020050106096A KR100678636B1 (ko) 2005-11-07 2005-11-07 반도체 집적 회로 장치의 제조 방법 및 그에 의해 제조된반도체 집적 회로 장치
KR10-2005-0106096 2005-11-07
KR10-2006-0073912 2006-08-04
KR1020060073912A KR100834737B1 (ko) 2006-08-04 2006-08-04 반도체 집적 회로 장치의 제조 방법 및 그에 의해 제조된반도체 집적 회로 장치

Publications (3)

Publication Number Publication Date
JP2007134712A JP2007134712A (ja) 2007-05-31
JP2007134712A5 JP2007134712A5 (enExample) 2009-12-24
JP5209196B2 true JP5209196B2 (ja) 2013-06-12

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JP2006301719A Active JP5209196B2 (ja) 2005-11-07 2006-11-07 半導体装置の製造方法

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US (2) US7867867B2 (enExample)
JP (1) JP5209196B2 (enExample)
TW (1) TWI338335B (enExample)

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JP2007324391A (ja) * 2006-06-01 2007-12-13 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
DE102006030264B4 (de) * 2006-06-30 2008-08-28 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung von Transistoren mit einem Kanal mit biaxialer Verformung, die durch Silizium/Germanium in der Gateelektrode hervorgerufen wird
US20080138983A1 (en) * 2006-12-06 2008-06-12 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming tensile stress films for NFET performance enhancement
US20080206943A1 (en) * 2007-02-26 2008-08-28 Jei-Ming Chen Method of forming strained cmos transistor
JP2008235636A (ja) * 2007-03-22 2008-10-02 Elpida Memory Inc 半導体装置の製造方法及び半導体装置
US7741171B2 (en) * 2007-05-15 2010-06-22 Taiwan Semiconductor Manufacturing Company, Ltd. Oxygen-rich layers underlying BPSG
US8072035B2 (en) 2007-06-11 2011-12-06 Renesas Electronics Corporation Semiconductor device and method of manufacturing the same
JP5280716B2 (ja) * 2007-06-11 2013-09-04 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US7911001B2 (en) 2007-07-15 2011-03-22 Samsung Electronics Co., Ltd. Methods for forming self-aligned dual stress liners for CMOS semiconductor devices
US7858532B2 (en) 2007-08-06 2010-12-28 United Microelectronics Corp. Dielectric layer structure and manufacturing method thereof
US8466508B2 (en) * 2007-10-03 2013-06-18 Macronix International Co., Ltd. Non-volatile memory structure including stress material between stacked patterns
DE102007057686B4 (de) * 2007-11-30 2011-07-28 GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG, 01109 Verfahren und Halbleiterbauelement mit einer Schutzschicht zum Reduzieren der Verspannungsrelaxation in einer Doppelverspannungsbeschichtungstechnik
US8211784B2 (en) * 2009-10-26 2012-07-03 Advanced Ion Beam Technology, Inc. Method for manufacturing a semiconductor device with less leakage current induced by carbon implant
JP5652939B2 (ja) * 2010-07-07 2015-01-14 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
CN102569083B (zh) * 2010-12-23 2014-12-24 中芯国际集成电路制造(上海)有限公司 具有高k金属栅极的金属氧化物半导体的形成方法
US8853862B2 (en) * 2011-12-20 2014-10-07 International Business Machines Corporation Contact structures for semiconductor transistors
US9177803B2 (en) * 2013-03-14 2015-11-03 Globalfoundries Inc. HK/MG process flows for P-type semiconductor devices
US9252271B2 (en) * 2013-11-27 2016-02-02 Taiwan Semiconductor Manufacturing Company Limited Semiconductor device and method of making
KR102292813B1 (ko) * 2015-10-14 2021-08-23 삼성전자주식회사 반도체 장치 및 이의 제조 방법
US10020401B2 (en) 2016-11-29 2018-07-10 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for straining a transistor gate through interlayer dielectric (ILD) doping schemes
FR3076077B1 (fr) * 2017-12-22 2020-02-28 Commissariat A L'energie Atomique Et Aux Energies Alternatives Realisation de transistors a canaux contraints
JP7355752B2 (ja) * 2018-10-05 2023-10-03 株式会社半導体エネルギー研究所 半導体装置の作製方法
CN109686663A (zh) * 2018-12-27 2019-04-26 上海华力微电子有限公司 一种半导体结构及其制造方法
KR102793906B1 (ko) 2020-06-10 2025-04-08 삼성전자주식회사 집적회로 장치

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Publication number Publication date
JP2007134712A (ja) 2007-05-31
US8237202B2 (en) 2012-08-07
TW200729353A (en) 2007-08-01
US20110163386A1 (en) 2011-07-07
TWI338335B (en) 2011-03-01
US20070105297A1 (en) 2007-05-10
US7867867B2 (en) 2011-01-11

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