JP5186550B2 - 電気的相互接続構造体及びその形成方法 - Google Patents

電気的相互接続構造体及びその形成方法 Download PDF

Info

Publication number
JP5186550B2
JP5186550B2 JP2010502479A JP2010502479A JP5186550B2 JP 5186550 B2 JP5186550 B2 JP 5186550B2 JP 2010502479 A JP2010502479 A JP 2010502479A JP 2010502479 A JP2010502479 A JP 2010502479A JP 5186550 B2 JP5186550 B2 JP 5186550B2
Authority
JP
Japan
Prior art keywords
solder
metal core
solderless
solderless metal
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2010502479A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010525558A5 (OSRAM
JP2010525558A (ja
Inventor
ブックウォルター、ステファン、レスリー
ファーマン、ブルース、ケネス
グルーバー、ピーター、アルフレッド
ナ、ジェウーン
シー、ダユアン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JP2010525558A publication Critical patent/JP2010525558A/ja
Publication of JP2010525558A5 publication Critical patent/JP2010525558A5/ja
Application granted granted Critical
Publication of JP5186550B2 publication Critical patent/JP5186550B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H10W74/01
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H10W74/012
    • H10P72/50
    • H10P72/74
    • H10W20/40
    • H10W72/0198
    • H10W72/20
    • H10W72/30
    • H10W74/15
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0364Conductor shape
    • H05K2201/0379Stacked conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands
    • H05K2201/094Array of pads or lands differing from one another, e.g. in size, pitch or thickness; Using different connections on the pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10234Metallic balls
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10242Metallic cylinders
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954Other details of electrical connections
    • H05K2201/10977Encapsulated connections
    • H10P72/7438
    • H10W72/01204
    • H10W72/01215
    • H10W72/01223
    • H10W72/01225
    • H10W72/01231
    • H10W72/01251
    • H10W72/01331
    • H10W72/072
    • H10W72/07234
    • H10W72/07236
    • H10W72/07251
    • H10W72/07253
    • H10W72/07255
    • H10W72/222
    • H10W72/223
    • H10W72/237
    • H10W72/241
    • H10W72/252
    • H10W72/255
    • H10W72/257
    • H10W72/322
    • H10W72/325
    • H10W72/351
    • H10W72/352
    • H10W72/354
    • H10W72/856
    • H10W72/90
    • H10W72/923
    • H10W72/9415
    • H10W72/942
    • H10W90/724
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49165Manufacturing circuit on or in base by forming conductive walled aperture in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Wire Bonding (AREA)
  • Combinations Of Printed Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
JP2010502479A 2007-04-11 2008-03-26 電気的相互接続構造体及びその形成方法 Expired - Fee Related JP5186550B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/733,840 2007-04-11
US11/733,840 US7786001B2 (en) 2007-04-11 2007-04-11 Electrical interconnect structure and method
PCT/EP2008/053527 WO2008125440A1 (en) 2007-04-11 2008-03-26 Electrical interconnect structure and method of forming the same

Publications (3)

Publication Number Publication Date
JP2010525558A JP2010525558A (ja) 2010-07-22
JP2010525558A5 JP2010525558A5 (OSRAM) 2012-08-16
JP5186550B2 true JP5186550B2 (ja) 2013-04-17

Family

ID=39554841

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010502479A Expired - Fee Related JP5186550B2 (ja) 2007-04-11 2008-03-26 電気的相互接続構造体及びその形成方法

Country Status (8)

Country Link
US (4) US7786001B2 (OSRAM)
EP (1) EP2156465B1 (OSRAM)
JP (1) JP5186550B2 (OSRAM)
KR (1) KR20090103886A (OSRAM)
CN (1) CN101652847B (OSRAM)
AT (1) ATE528796T1 (OSRAM)
TW (1) TWI459505B (OSRAM)
WO (1) WO2008125440A1 (OSRAM)

Families Citing this family (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4239310B2 (ja) * 1998-09-01 2009-03-18 ソニー株式会社 半導体装置の製造方法
WO2008093757A1 (ja) * 2007-01-31 2008-08-07 Kyocera Corporation プリプレグシートの製造方法および製造装置ならびにプリプレグシート
US7786001B2 (en) * 2007-04-11 2010-08-31 International Business Machines Corporation Electrical interconnect structure and method
US8043893B2 (en) * 2007-09-14 2011-10-25 International Business Machines Corporation Thermo-compression bonded electrical interconnect structure and method
US7868457B2 (en) * 2007-09-14 2011-01-11 International Business Machines Corporation Thermo-compression bonded electrical interconnect structure and method
JP5045688B2 (ja) * 2009-01-29 2012-10-10 日立金属株式会社 半導体装置
JP5214554B2 (ja) * 2009-07-30 2013-06-19 ラピスセミコンダクタ株式会社 半導体チップ内蔵パッケージ及びその製造方法、並びに、パッケージ・オン・パッケージ型半導体装置及びその製造方法
US8728873B2 (en) * 2010-09-10 2014-05-20 Infineon Technologies Ag Methods for filling a contact hole in a chip package arrangement and chip package arrangements
US8969176B2 (en) * 2010-12-03 2015-03-03 Raytheon Company Laminated transferable interconnect for microelectronic package
US8936967B2 (en) * 2011-03-23 2015-01-20 Intel Corporation Solder in cavity interconnection structures
JP2013074169A (ja) * 2011-09-28 2013-04-22 Kyocera Corp 薄膜配線基板
US9978656B2 (en) * 2011-11-22 2018-05-22 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming fine-pitch copper bump structures
US9128289B2 (en) 2012-12-28 2015-09-08 Pixtronix, Inc. Display apparatus incorporating high-aspect ratio electrical interconnects
US8497579B1 (en) * 2012-02-16 2013-07-30 Chipbond Technology Corporation Semiconductor packaging method and structure thereof
US8809123B2 (en) * 2012-06-05 2014-08-19 Taiwan Semiconductor Manufacturing Company, Ltd. Three dimensional integrated circuit structures and hybrid bonding methods for semiconductor wafers
US9082754B2 (en) 2012-08-03 2015-07-14 International Business Machines Corporation Metal cored solder decal structure and process
US20140071142A1 (en) * 2012-09-13 2014-03-13 Pixtronix, Inc. Display apparatus incorporating vertically oriented electrical interconnects
TWI468086B (zh) * 2012-11-07 2015-01-01 環旭電子股份有限公司 電子裝置、系統級封裝模組及系統級封裝模組的製造方法
US10020275B2 (en) * 2013-12-26 2018-07-10 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductive packaging device and manufacturing method thereof
JP6303535B2 (ja) * 2014-01-27 2018-04-04 富士通株式会社 電子部品の製造方法及び電子装置の製造方法
US10170444B2 (en) 2015-06-30 2019-01-01 Taiwan Semiconductor Manufacturing Company, Ltd. Packages for semiconductor devices, packaged semiconductor devices, and methods of packaging semiconductor devices
US9953908B2 (en) * 2015-10-30 2018-04-24 International Business Machines Corporation Method for forming solder bumps using sacrificial layer
US9793232B1 (en) * 2016-01-05 2017-10-17 International Business Machines Corporation All intermetallic compound with stand off feature and method to make
KR102420126B1 (ko) 2016-02-01 2022-07-12 삼성전자주식회사 반도체 소자
US10177099B2 (en) * 2016-04-07 2019-01-08 Advanced Semiconductor Engineering, Inc. Semiconductor package structure, package on package structure and packaging method
US10297575B2 (en) 2016-05-06 2019-05-21 Amkor Technology, Inc. Semiconductor device utilizing an adhesive to attach an upper package to a lower die
CN109121319A (zh) * 2018-08-21 2019-01-01 北京无线电测量研究所 微波子阵三维堆叠的焊球塌陷控制方法、设备和存储介质
JP7251951B2 (ja) * 2018-11-13 2023-04-04 新光電気工業株式会社 半導体装置及び半導体装置の製造方法
CN112885802A (zh) * 2019-11-29 2021-06-01 长鑫存储技术有限公司 半导体结构及其制造方法
US12107065B2 (en) 2020-07-17 2024-10-01 International Business Machines Corporation Uniform chip gaps via injection-molded solder pillars
US20250014975A1 (en) * 2023-07-06 2025-01-09 Amkor Technology Singapore Holding Pte. Ltd. Electronic devices and methods of manufacturing electronic devices

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5244143A (en) 1992-04-16 1993-09-14 International Business Machines Corporation Apparatus and method for injection molding solder and applications thereof
US6025258A (en) * 1994-01-20 2000-02-15 Fujitsu Limited Method for fabricating solder bumps by forming solder balls with a solder ball forming member
JP2581456B2 (ja) * 1994-06-27 1997-02-12 日本電気株式会社 部品の接続構造及びその製造方法
US5736074A (en) * 1995-06-30 1998-04-07 Micro Fab Technologies, Inc. Manufacture of coated spheres
US5872051A (en) * 1995-08-02 1999-02-16 International Business Machines Corporation Process for transferring material to semiconductor chip conductive pads using a transfer substrate
TW335544B (en) * 1996-03-18 1998-07-01 Olin Corp Improved solder joint reliability
US5775569A (en) 1996-10-31 1998-07-07 Ibm Corporation Method for building interconnect structures by injection molded solder and structures built
US20020106832A1 (en) * 1996-11-26 2002-08-08 Gregory B. Hotchkiss Method and apparatus for attaching solder members to a substrate
US6335571B1 (en) 1997-07-21 2002-01-01 Miguel Albert Capote Semiconductor flip-chip package and method for the fabrication thereof
AU8502798A (en) * 1997-07-21 1999-02-10 Aguila Technologies, Inc. Semiconductor flip-chip package and method for the fabrication thereof
JP3420917B2 (ja) * 1997-09-08 2003-06-30 富士通株式会社 半導体装置
US5956606A (en) * 1997-10-31 1999-09-21 Motorola, Inc. Method for bumping and packaging semiconductor die
US6105852A (en) 1998-02-05 2000-08-22 International Business Machines Corporation Etched glass solder bump transfer for flip chip integrated circuit devices
JP3230487B2 (ja) * 1998-04-20 2001-11-19 住友金属工業株式会社 三次元パッケージおよびその製造方法
US6158644A (en) * 1998-04-30 2000-12-12 International Business Machines Corporation Method for enhancing fatigue life of ball grid arrays
US6426564B1 (en) * 1999-02-24 2002-07-30 Micron Technology, Inc. Recessed tape and method for forming a BGA assembly
US6458622B1 (en) 1999-07-06 2002-10-01 Motorola, Inc. Stress compensation composition and semiconductor component formed using the stress compensation composition
US6664621B2 (en) * 2000-05-08 2003-12-16 Tessera, Inc. Semiconductor chip package with interconnect structure
TWI248842B (en) * 2000-06-12 2006-02-11 Hitachi Ltd Semiconductor device and semiconductor module
US7242099B2 (en) * 2001-03-05 2007-07-10 Megica Corporation Chip package with multiple chips connected by bumps
US7053491B2 (en) * 2002-02-04 2006-05-30 Intel Corporation Electronic assembly having composite electronic contacts for attaching a package substrate to a printed circuit board
JP2003258029A (ja) * 2002-02-27 2003-09-12 Matsushita Electric Ind Co Ltd 電子部品実装方法および電子部品実装構造
US7087458B2 (en) 2002-10-30 2006-08-08 Advanpack Solutions Pte. Ltd. Method for fabricating a flip chip package with pillar bump and no flow underfill
US6919420B2 (en) 2002-12-05 2005-07-19 International Business Machines Corporation Acid-cleavable acetal and ketal based epoxy oligomers
JP2004356138A (ja) * 2003-05-27 2004-12-16 Sharp Corp 配線基板の積層構造
TWM244577U (en) * 2003-08-14 2004-09-21 Via Tech Inc Bump transfer fixture
US7786001B2 (en) * 2007-04-11 2010-08-31 International Business Machines Corporation Electrical interconnect structure and method
US7868457B2 (en) * 2007-09-14 2011-01-11 International Business Machines Corporation Thermo-compression bonded electrical interconnect structure and method

Also Published As

Publication number Publication date
EP2156465B1 (en) 2011-10-12
ATE528796T1 (de) 2011-10-15
EP2156465A1 (en) 2010-02-24
TW200849470A (en) 2008-12-16
KR20090103886A (ko) 2009-10-01
JP2010525558A (ja) 2010-07-22
US20100230474A1 (en) 2010-09-16
US8242010B2 (en) 2012-08-14
US8541299B2 (en) 2013-09-24
WO2008125440A1 (en) 2008-10-23
US20100230143A1 (en) 2010-09-16
US20100230475A1 (en) 2010-09-16
US7786001B2 (en) 2010-08-31
CN101652847A (zh) 2010-02-17
TWI459505B (zh) 2014-11-01
US8476773B2 (en) 2013-07-02
CN101652847B (zh) 2011-11-02
US20080251281A1 (en) 2008-10-16

Similar Documents

Publication Publication Date Title
JP5186550B2 (ja) 電気的相互接続構造体及びその形成方法
US8541291B2 (en) Thermo-compression bonded electrical interconnect structure and method
US8164192B2 (en) Thermo-compression bonded electrical interconnect structure
JP3554695B2 (ja) 半導体集積回路におけるハンダ相互接続を製造する方法および半導体集積回路を製造する方法
US8264085B2 (en) Semiconductor device package interconnections
TWI478254B (zh) 引線上凸塊之倒裝晶片互連
TWI567864B (zh) 在基板上形成高繞線密度互連位置的半導體裝置及方法
US20030060000A1 (en) Wiring board and fabricating method thereof, semiconductor device and fabricating method thereof, circuit board and electronic instrument
JP2004538619A (ja) バンプのない積層配線構造を有する超小型電子パッケージ
CN107078118A (zh) 插入器到封装基板的耦合
JP4629912B2 (ja) はんだバンプの形成方法
US8183697B2 (en) Apparatus and methods of forming an interconnect between a workpiece and substrate
US20010013655A1 (en) Methods of making microelectronic connections with liquid conductive elements
CN1225791C (zh) 半导体构装与其制造方法
CN107516638A (zh) 一种扇出型封装方法

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20101124

RD12 Notification of acceptance of power of sub attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7432

Effective date: 20120524

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20120524

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120628

A871 Explanation of circumstances concerning accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A871

Effective date: 20120628

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20120808

A975 Report on accelerated examination

Free format text: JAPANESE INTERMEDIATE CODE: A971005

Effective date: 20120831

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120904

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20121128

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20121225

RD14 Notification of resignation of power of sub attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7434

Effective date: 20121225

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20130121

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20160125

Year of fee payment: 3

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R360 Written notification for declining of transfer of rights

Free format text: JAPANESE INTERMEDIATE CODE: R360

R360 Written notification for declining of transfer of rights

Free format text: JAPANESE INTERMEDIATE CODE: R360

R371 Transfer withdrawn

Free format text: JAPANESE INTERMEDIATE CODE: R371

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees