JP5140029B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP5140029B2
JP5140029B2 JP2009083786A JP2009083786A JP5140029B2 JP 5140029 B2 JP5140029 B2 JP 5140029B2 JP 2009083786 A JP2009083786 A JP 2009083786A JP 2009083786 A JP2009083786 A JP 2009083786A JP 5140029 B2 JP5140029 B2 JP 5140029B2
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JP
Japan
Prior art keywords
mlut
wiring
address
circuit
data
Prior art date
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Expired - Fee Related
Application number
JP2009083786A
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English (en)
Japanese (ja)
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JP2010239325A5 (enExample
JP2010239325A (ja
Inventor
哲夫 弘中
一哉 谷川
博昭 戸口
直樹 平川
隆 石黒
正幸 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
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Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP2009083786A priority Critical patent/JP5140029B2/ja
Priority to PCT/JP2010/055029 priority patent/WO2010113713A1/ja
Priority to CN201080013413.3A priority patent/CN102369668B/zh
Priority to US13/255,846 priority patent/US8283945B2/en
Publication of JP2010239325A publication Critical patent/JP2010239325A/ja
Publication of JP2010239325A5 publication Critical patent/JP2010239325A5/ja
Application granted granted Critical
Publication of JP5140029B2 publication Critical patent/JP5140029B2/ja
Expired - Fee Related legal-status Critical Current
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17736—Structural details of routing resources
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17724—Structural details of logic blocks
    • H03K19/17728—Reconfigurable logic blocks, e.g. lookup tables
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/1778—Structural details for adapting physical parameters
    • H03K19/17792—Structural details for adapting physical parameters for operating speed

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  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Logic Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP2009083786A 2009-03-30 2009-03-30 半導体装置 Expired - Fee Related JP5140029B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2009083786A JP5140029B2 (ja) 2009-03-30 2009-03-30 半導体装置
PCT/JP2010/055029 WO2010113713A1 (ja) 2009-03-30 2010-03-24 半導体装置
CN201080013413.3A CN102369668B (zh) 2009-03-30 2010-03-24 半导体装置
US13/255,846 US8283945B2 (en) 2009-03-30 2010-03-24 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009083786A JP5140029B2 (ja) 2009-03-30 2009-03-30 半導体装置

Publications (3)

Publication Number Publication Date
JP2010239325A JP2010239325A (ja) 2010-10-21
JP2010239325A5 JP2010239325A5 (enExample) 2011-12-15
JP5140029B2 true JP5140029B2 (ja) 2013-02-06

Family

ID=42828008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009083786A Expired - Fee Related JP5140029B2 (ja) 2009-03-30 2009-03-30 半導体装置

Country Status (4)

Country Link
US (1) US8283945B2 (enExample)
JP (1) JP5140029B2 (enExample)
CN (1) CN102369668B (enExample)
WO (1) WO2010113713A1 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011162116A1 (ja) 2010-06-24 2011-12-29 太陽誘電株式会社 半導体装置
JP5890733B2 (ja) * 2012-04-09 2016-03-22 太陽誘電株式会社 再構成可能な半導体装置の配置配線方法、そのプログラム、及び配置配線装置
JP5822772B2 (ja) 2012-04-11 2015-11-24 太陽誘電株式会社 再構成可能な半導体装置
US9350357B2 (en) 2012-10-28 2016-05-24 Taiyo Yuden Co., Ltd. Reconfigurable semiconductor device
JP6250548B2 (ja) * 2012-11-20 2017-12-20 太陽誘電株式会社 再構成可能な半導体装置の論理構成方法
US9762865B2 (en) * 2013-03-15 2017-09-12 James Carey Video identification and analytical recognition system
US9425800B2 (en) 2013-04-02 2016-08-23 Taiyo Yuden Co., Ltd. Reconfigurable logic device
JP6306846B2 (ja) * 2013-09-16 2018-04-04 太陽誘電株式会社 再構成可能な論理デバイス
US9423452B2 (en) 2013-12-03 2016-08-23 Taiwan Semiconductor Manufacturing Company, Ltd. Contactless signal testing
US9923561B2 (en) * 2014-10-22 2018-03-20 Taiyo Yuden Co., Ltd. Reconfigurable device
JP6390683B2 (ja) * 2016-09-28 2018-09-19 ミツミ電機株式会社 半導体集積回路

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0220923A (ja) * 1988-07-08 1990-01-24 Fujitsu Ltd プログラマブル・ロジック・デバイス
JPH11238850A (ja) * 1998-02-19 1999-08-31 Toshiba Corp 半導体集積回路
JP3471628B2 (ja) 1998-05-12 2003-12-02 日本電信電話株式会社 書き換え可能な論理回路およびラッチ回路
US6150838A (en) * 1999-02-25 2000-11-21 Xilinx, Inc. FPGA configurable logic block with multi-purpose logic/memory circuit
US6215327B1 (en) * 1999-09-01 2001-04-10 The United States Of America As Represented By The Secretary Of The Air Force Molecular field programmable gate array
JP3517839B2 (ja) 2000-11-29 2004-04-12 日本電信電話株式会社 プログラマブルセルアレイ回路
US6331788B1 (en) * 2001-07-03 2001-12-18 The United States Of America As Represented By The Secretary Of The Air Force Simplified cellular array structure for programmable Boolean networks
US6777977B1 (en) * 2002-05-01 2004-08-17 Actel Corporation Three input field programmable gate array logic circuit configurable as a three input look up table, a D-latch or a D flip-flop
JP4226383B2 (ja) * 2003-04-23 2009-02-18 株式会社ミツトヨ 測長装置
US7102387B1 (en) * 2004-12-08 2006-09-05 The United States Of America As Represented By The Secretary Of The Air Force Periodic computation structure based on 1-input lookup tables
US20090290444A1 (en) * 2005-11-28 2009-11-26 Masayuki Satoh Semiconductor device
US7632745B2 (en) * 2007-06-30 2009-12-15 Intel Corporation Hybrid high-k gate dielectric film
US8010590B1 (en) * 2007-07-19 2011-08-30 Xilinx, Inc. Configurable arithmetic block and a method of implementing a configurable arithmetic block in a device having programmable logic
US7816946B1 (en) * 2008-01-31 2010-10-19 Actel Corporation Inverting flip-flop for use in field programmable gate arrays

Also Published As

Publication number Publication date
CN102369668A (zh) 2012-03-07
JP2010239325A (ja) 2010-10-21
CN102369668B (zh) 2014-09-17
US20120007635A1 (en) 2012-01-12
WO2010113713A1 (ja) 2010-10-07
US8283945B2 (en) 2012-10-09

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