JP5110995B2 - 積層型半導体装置及びその製造方法 - Google Patents

積層型半導体装置及びその製造方法 Download PDF

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Publication number
JP5110995B2
JP5110995B2 JP2007190030A JP2007190030A JP5110995B2 JP 5110995 B2 JP5110995 B2 JP 5110995B2 JP 2007190030 A JP2007190030 A JP 2007190030A JP 2007190030 A JP2007190030 A JP 2007190030A JP 5110995 B2 JP5110995 B2 JP 5110995B2
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Prior art keywords
semiconductor element
electrode terminal
metal wire
semiconductor
stacked
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Expired - Fee Related
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JP2007190030A
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Japanese (ja)
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JP2009027039A (ja
JP2009027039A5 (enExample
Inventor
茂 水野
孝 栗原
晶紀 白石
啓 村山
光敏 東
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2007190030A priority Critical patent/JP5110995B2/ja
Priority to US12/174,192 priority patent/US20090020887A1/en
Priority to TW097127083A priority patent/TW200905766A/zh
Priority to KR1020080069978A priority patent/KR20090009737A/ko
Publication of JP2009027039A publication Critical patent/JP2009027039A/ja
Publication of JP2009027039A5 publication Critical patent/JP2009027039A5/ja
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JP2007190030A 2007-07-20 2007-07-20 積層型半導体装置及びその製造方法 Expired - Fee Related JP5110995B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2007190030A JP5110995B2 (ja) 2007-07-20 2007-07-20 積層型半導体装置及びその製造方法
US12/174,192 US20090020887A1 (en) 2007-07-20 2008-07-16 Semiconductor apparatus and manufacturing method thereof
TW097127083A TW200905766A (en) 2007-07-20 2008-07-17 Semiconductor apparatus and manufacturing method thereof
KR1020080069978A KR20090009737A (ko) 2007-07-20 2008-07-18 반도체장치 및 그 제조방법

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Application Number Priority Date Filing Date Title
JP2007190030A JP5110995B2 (ja) 2007-07-20 2007-07-20 積層型半導体装置及びその製造方法

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JP2009027039A JP2009027039A (ja) 2009-02-05
JP2009027039A5 JP2009027039A5 (enExample) 2010-05-27
JP5110995B2 true JP5110995B2 (ja) 2012-12-26

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US (1) US20090020887A1 (enExample)
JP (1) JP5110995B2 (enExample)
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TW (1) TW200905766A (enExample)

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US8178978B2 (en) 2008-03-12 2012-05-15 Vertical Circuits, Inc. Support mounted electrically interconnected die assembly
US9153517B2 (en) 2008-05-20 2015-10-06 Invensas Corporation Electrical connector between die pad and z-interconnect for stacked die assemblies
US7863159B2 (en) 2008-06-19 2011-01-04 Vertical Circuits, Inc. Semiconductor die separation method
WO2010068699A2 (en) * 2008-12-09 2010-06-17 Vertical Circuits, Inc. Semiconductor die interconnect formed by aerosol application of electrically conductive material
JP5112275B2 (ja) * 2008-12-16 2013-01-09 新光電気工業株式会社 半導体装置及び半導体装置の製造方法
JP5136449B2 (ja) * 2009-02-06 2013-02-06 富士通株式会社 半導体装置の製造方法
JP5215244B2 (ja) * 2009-06-18 2013-06-19 新光電気工業株式会社 半導体装置
KR101088822B1 (ko) 2009-08-10 2011-12-01 주식회사 하이닉스반도체 반도체 패키지
US9147583B2 (en) 2009-10-27 2015-09-29 Invensas Corporation Selective die electrical insulation by additive process
TWI544604B (zh) 2009-11-04 2016-08-01 英維瑟斯公司 具有降低應力電互連的堆疊晶粒總成
KR102099878B1 (ko) * 2013-07-11 2020-04-10 삼성전자 주식회사 반도체 패키지
US9490195B1 (en) 2015-07-17 2016-11-08 Invensas Corporation Wafer-level flipped die stacks with leadframes or metal foil interconnects
US9871019B2 (en) 2015-07-17 2018-01-16 Invensas Corporation Flipped die stack assemblies with leadframe interconnects
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