JP5047529B2 - 微細コンタクトを備える半導体素子及びその製造方法 - Google Patents

微細コンタクトを備える半導体素子及びその製造方法 Download PDF

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Publication number
JP5047529B2
JP5047529B2 JP2006104573A JP2006104573A JP5047529B2 JP 5047529 B2 JP5047529 B2 JP 5047529B2 JP 2006104573 A JP2006104573 A JP 2006104573A JP 2006104573 A JP2006104573 A JP 2006104573A JP 5047529 B2 JP5047529 B2 JP 5047529B2
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contact
interlayer insulating
insulating film
semiconductor device
spacer
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JP2006104573A
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Japanese (ja)
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JP2006303488A5 (https=
JP2006303488A (ja
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芝英 李
鉉材 姜
相均 禹
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/089—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/069—Manufacture or treatment of conductive parts of the interconnections by forming self-aligned vias or self-aligned contact plugs

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
JP2006104573A 2005-04-19 2006-04-05 微細コンタクトを備える半導体素子及びその製造方法 Expired - Fee Related JP5047529B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2005-0032296 2005-04-19
KR1020050032296A KR100640639B1 (ko) 2005-04-19 2005-04-19 미세콘택을 포함하는 반도체소자 및 그 제조방법

Publications (3)

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JP2006303488A JP2006303488A (ja) 2006-11-02
JP2006303488A5 JP2006303488A5 (https=) 2009-05-21
JP5047529B2 true JP5047529B2 (ja) 2012-10-10

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JP2006104573A Expired - Fee Related JP5047529B2 (ja) 2005-04-19 2006-04-05 微細コンタクトを備える半導体素子及びその製造方法

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US (2) US7855408B2 (https=)
JP (1) JP5047529B2 (https=)
KR (1) KR100640639B1 (https=)

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Publication number Publication date
US20060231900A1 (en) 2006-10-19
US7855408B2 (en) 2010-12-21
KR20060110096A (ko) 2006-10-24
US8242018B2 (en) 2012-08-14
JP2006303488A (ja) 2006-11-02
US20110076846A1 (en) 2011-03-31
KR100640639B1 (ko) 2006-10-31

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