KR100640639B1 - 미세콘택을 포함하는 반도체소자 및 그 제조방법 - Google Patents

미세콘택을 포함하는 반도체소자 및 그 제조방법 Download PDF

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Publication number
KR100640639B1
KR100640639B1 KR1020050032296A KR20050032296A KR100640639B1 KR 100640639 B1 KR100640639 B1 KR 100640639B1 KR 1020050032296 A KR1020050032296 A KR 1020050032296A KR 20050032296 A KR20050032296 A KR 20050032296A KR 100640639 B1 KR100640639 B1 KR 100640639B1
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South Korea
Prior art keywords
contact
interlayer insulating
contact hole
forming
spacer
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Expired - Fee Related
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KR1020050032296A
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English (en)
Korean (ko)
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KR20060110096A (ko
Inventor
이지영
강현재
우상균
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삼성전자주식회사
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Priority to KR1020050032296A priority Critical patent/KR100640639B1/ko
Priority to US11/367,436 priority patent/US7855408B2/en
Priority to JP2006104573A priority patent/JP5047529B2/ja
Publication of KR20060110096A publication Critical patent/KR20060110096A/ko
Application granted granted Critical
Publication of KR100640639B1 publication Critical patent/KR100640639B1/ko
Priority to US12/943,142 priority patent/US8242018B2/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/011—Manufacture or treatment of electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/089—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/069—Manufacture or treatment of conductive parts of the interconnections by forming self-aligned vias or self-aligned contact plugs

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
KR1020050032296A 2005-04-19 2005-04-19 미세콘택을 포함하는 반도체소자 및 그 제조방법 Expired - Fee Related KR100640639B1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020050032296A KR100640639B1 (ko) 2005-04-19 2005-04-19 미세콘택을 포함하는 반도체소자 및 그 제조방법
US11/367,436 US7855408B2 (en) 2005-04-19 2006-03-06 Semiconductor device having fine contacts
JP2006104573A JP5047529B2 (ja) 2005-04-19 2006-04-05 微細コンタクトを備える半導体素子及びその製造方法
US12/943,142 US8242018B2 (en) 2005-04-19 2010-11-10 Semiconductor device having fine contacts and method of fabricating the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050032296A KR100640639B1 (ko) 2005-04-19 2005-04-19 미세콘택을 포함하는 반도체소자 및 그 제조방법

Publications (2)

Publication Number Publication Date
KR20060110096A KR20060110096A (ko) 2006-10-24
KR100640639B1 true KR100640639B1 (ko) 2006-10-31

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Family Applications (1)

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KR1020050032296A Expired - Fee Related KR100640639B1 (ko) 2005-04-19 2005-04-19 미세콘택을 포함하는 반도체소자 및 그 제조방법

Country Status (3)

Country Link
US (2) US7855408B2 (https=)
JP (1) JP5047529B2 (https=)
KR (1) KR100640639B1 (https=)

Families Citing this family (70)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7151040B2 (en) * 2004-08-31 2006-12-19 Micron Technology, Inc. Methods for increasing photo alignment margins
US7910288B2 (en) 2004-09-01 2011-03-22 Micron Technology, Inc. Mask material conversion
US7115525B2 (en) 2004-09-02 2006-10-03 Micron Technology, Inc. Method for integrated circuit fabrication using pitch multiplication
US7655387B2 (en) 2004-09-02 2010-02-02 Micron Technology, Inc. Method to align mask patterns
US7253118B2 (en) * 2005-03-15 2007-08-07 Micron Technology, Inc. Pitch reduced patterns relative to photolithography features
US7390746B2 (en) 2005-03-15 2008-06-24 Micron Technology, Inc. Multiple deposition for integration of spacers in pitch multiplication process
US7611944B2 (en) 2005-03-28 2009-11-03 Micron Technology, Inc. Integrated circuit fabrication
US7429536B2 (en) 2005-05-23 2008-09-30 Micron Technology, Inc. Methods for forming arrays of small, closely spaced features
US7560390B2 (en) 2005-06-02 2009-07-14 Micron Technology, Inc. Multiple spacer steps for pitch multiplication
US7396781B2 (en) 2005-06-09 2008-07-08 Micron Technology, Inc. Method and apparatus for adjusting feature size and position
US7541632B2 (en) * 2005-06-14 2009-06-02 Micron Technology, Inc. Relaxed-pitch method of aligning active area to digit line
US7888721B2 (en) 2005-07-06 2011-02-15 Micron Technology, Inc. Surround gate access transistors with grown ultra-thin bodies
US7768051B2 (en) 2005-07-25 2010-08-03 Micron Technology, Inc. DRAM including a vertical surround gate transistor
US7413981B2 (en) * 2005-07-29 2008-08-19 Micron Technology, Inc. Pitch doubled circuit layout
US8123968B2 (en) 2005-08-25 2012-02-28 Round Rock Research, Llc Multiple deposition for integration of spacers in pitch multiplication process
US7816262B2 (en) 2005-08-30 2010-10-19 Micron Technology, Inc. Method and algorithm for random half pitched interconnect layout with constant spacing
US7696567B2 (en) 2005-08-31 2010-04-13 Micron Technology, Inc Semiconductor memory device
US7829262B2 (en) 2005-08-31 2010-11-09 Micron Technology, Inc. Method of forming pitch multipled contacts
US7416943B2 (en) 2005-09-01 2008-08-26 Micron Technology, Inc. Peripheral gate stacks and recessed array gates
US7759197B2 (en) * 2005-09-01 2010-07-20 Micron Technology, Inc. Method of forming isolated features using pitch multiplication
US7557032B2 (en) 2005-09-01 2009-07-07 Micron Technology, Inc. Silicided recessed silicon
US7687342B2 (en) 2005-09-01 2010-03-30 Micron Technology, Inc. Method of manufacturing a memory device
US7776744B2 (en) 2005-09-01 2010-08-17 Micron Technology, Inc. Pitch multiplication spacers and methods of forming the same
US7572572B2 (en) 2005-09-01 2009-08-11 Micron Technology, Inc. Methods for forming arrays of small, closely spaced features
US7393789B2 (en) 2005-09-01 2008-07-01 Micron Technology, Inc. Protective coating for planarization
US7842558B2 (en) 2006-03-02 2010-11-30 Micron Technology, Inc. Masking process for simultaneously patterning separate regions
US7476933B2 (en) 2006-03-02 2009-01-13 Micron Technology, Inc. Vertical gated access transistor
US7902074B2 (en) 2006-04-07 2011-03-08 Micron Technology, Inc. Simplified pitch doubling process flow
US8003310B2 (en) 2006-04-24 2011-08-23 Micron Technology, Inc. Masking techniques and templates for dense semiconductor fabrication
US7488685B2 (en) 2006-04-25 2009-02-10 Micron Technology, Inc. Process for improving critical dimension uniformity of integrated circuit arrays
US7795149B2 (en) * 2006-06-01 2010-09-14 Micron Technology, Inc. Masking techniques and contact imprint reticles for dense semiconductor fabrication
US7723009B2 (en) 2006-06-02 2010-05-25 Micron Technology, Inc. Topography based patterning
US7611980B2 (en) 2006-08-30 2009-11-03 Micron Technology, Inc. Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures
US7666578B2 (en) 2006-09-14 2010-02-23 Micron Technology, Inc. Efficient pitch multiplication process
KR100789391B1 (ko) * 2006-10-20 2008-01-02 삼성전자주식회사 콘택 구조물 형성 방법
US8809932B2 (en) * 2007-03-26 2014-08-19 Samsung Electronics Co., Ltd. Semiconductor memory device, method of fabricating the same, and devices employing the semiconductor memory device
KR100924611B1 (ko) * 2007-05-11 2009-11-02 주식회사 하이닉스반도체 반도체 소자의 미세 패턴 형성방법
US7923373B2 (en) 2007-06-04 2011-04-12 Micron Technology, Inc. Pitch multiplication using self-assembling materials
KR100877107B1 (ko) 2007-06-28 2009-01-07 주식회사 하이닉스반도체 반도체 소자의 층간절연막 형성방법
US8563229B2 (en) 2007-07-31 2013-10-22 Micron Technology, Inc. Process of semiconductor fabrication with mask overlay on pitch multiplied features and associated structures
US7737039B2 (en) 2007-11-01 2010-06-15 Micron Technology, Inc. Spacer process for on pitch contacts and related structures
US7659208B2 (en) * 2007-12-06 2010-02-09 Micron Technology, Inc Method for forming high density patterns
JP5193582B2 (ja) 2007-12-12 2013-05-08 株式会社東芝 半導体装置の製造方法
US7790531B2 (en) 2007-12-18 2010-09-07 Micron Technology, Inc. Methods for isolating portions of a loop of pitch-multiplied material and related structures
US8030218B2 (en) 2008-03-21 2011-10-04 Micron Technology, Inc. Method for selectively modifying spacing between pitch multiplied structures
KR101379508B1 (ko) * 2008-03-28 2014-03-27 삼성전자주식회사 수직 채널 트랜지스터 및 이의 제조 방법
US8076208B2 (en) 2008-07-03 2011-12-13 Micron Technology, Inc. Method for forming transistor with high breakdown voltage using pitch multiplication technique
US8101497B2 (en) 2008-09-11 2012-01-24 Micron Technology, Inc. Self-aligned trench formation
US8492282B2 (en) 2008-11-24 2013-07-23 Micron Technology, Inc. Methods of forming a masking pattern for integrated circuits
TWI366890B (en) * 2008-12-31 2012-06-21 Ind Tech Res Inst Method of manufacturing through-silicon-via and through-silicon-via structure
KR101166799B1 (ko) * 2009-12-29 2012-07-26 에스케이하이닉스 주식회사 홀 패턴 제조 방법
KR20120117127A (ko) * 2011-04-14 2012-10-24 삼성전자주식회사 소자 분리막 구조물 및 그 형성 방법
KR101903477B1 (ko) 2012-01-11 2018-10-02 삼성전자주식회사 반도체 장치의 제조 방법
KR20130124861A (ko) 2012-05-07 2013-11-15 삼성전자주식회사 패턴 형성 방법
US9054156B2 (en) 2012-07-30 2015-06-09 International Business Machines Corporation Non-lithographic hole pattern formation
US8889558B2 (en) 2012-12-12 2014-11-18 Micron Technology, Inc. Methods of forming a pattern on a substrate
US8889559B2 (en) 2012-12-12 2014-11-18 Micron Technology, Inc. Methods of forming a pattern on a substrate
US8999852B2 (en) 2012-12-12 2015-04-07 Micron Technology, Inc. Substrate mask patterns, methods of forming a structure on a substrate, methods of forming a square lattice pattern from an oblique lattice pattern, and methods of forming a pattern on a substrate
US8937018B2 (en) * 2013-03-06 2015-01-20 Micron Technology, Inc. Methods of forming a pattern on a substrate
CN104733310B (zh) * 2013-12-18 2017-11-03 中芯国际集成电路制造(北京)有限公司 鳍式场效应管的形成方法
US9184058B2 (en) * 2013-12-23 2015-11-10 Micron Technology, Inc. Methods of forming patterns by using a brush layer and masks
US9412806B2 (en) 2014-06-13 2016-08-09 Invensas Corporation Making multilayer 3D capacitors using arrays of upstanding rods or ridges
US9397038B1 (en) 2015-02-27 2016-07-19 Invensas Corporation Microelectronic components with features wrapping around protrusions of conductive vias protruding from through-holes passing through substrates
US9558956B2 (en) * 2015-07-01 2017-01-31 Samsung Electronics Co., Ltd. Method for fabricating semiconductor device
TWI661466B (zh) * 2016-04-14 2019-06-01 Tokyo Electron Limited 使用具有多種材料之一層的基板圖案化方法
US9934970B1 (en) * 2017-01-11 2018-04-03 International Business Machines Corporation Self aligned pattern formation post spacer etchback in tight pitch configurations
CN106847821B (zh) 2017-03-07 2018-09-14 长江存储科技有限责任公司 半导体结构及其形成方法
US20190164890A1 (en) * 2017-11-30 2019-05-30 Intel Corporation Pitch-divided interconnects for advanced integrated circuit structure fabrication
KR102369509B1 (ko) * 2018-01-08 2022-03-02 삼성전자주식회사 반도체 장치 및 그 제조 방법
KR20220012448A (ko) 2020-07-22 2022-02-04 삼성디스플레이 주식회사 표시 장치

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010058351A (ko) * 1999-12-27 2001-07-05 박종섭 반도체 소자의 제조방법
KR20030002807A (ko) * 2001-06-29 2003-01-09 주식회사 하이닉스반도체 반도체소자의 제조방법

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0669153A (ja) * 1991-12-30 1994-03-11 Nec Corp 微細コンタクト孔の形成方法
US5313089A (en) * 1992-05-26 1994-05-17 Motorola, Inc. Capacitor and a memory cell formed therefrom
US5432739A (en) * 1994-06-17 1995-07-11 Philips Electronics North America Corporation Non-volatile sidewall memory cell method of fabricating same
KR0161438B1 (ko) * 1995-09-19 1999-02-01 김광호 미세 크기의 접촉창을 가지는 반도체 메모리 장치 및 그 제조 방법
US6967369B1 (en) * 1995-09-20 2005-11-22 Micron Technology, Inc. Semiconductor memory circuitry
JP2739855B2 (ja) * 1995-12-14 1998-04-15 日本電気株式会社 半導体装置およびその製造方法
KR100223832B1 (ko) * 1996-12-27 1999-10-15 구본준 반도체 소자 및 그 제조방법
JP3168999B2 (ja) * 1998-12-11 2001-05-21 日本電気株式会社 半導体装置の製造方法
KR100350056B1 (ko) * 2000-03-09 2002-08-24 삼성전자 주식회사 다마신 게이트 공정에서 자기정렬콘택패드 형성 방법
KR100378183B1 (ko) * 2000-09-18 2003-03-29 삼성전자주식회사 반도체 메모리 장치 및 그의 제조 방법
KR100396137B1 (ko) 2001-06-13 2003-08-27 재단법인서울대학교산학협력재단 극미세 다중 패턴의 형성방법
KR20030001084A (ko) 2001-06-28 2003-01-06 주식회사 하이닉스반도체 반도체소자의 패턴 형성 방법
US6638441B2 (en) 2002-01-07 2003-10-28 Macronix International Co., Ltd. Method for pitch reduction
US6689658B2 (en) * 2002-01-28 2004-02-10 Silicon Based Technology Corp. Methods of fabricating a stack-gate flash memory array
KR100539272B1 (ko) * 2003-02-24 2005-12-27 삼성전자주식회사 반도체 장치 및 그 제조방법
DE502004005089D1 (de) * 2003-07-11 2007-11-08 Continental Teves Ag & Co Ohg Elektrohydraulische bremsanlage für kraftfahrzeuge
US6815704B1 (en) * 2003-09-04 2004-11-09 Silicon Storage Technology, Inc. Phase change memory device employing thermally insulating voids
US6853024B1 (en) * 2003-10-03 2005-02-08 Taiwan Semiconductor Manufacturing Company, Ltd. Self-aligned MIM capacitor process for embedded DRAM
US7244673B2 (en) * 2003-11-12 2007-07-17 Taiwan Semiconductor Manufacturing Company, Ltd. Integration film scheme for copper / low-k interconnect
KR100526059B1 (ko) * 2004-02-19 2005-11-08 삼성전자주식회사 반도체 소자 제조 공정에서의 자기-정렬 컨택 형성 방법

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010058351A (ko) * 1999-12-27 2001-07-05 박종섭 반도체 소자의 제조방법
KR20030002807A (ko) * 2001-06-29 2003-01-09 주식회사 하이닉스반도체 반도체소자의 제조방법

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Publication number Publication date
US20060231900A1 (en) 2006-10-19
US7855408B2 (en) 2010-12-21
JP5047529B2 (ja) 2012-10-10
KR20060110096A (ko) 2006-10-24
US8242018B2 (en) 2012-08-14
JP2006303488A (ja) 2006-11-02
US20110076846A1 (en) 2011-03-31

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