JP5039979B2 - ＦｉｎＦＥＴ半導体構造 - Google Patents

ＦｉｎＦＥＴ半導体構造 Download PDF

Info

Publication number
JP5039979B2
JP5039979B2 JP2005131256A JP2005131256A JP5039979B2 JP 5039979 B2 JP5039979 B2 JP 5039979B2 JP 2005131256 A JP2005131256 A JP 2005131256A JP 2005131256 A JP2005131256 A JP 2005131256A JP 5039979 B2 JP5039979 B2 JP 5039979B2
Authority
JP
Japan
Prior art keywords
gate
fin
semiconductor structure
finfet semiconductor
finfet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2005131256A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005317978A5 (enExample
JP2005317978A (ja
Inventor
アンドレス・ブライアント
オマー・エイチ・ドクマシ
フセイン・アイ・ハナフィ
エドワード・ジェイ・ノワク
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JP2005317978A publication Critical patent/JP2005317978A/ja
Publication of JP2005317978A5 publication Critical patent/JP2005317978A5/ja
Application granted granted Critical
Publication of JP5039979B2 publication Critical patent/JP5039979B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H10D30/6217—Fin field-effect transistors [FinFET] having non-uniform gate electrodes, e.g. gate conductors having varying doping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/514—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers
    • H10D64/516—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the insulating layers the thicknesses being non-uniform

Landscapes

  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2005131256A 2004-04-28 2005-04-28 ＦｉｎＦＥＴ半導体構造 Expired - Fee Related JP5039979B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/709,323 2004-04-28
US10/709,323 US7056773B2 (en) 2004-04-28 2004-04-28 Backgated FinFET having different oxide thicknesses

Publications (3)

Publication Number Publication Date
JP2005317978A JP2005317978A (ja) 2005-11-10
JP2005317978A5 JP2005317978A5 (enExample) 2008-05-08
JP5039979B2 true JP5039979B2 (ja) 2012-10-03

Family

ID=35187635

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005131256A Expired - Fee Related JP5039979B2 (ja) 2004-04-28 2005-04-28 ＦｉｎＦＥＴ半導体構造

Country Status (4)

Country Link
US (3) US7056773B2 (enExample)
JP (1) JP5039979B2 (enExample)
CN (1) CN100375252C (enExample)
TW (1) TW200539279A (enExample)

Families Citing this family (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050156228A1 (en) * 2004-01-16 2005-07-21 Jeng Erik S. Manufacture method and structure of a nonvolatile memory
JP2006019578A (ja) * 2004-07-02 2006-01-19 Toshiba Corp 半導体装置及びその製造方法
JP2006128494A (ja) * 2004-10-29 2006-05-18 Toshiba Corp 半導体集積回路装置及びその製造方法
NZ548087A (en) * 2005-04-29 2010-10-29 Tomizo Yamamoto Rubber or resin foam containing zirconium or germanium
US7601404B2 (en) * 2005-06-09 2009-10-13 United Microelectronics Corp. Method for switching decoupled plasma nitridation processes of different doses
US7288802B2 (en) * 2005-07-27 2007-10-30 International Business Machines Corporation Virtual body-contacted trigate
US20070047364A1 (en) * 2005-08-31 2007-03-01 International Business Machines Corporation Methods and apparatus for varying a supply voltage or reference voltage using independent control of diode voltage in asymmetrical double-gate devices
US20070085576A1 (en) * 2005-10-14 2007-04-19 Hector Sanchez Output driver circuit with multiple gate devices
US7265004B2 (en) * 2005-11-14 2007-09-04 Freescale Semiconductor, Inc. Electronic devices including a semiconductor layer and a process for forming the same
US7309626B2 (en) * 2005-11-15 2007-12-18 International Business Machines Corporation Quasi self-aligned source/drain FinFET process
US7629220B2 (en) * 2006-06-30 2009-12-08 Freescale Semiconductor, Inc. Method for forming a semiconductor device and structure thereof
KR100838378B1 (ko) * 2006-09-29 2008-06-13 주식회사 하이닉스반도체 핀트랜지스터의 제조 방법
US20080111185A1 (en) 2006-11-13 2008-05-15 International Business Machines Corporation Asymmetric multi-gated transistor and method for forming
US8217435B2 (en) 2006-12-22 2012-07-10 Intel Corporation Floating body memory cell having gates favoring different conductivity type regions
US7699996B2 (en) * 2007-02-28 2010-04-20 International Business Machines Corporation Sidewall image transfer processes for forming multiple line-widths
US20080211568A1 (en) * 2007-03-01 2008-09-04 Infineon Technologies Ag MuGFET POWER SWITCH
WO2008111406A1 (ja) 2007-03-09 2008-09-18 Nec Corporation コンフィギュラブル回路およびコンフィギュレーション方法
US7435636B1 (en) 2007-03-29 2008-10-14 Micron Technology, Inc. Fabrication of self-aligned gallium arsenide MOSFETs using damascene gate methods
US20080296680A1 (en) * 2007-05-30 2008-12-04 Qimonda Ag Method of making an integrated circuit including doping a fin
US7476578B1 (en) * 2007-07-12 2009-01-13 International Business Machines Corporation Process for finFET spacer formation
US20090206405A1 (en) * 2008-02-15 2009-08-20 Doyle Brian S Fin field effect transistor structures having two dielectric thicknesses
CN102460660B (zh) * 2009-06-26 2014-08-06 株式会社东芝 半导体装置的制造方法
TWI529914B (zh) * 2009-08-07 2016-04-11 半導體能源研究所股份有限公司 半導體裝置和其製造方法
US8420476B2 (en) 2010-05-27 2013-04-16 International Business Machines Corporation Integrated circuit with finFETs and MIM fin capacitor
CN102468381A (zh) * 2010-11-23 2012-05-23 孙智江 一种形成p型重掺杂的方法
US9082849B2 (en) 2011-09-30 2015-07-14 The Institute of Microelectronics Chinese Academy of Science Semiconductor structure and method for manufacturing the same
CN103035711B (zh) * 2011-09-30 2016-04-20 中国科学院微电子研究所 一种半导体结构及其制造方法
WO2013101219A1 (en) * 2011-12-30 2013-07-04 Intel Corporation Wrap-around trench contact structure and methods of fabrication
FR2995720B1 (fr) * 2012-09-18 2014-10-24 Commissariat Energie Atomique Procede de realisation d'un dispositif a effet de champ a double grille a grilles independantes
CN103985748B (zh) * 2013-02-08 2016-12-28 中国科学院微电子研究所 半导体设置及其制造方法
US8987793B2 (en) * 2013-04-23 2015-03-24 Broadcom Corporation Fin-based field-effect transistor with split-gate structure
CN104134668B (zh) * 2013-05-03 2017-02-22 中国科学院微电子研究所 存储器件及其制造方法和存取方法
US9087869B2 (en) 2013-05-23 2015-07-21 International Business Machines Corporation Bulk semiconductor fins with self-aligned shallow trench isolation structures
EP4224531A3 (en) * 2013-09-25 2023-08-23 Tahoe Research, Ltd. Isolation well doping with solid-state diffusion sources for finfet architectures
TWI538108B (zh) * 2014-05-08 2016-06-11 林崇榮 具電阻性元件之非揮發性記憶體與其製作方法
US9515188B2 (en) * 2014-12-22 2016-12-06 Taiwan Semiconductor Manufacturing Company, Ltd. Fin field effect transistors having conformal oxide layers and methods of forming same
JP6807860B2 (ja) * 2015-03-20 2021-01-06 アプライド マテリアルズ インコーポレイテッドＡｐｐｌｉｅｄ Ｍａｔｅｒｉａｌｓ，Ｉｎｃｏｒｐｏｒａｔｅｄ ３ｄコンフォーマル処理用原子層処理チャンバ
US9570388B2 (en) 2015-06-26 2017-02-14 International Business Machines Corporation FinFET power supply decoupling
CN105609470B (zh) * 2015-08-20 2019-01-18 中国科学院微电子研究所 具有均匀阈值电压分布的半导体器件及其制造方法
CN105720970B (zh) * 2016-01-22 2018-06-26 宁波大学 一种基于FinFET器件的异或/同或门电路
CN107039522B (zh) * 2016-02-04 2019-12-31 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
CN106057657A (zh) * 2016-07-22 2016-10-26 上海华力微电子有限公司 多重图形化方法
CN106356305B (zh) * 2016-11-18 2019-05-31 上海华力微电子有限公司 优化鳍式场效晶体管结构的方法以及鳍式场效晶体管
US9812453B1 (en) * 2017-02-13 2017-11-07 Globalfoundries Inc. Self-aligned sacrificial epitaxial capping for trench silicide
CN109309005B (zh) * 2017-07-27 2022-03-22 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
US10254244B1 (en) 2017-10-11 2019-04-09 International Business Machines Corporation Biosensor having a sensing gate dielectric and a back gate dielectric
WO2019132887A1 (en) * 2017-12-27 2019-07-04 Intel Corporation Reduced electric field by thickening dielectric on the drain side
KR102535087B1 (ko) * 2018-04-20 2023-05-19 삼성전자주식회사 반도체 장치

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3607431B2 (ja) * 1996-09-18 2005-01-05 株式会社東芝 半導体装置およびその製造方法
US6448615B1 (en) 1998-02-26 2002-09-10 Micron Technology, Inc. Methods, structures, and circuits for transistors with gate-to-body capacitive coupling
JP2000164868A (ja) * 1998-11-20 2000-06-16 Nec Corp ゲート膜形成方法及び半導体装置
JP2000195968A (ja) * 1998-12-25 2000-07-14 Mitsubishi Electric Corp 半導体装置の製造方法
JP2002118255A (ja) * 2000-07-31 2002-04-19 Toshiba Corp 半導体装置およびその製造方法
JP4044276B2 (ja) * 2000-09-28 2008-02-06 株式会社東芝 半導体装置及びその製造方法
US6686630B2 (en) 2001-02-07 2004-02-03 International Business Machines Corporation Damascene double-gate MOSFET structure and its fabrication method
US6593192B2 (en) 2001-04-27 2003-07-15 Micron Technology, Inc. Method of forming a dual-gated semiconductor-on-insulator device
US6611023B1 (en) 2001-05-01 2003-08-26 Advanced Micro Devices, Inc. Field effect transistor with self alligned double gate and method of forming same
JP2003110109A (ja) 2001-09-28 2003-04-11 Sharp Corp 半導体装置及びその製造方法並びに携帯電子機器
US6433609B1 (en) 2001-11-19 2002-08-13 International Business Machines Corporation Double-gate low power SOI active clamp network for single power supply and multiple power supply applications
US6800905B2 (en) * 2001-12-14 2004-10-05 International Business Machines Corporation Implanted asymmetric doped polysilicon gate FinFET
US6635909B2 (en) * 2002-03-19 2003-10-21 International Business Machines Corporation Strained fin FETs structure and method
US6580132B1 (en) 2002-04-10 2003-06-17 International Business Machines Corporation Damascene double-gate FET
JP2003332582A (ja) 2002-05-13 2003-11-21 Toshiba Corp 半導体装置及びその製造方法
US6642090B1 (en) * 2002-06-03 2003-11-04 International Business Machines Corporation Fin FET devices from bulk semiconductor and method for forming
JP4004040B2 (ja) * 2002-09-05 2007-11-07 株式会社東芝 半導体装置
US8222680B2 (en) * 2002-10-22 2012-07-17 Advanced Micro Devices, Inc. Double and triple gate MOSFET devices and methods for making same
US6709982B1 (en) * 2002-11-26 2004-03-23 Advanced Micro Devices, Inc. Double spacer FinFET formation
US6885055B2 (en) * 2003-02-04 2005-04-26 Lee Jong-Ho Double-gate FinFET device and fabricating method thereof
JP2005167163A (ja) * 2003-12-05 2005-06-23 National Institute Of Advanced Industrial & Technology 二重ゲート電界効果トランジスタ

Also Published As

Publication number Publication date
CN100375252C (zh) 2008-03-12
US7187042B2 (en) 2007-03-06
US7476946B2 (en) 2009-01-13
US20050245009A1 (en) 2005-11-03
US7056773B2 (en) 2006-06-06
TW200539279A (en) 2005-12-01
CN1691294A (zh) 2005-11-02
JP2005317978A (ja) 2005-11-10
US20060237774A1 (en) 2006-10-26
US20060145195A1 (en) 2006-07-06

Similar Documents

Publication Publication Date Title
JP5039979B2 (ja) ＦｉｎＦＥＴ半導体構造
US7098477B2 (en) Structure and method of manufacturing a finFET device having stacked fins
US7314802B2 (en) Structure and method for manufacturing strained FINFET
US7091069B2 (en) Ultra thin body fully-depleted SOI MOSFETs
CN102034865B (zh) 半导体器件及其制造方法
US7172943B2 (en) Multiple-gate transistors formed on bulk substrates
JP4384988B2 (ja) 歪みＦｉｎＦＥＴＣＭＯＳデバイス構造
US7388259B2 (en) Strained finFET CMOS device structures
CN107039506B (zh) 对改进型晶体管的源/漏延伸控制
US8039376B2 (en) Methods of changing threshold voltages of semiconductor transistors by ion implantation
US6432763B1 (en) Field effect transistor having doped gate with prevention of contamination from the gate during implantation
JP4304884B2 (ja) 半導体装置及びその製造方法
US6472282B1 (en) Self-amorphized regions for transistors
US7485510B2 (en) Field effect device including inverted V shaped channel region and method for fabrication thereof
US6664146B1 (en) Integration of fully depleted and partially depleted field effect transistors formed in SOI technology
US8227316B2 (en) Method for manufacturing double gate finFET with asymmetric halo
JPH0475351A (ja) 化合物半導体装置の製造方法
US7217625B2 (en) Method of fabricating a semiconductor device having a shallow source/drain region
CN100521231C (zh) 半导体器件及制造方法
Li et al. Damascene W/TiN gate MOSFETs with improved performance for 0.1-/spl mu/m regime
JP2008072142A (ja) 半導体装置の製造方法
KR100597462B1 (ko) 반도체 소자의 트랜지스터 제조방법
Park et al. Threshold voltage behavior of body-tied FinFET (OMEGA MOSFET) with respect to ion implantation conditions
KR20070002607A (ko) 반도체 소자의 트랜지스터 제조방법
KR20040076140A (ko) Ｍｏｓ 트랜지스터 제조 방법

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080325

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20080325

RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7423

Effective date: 20090206

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20111116

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20111122

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120124

RD12 Notification of acceptance of power of sub attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7432

Effective date: 20120124

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A821

Effective date: 20120124

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20120522

RD14 Notification of resignation of power of sub attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7434

Effective date: 20120522

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20120615

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20150720

Year of fee payment: 3

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

LAPS Cancellation because of no payment of annual fees