JP2005317978A5 - - Google Patents

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Publication number
JP2005317978A5
JP2005317978A5 JP2005131256A JP2005131256A JP2005317978A5 JP 2005317978 A5 JP2005317978 A5 JP 2005317978A5 JP 2005131256 A JP2005131256 A JP 2005131256A JP 2005131256 A JP2005131256 A JP 2005131256A JP 2005317978 A5 JP2005317978 A5 JP 2005317978A5
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JP
Japan
Prior art keywords
impurity
gate
forming
dielectric layer
angle
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JP2005131256A
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English (en)
Japanese (ja)
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JP2005317978A (ja
JP5039979B2 (ja
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Priority claimed from US10/709,323 external-priority patent/US7056773B2/en
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Publication of JP2005317978A publication Critical patent/JP2005317978A/ja
Publication of JP2005317978A5 publication Critical patent/JP2005317978A5/ja
Application granted granted Critical
Publication of JP5039979B2 publication Critical patent/JP5039979B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2005131256A 2004-04-28 2005-04-28 ＦｉｎＦＥＴ半導体構造 Expired - Fee Related JP5039979B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/709,323 2004-04-28
US10/709,323 US7056773B2 (en) 2004-04-28 2004-04-28 Backgated FinFET having different oxide thicknesses

Publications (3)

Publication Number Publication Date
JP2005317978A JP2005317978A (ja) 2005-11-10
JP2005317978A5 true JP2005317978A5 (enExample) 2008-05-08
JP5039979B2 JP5039979B2 (ja) 2012-10-03

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ID=35187635

Family Applications (1)

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JP2005131256A Expired - Fee Related JP5039979B2 (ja) 2004-04-28 2005-04-28 ＦｉｎＦＥＴ半導体構造

Country Status (4)

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US (3) US7056773B2 (enExample)
JP (1) JP5039979B2 (enExample)
CN (1) CN100375252C (enExample)
TW (1) TW200539279A (enExample)

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