JP5038326B2 - 半導体素子の製造方法 - Google Patents
半導体素子の製造方法 Download PDFInfo
- Publication number
- JP5038326B2 JP5038326B2 JP2008543205A JP2008543205A JP5038326B2 JP 5038326 B2 JP5038326 B2 JP 5038326B2 JP 2008543205 A JP2008543205 A JP 2008543205A JP 2008543205 A JP2008543205 A JP 2008543205A JP 5038326 B2 JP5038326 B2 JP 5038326B2
- Authority
- JP
- Japan
- Prior art keywords
- photoresist pattern
- forming
- manufacturing
- etching
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 47
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 46
- 238000000034 method Methods 0.000 claims abstract description 80
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 78
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 238000005530 etching Methods 0.000 claims abstract description 21
- 238000001459 lithography Methods 0.000 claims abstract description 13
- 238000000151 deposition Methods 0.000 claims abstract description 9
- 238000009966 trimming Methods 0.000 claims description 16
- 238000010438 heat treatment Methods 0.000 claims description 11
- 229910052710 silicon Inorganic materials 0.000 claims description 9
- 239000010703 silicon Substances 0.000 claims description 9
- 238000004151 rapid thermal annealing Methods 0.000 claims description 8
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 6
- 238000001039 wet etching Methods 0.000 claims description 6
- 238000010894 electron beam technology Methods 0.000 claims description 4
- 150000001875 compounds Chemical class 0.000 claims description 2
- 239000012212 insulator Substances 0.000 claims description 2
- 238000010884 ion-beam technique Methods 0.000 claims description 2
- 230000008021 deposition Effects 0.000 claims 1
- 239000002105 nanoparticle Substances 0.000 abstract 1
- 238000007669 thermal treatment Methods 0.000 abstract 1
- 239000007789 gas Substances 0.000 description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 8
- 229920003209 poly(hydridosilsesquioxane) Polymers 0.000 description 8
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 125000006850 spacer group Chemical group 0.000 description 6
- 238000001312 dry etching Methods 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 239000012535 impurity Substances 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 3
- 238000007740 vapor deposition Methods 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 239000002096 quantum dot Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66545—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a dummy, i.e. replacement gate in a process wherein at least a part of the final gate is self aligned to the dummy gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66439—Unipolar field-effect transistors with a one- or zero-dimensional channel, e.g. quantum wire FET, in-plane gate transistor [IPG], single electron transistor [SET], striped channel transistor, Coulomb blockade transistor
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66484—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with multiple gate, at least one gate being an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/7613—Single electron transistors; Coulomb blockade devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7831—Field effect transistors with field effect produced by an insulated gate with multiple gate structure
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- Theoretical Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- Mathematical Physics (AREA)
- Electrodes Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Die Bonding (AREA)
- Drying Of Semiconductors (AREA)
Description
Claims (7)
- 半導体基板上の最上部にバッファー層を形成するステップと、
前記バッファー層の上部に無機物フォトレジストを塗布してリソグラフィを通じてフォトレジストパターンを形成するステップと、
前記形成されたフォトレジストパターンの線幅を減らすために前記フォトレジストパターンをトリミングするステップと、
前記形成されたフォトレジストパターンにO 2 またはN 2 を利用して熱処理を実行するステップと、
前記熱処理された構造物の上部に均一な厚さの絶縁膜を蒸着した後に前記熱処理されたフォトレジストパターンが露出されるように前記蒸着された膜を前記蒸着した厚さだけエッチングするステップと、
前記エッチングステップを経た構造物に絶縁膜を蒸着し、前記熱処理されたフォトレジストパターンが露出されるように前記蒸着された絶縁膜をエッチングするステップと、
前記露出されている熱処理されたフォトレジストパターンをエッチングを通じて除去するステップと、
前記フォトレジストパターンが除去された位置にゲート酸化膜を形成するステップと、
前記形成されたゲート酸化膜の上部にゲート電極を形成するステップと
を含むことを特徴とする半導体素子の製造方法。 - 前記半導体基板は、SOI(Silicon On Insulator)基板または化合物基板であることを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記リソグラフィを通じてパターンを形成するステップは、光、電子ビームまたはイオンビームなどを使用することを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記トリミングするステップは、CF4またはCHF3ガスを使用する乾式エッチングまたはフッ酸(HF)を使用する湿式エッチングを利用することを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記熱処理は、RTA(Rapid Thermal Annealing)またはファーニス(furnace)を使用することを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記熱処理を実行するステップによって前記フォトレジストパターンが硬化されることを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記露出されている熱処理されたフォトレジストパターンをエッチングを通じて除去するステップは、前記エッチングを通じて前記熱処理されたフォトレジストパターンの下部にあるバッファー層を一緒に除去するステップを含むことを特徴とする請求項1に記載の半導体素子の製造方法。
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20050118218 | 2005-12-06 | ||
KR10-2005-0118218 | 2005-12-06 | ||
KR1020060050749A KR100704380B1 (ko) | 2005-12-06 | 2006-06-07 | 반도체 소자 제조 방법 |
KR10-2006-0050749 | 2006-06-07 | ||
PCT/KR2006/005173 WO2007066937A1 (en) | 2005-12-06 | 2006-12-04 | Method of manufacturing semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009518822A JP2009518822A (ja) | 2009-05-07 |
JP5038326B2 true JP5038326B2 (ja) | 2012-10-03 |
Family
ID=38161049
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008543205A Expired - Fee Related JP5038326B2 (ja) | 2005-12-06 | 2006-12-04 | 半導体素子の製造方法 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7947585B2 (ja) |
EP (1) | EP1958243B1 (ja) |
JP (1) | JP5038326B2 (ja) |
KR (1) | KR100704380B1 (ja) |
CN (1) | CN101322230B (ja) |
AT (1) | ATE515791T1 (ja) |
WO (1) | WO2007066937A1 (ja) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100698013B1 (ko) * | 2005-12-08 | 2007-03-23 | 한국전자통신연구원 | 쇼트키 장벽 관통 트랜지스터 및 그 제조 방법 |
US7473623B2 (en) * | 2006-06-30 | 2009-01-06 | Advanced Micro Devices, Inc. | Providing stress uniformity in a semiconductor device |
KR20080057790A (ko) * | 2006-12-21 | 2008-06-25 | 동부일렉트로닉스 주식회사 | 플래시 메모리 및 그 제조 방법 |
US7947545B2 (en) * | 2007-10-31 | 2011-05-24 | Avago Technologies Wireless Ip (Singapore) Pte. Ltd. | Method for producing a transistor gate with sub-photolithographic dimensions |
FR2968128B1 (fr) * | 2010-11-26 | 2013-01-04 | St Microelectronics Sa | Cellule precaracterisee pour circuit intégré |
US8569158B2 (en) | 2011-03-31 | 2013-10-29 | Tokyo Electron Limited | Method for forming ultra-shallow doping regions by solid phase diffusion |
US8580664B2 (en) | 2011-03-31 | 2013-11-12 | Tokyo Electron Limited | Method for forming ultra-shallow boron doping regions by solid phase diffusion |
KR101932897B1 (ko) * | 2011-03-31 | 2018-12-27 | 도쿄엘렉트론가부시키가이샤 | 고상 확산에 의해 극히 얕은 도핑 영역을 형성하기 위한 방법 |
CN103854984B (zh) * | 2012-12-03 | 2017-03-01 | 中国科学院微电子研究所 | 一种后栅工艺假栅的制造方法和后栅工艺假栅 |
US9093379B2 (en) | 2013-05-29 | 2015-07-28 | International Business Machines Corporation | Silicidation blocking process using optically sensitive HSQ resist and organic planarizing layer |
US9548238B2 (en) | 2013-08-12 | 2017-01-17 | Globalfoundries Inc. | Method of manufacturing a semiconductor device using a self-aligned OPL replacement contact and patterned HSQ and a semiconductor device formed by same |
US9899224B2 (en) | 2015-03-03 | 2018-02-20 | Tokyo Electron Limited | Method of controlling solid phase diffusion of boron dopants to form ultra-shallow doping regions |
US10050147B2 (en) * | 2015-07-24 | 2018-08-14 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor device and manufacturing method thereof |
CN105931991B (zh) * | 2016-06-17 | 2019-02-12 | 深圳市华星光电技术有限公司 | 电极的制备方法 |
EP3507837A4 (en) * | 2016-08-30 | 2020-05-06 | Intel Corporation | QUANTUM POINT DEVICES |
GB201906936D0 (en) * | 2019-05-16 | 2019-07-03 | Quantum Motion Tech Limited | Processor element for quantum information processor |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4350541A (en) * | 1979-08-13 | 1982-09-21 | Nippon Telegraph & Telephone Public Corp. | Doping from a photoresist layer |
JP3029653B2 (ja) * | 1990-09-14 | 2000-04-04 | 株式会社東芝 | 半導体装置の製造方法 |
JPH04340277A (ja) * | 1991-01-25 | 1992-11-26 | Sony Corp | Mos型半導体集積回路の製造方法 |
JPH0794715A (ja) * | 1993-09-21 | 1995-04-07 | Matsushita Electric Ind Co Ltd | Mos型トランジスタの製造方法 |
JPH1126757A (ja) | 1997-06-30 | 1999-01-29 | Toshiba Corp | 半導体装置及びその製造方法 |
JP3545592B2 (ja) * | 1998-03-16 | 2004-07-21 | 株式会社東芝 | 半導体装置の製造方法 |
JPH11317517A (ja) * | 1998-05-06 | 1999-11-16 | Sony Corp | 半導体装置およびその製造方法 |
US6225173B1 (en) * | 1998-11-06 | 2001-05-01 | Advanced Micro Devices, Inc. | Recessed channel structure for manufacturing shallow source/drain extensions |
JP2000188394A (ja) | 1998-12-21 | 2000-07-04 | Hitachi Ltd | 半導体装置及びその製造方法 |
US6033963A (en) * | 1999-08-30 | 2000-03-07 | Taiwan Semiconductor Manufacturing Company | Method of forming a metal gate for CMOS devices using a replacement gate process |
KR100456319B1 (ko) * | 2000-05-19 | 2004-11-10 | 주식회사 하이닉스반도체 | 폴리머와 산화막의 연마 선택비 차이를 이용한 반도체소자의 게이트 형성 방법 |
US20030015758A1 (en) * | 2001-07-21 | 2003-01-23 | Taylor, Jr William J. | Semiconductor device and method therefor |
US6762130B2 (en) * | 2002-05-31 | 2004-07-13 | Texas Instruments Incorporated | Method of photolithographically forming extremely narrow transistor gate elements |
US6995430B2 (en) * | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
US6916694B2 (en) * | 2003-08-28 | 2005-07-12 | International Business Machines Corporation | Strained silicon-channel MOSFET using a damascene gate process |
-
2006
- 2006-06-07 KR KR1020060050749A patent/KR100704380B1/ko not_active IP Right Cessation
- 2006-12-04 JP JP2008543205A patent/JP5038326B2/ja not_active Expired - Fee Related
- 2006-12-04 EP EP06823881A patent/EP1958243B1/en not_active Not-in-force
- 2006-12-04 WO PCT/KR2006/005173 patent/WO2007066937A1/en active Application Filing
- 2006-12-04 AT AT06823881T patent/ATE515791T1/de not_active IP Right Cessation
- 2006-12-04 CN CN2006800457415A patent/CN101322230B/zh not_active Expired - Fee Related
- 2006-12-04 US US12/090,891 patent/US7947585B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
ATE515791T1 (de) | 2011-07-15 |
US7947585B2 (en) | 2011-05-24 |
CN101322230A (zh) | 2008-12-10 |
EP1958243A4 (en) | 2010-04-07 |
EP1958243B1 (en) | 2011-07-06 |
WO2007066937A1 (en) | 2007-06-14 |
JP2009518822A (ja) | 2009-05-07 |
EP1958243A1 (en) | 2008-08-20 |
US20080254606A1 (en) | 2008-10-16 |
KR100704380B1 (ko) | 2007-04-09 |
CN101322230B (zh) | 2012-02-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5038326B2 (ja) | 半導体素子の製造方法 | |
TWI591823B (zh) | 包含鰭狀結構之半導體元件及其製造方法 | |
JP5186101B2 (ja) | 多層に応力が加えられたゲート電極を有するfinFET構造体 | |
JP4168073B2 (ja) | 集積回路においてトレンチアイソレーション構造を形成する方法 | |
US6828205B2 (en) | Method using wet etching to trim a critical dimension | |
TW201926556A (zh) | 半導體製作方法 | |
KR20150042055A (ko) | 반도체 소자의 제조방법 | |
JP2009065020A (ja) | 半導体装置及びその製造方法 | |
JPH08330511A (ja) | 半導体装置とその製造方法 | |
TW574746B (en) | Method for manufacturing MOSFET with recessed channel | |
WO2019007335A1 (zh) | 半导体器件及其制备方法 | |
TWI748496B (zh) | 半導體結構及形成半導體結構的方法 | |
US6255182B1 (en) | Method of forming a gate structure of a transistor by means of scalable spacer technology | |
JPH023244A (ja) | 半導体装置の製造方法 | |
KR20050065899A (ko) | 쇼트키 장벽 관통 트랜지스터 및 그 제조방법 | |
US6828082B2 (en) | Method to pattern small features by using a re-flowable hard mask | |
KR100511907B1 (ko) | 반도체 소자의 제조방법 | |
KR100745906B1 (ko) | 반도체소자의 콘택플러그 형성방법 | |
KR20020002815A (ko) | 에스오아이 소자의 제조방법 | |
US8133814B1 (en) | Etch methods for semiconductor device fabrication | |
KR100557224B1 (ko) | 반도체 소자의 제조 방법 | |
TWI303458B (en) | Method for forming a gate and etching a conductive layer | |
TW202201505A (zh) | 半導體元件及半導體方法 | |
KR20030000662A (ko) | 반도체 소자의 트랜지스터 제조 방법 | |
KR20070069957A (ko) | 반도체 소자의 도전체 패턴 제조 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20111213 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120106 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20120406 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20120413 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120507 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120615 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120705 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150713 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5038326 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |