JP5017977B2 - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
- Publication number
- JP5017977B2 JP5017977B2 JP2006249233A JP2006249233A JP5017977B2 JP 5017977 B2 JP5017977 B2 JP 5017977B2 JP 2006249233 A JP2006249233 A JP 2006249233A JP 2006249233 A JP2006249233 A JP 2006249233A JP 5017977 B2 JP5017977 B2 JP 5017977B2
- Authority
- JP
- Japan
- Prior art keywords
- heat radiating
- radiating member
- semiconductor device
- semiconductor element
- heat
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 275
- 238000004519 manufacturing process Methods 0.000 title claims description 18
- 229920005989 resin Polymers 0.000 claims description 68
- 239000011347 resin Substances 0.000 claims description 68
- 239000000758 substrate Substances 0.000 claims description 59
- 239000000853 adhesive Substances 0.000 claims description 53
- 230000001070 adhesive effect Effects 0.000 claims description 53
- 230000017525 heat dissipation Effects 0.000 claims description 40
- 238000000034 method Methods 0.000 claims description 37
- 230000005855 radiation Effects 0.000 claims description 23
- 239000000463 material Substances 0.000 claims description 11
- 230000000149 penetrating effect Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 53
- 238000007789 sealing Methods 0.000 description 26
- 239000010949 copper Substances 0.000 description 16
- 230000002093 peripheral effect Effects 0.000 description 16
- 229910000679 solder Inorganic materials 0.000 description 13
- 238000003466 welding Methods 0.000 description 12
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 9
- 229910045601 alloy Inorganic materials 0.000 description 9
- 239000000956 alloy Substances 0.000 description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 8
- 229910052802 copper Inorganic materials 0.000 description 8
- 239000003822 epoxy resin Substances 0.000 description 7
- 229920000647 polyepoxide Polymers 0.000 description 7
- 229910052751 metal Inorganic materials 0.000 description 6
- 239000002184 metal Substances 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 238000005304 joining Methods 0.000 description 4
- 229910000881 Cu alloy Inorganic materials 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 238000003825 pressing Methods 0.000 description 3
- 239000010935 stainless steel Substances 0.000 description 3
- 229910001220 stainless steel Inorganic materials 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 230000000994 depressogenic effect Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 238000004873 anchoring Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05553—Shape in top view being rectangular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3201—Structure
- H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
- H01L2224/32013—Structure relative to the bonding area, e.g. bond pad the layer connector being larger than the bonding area, e.g. bond pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
- H01L2224/48228—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item the bond pad being disposed in a recess of the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01056—Barium [Ba]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/1016—Shape being a cuboid
- H01L2924/10162—Shape being a cuboid with a square active surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/1026—Compound semiconductors
- H01L2924/1032—III-V
- H01L2924/10329—Gallium arsenide [GaAs]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
かかる半導体装置にあっては、その動作時に半導体素子から発生する熱を、外部へ放散する必要がある。
同図40は、所謂BGA(Ball Grid Array)タイプの半導体装置400を示している。
当該半導体装置400にあっては、配線基板401上に、接着材402を介して半導体素子403が搭載され、当該半導体素子403の電極は、ボンディングワイヤ404により、前記配線基板401に設けられた端子401aに接続されている。
一方、前記配線基板401の他方の主面、即ち半導体素子403の搭載面とは反対の面には、外部接続用端子408として、複数個の半田ボールが配設されている。
本発明はこの点に鑑みてなされたものであり、放熱性に優れた半導体装置およびその製造方法を提供することを目的とする。
従って、熱的に安定性の高い半導体装置を実現することができる。
本発明による半導体装置の第1の実施の形態について、図面を用いて説明する。
図1は、当該第1の実施の形態に於ける半導体装置100の断面を示す。また、図2は当該半導体装置100の上面を示し、図3は当該半導体装置100の下面を示す。
本実施例に於ける半導体装置100にあっては、配線基板1の一方の主面、即ち半導体素子が搭載される面上に、エポキシ樹脂等の接着材2を介して、第1の放熱部材(ヒートスプレッダ)3が配設されている。尚、配線基板1に於ける配線パターンについては、図示することを省略している。
また、前記第1の放熱部材3に於ける開口部3a間並びに外側の領域3cには、半田ペースト等の導電性接着材料7を用いて、第2の放熱部材8が固着されている。即ち、第1の放熱部材3と、第2の放熱部材8は熱的な結合が可能とされている。
また、前記配線基板1の他方の主面(背面側)には、外部接続用端子10として、複数個の半田ボールが配設されている。
前述の如く、第2の放熱部材8は、半田ペースト等の導電性接着材7を用いて第1の放熱部材3に固着されている。従って、第1の放熱部材3と第2の放熱部材8との間の熱的結合即ち熱の伝導効率は非常に高い。
当該接着材2は、配線基板1上の端子1aを除く領域、即ち次工程に於いて搭載・固着される第1の放熱部材3の開口部3aに対応する領域を除いた領域に選択的に配設される。
次いで、前記半導体素子5上を覆って第2の放熱部材8を配置し、その平板状基部8aを半田ペースト等の導電性接着材7を用いて第1の放熱部材3に固着する。当該第2の放熱部材8は前述の如く、その外周側面に複数個の貫通孔8bを具備する。かかる状態を、図12に示す。
しかる後、前記配線基板2の他方の主面(裏面)の所定位置に配設されている電極パッドに、外部接続用端子10として半田ボールを配設し、前記図1に示す半導体装置100を形成する。
当該第2の実施の形態の半導体装置120の構成を図14に示す。尚、図14に於いては、前記図1に示した構成要素と同一の要素については同じ符号を付し、その説明を省略する。
尚、図示されていないが、当該第2の放熱部材21には、第1の実施の形態と同様、その外周側面に複数個の貫通孔8bが配設されており、また平板状基部8aの外周縁部、及び上部平板状部8cを残して、封止用樹脂9により封止されている。
また、半導体素子5で発生した熱が、樹脂9及び第2の放熱部材8に伝導されて、その平板状基部8aの外周縁部及び上部平板状部8cから放熱される経路も存在する。
尚、このような半導体装置120は、平板状基部8aの縁部が樹脂9から露出する寸法を有する第2の放熱部材81を適用する点を除き、前記第1の実施の形態の半導体装置100と同様の手順をもって形成することができる。
当該第3の実施の形態の半導体装置130の構成を図15に示す。図15に於いても、前記図1に示した構成要素と同一の要素については同じ符号を付し、その説明を省略する。
当該第1の放熱部材32は、配線基板31の端子31aに対応する領域に開口部32aを具備しており、また、その外周縁部32bは、封止用樹脂9から露出している。
当該第4の実施の形態の半導体装置140の構成を図16に示す。図16に於いても、図1に示した要素と同一の要素については同一の符号を付し、その説明の詳細は省略する。
また、当該第1の放熱部材41は、第1の実施の形態と同様、配線基板1の端子1aに対応する領域に開口部41aを有しており、また、その縁部41bは、封止用樹脂9から露出している。
このような構成を有する半導体装置140にあっては、半導体素子5で発生した熱の、第1の放熱部材41内に於ける伝導効率、及びその外周縁部41bからの放熱効率を高めることができる。
当該第5の実施の形態の半導体装置150の構成を図17に示す。図17に於いても、図1に示した要素と同一の要素については同一の符号を付し、その説明の詳細は省略する。
溶接方法としては、例えばレーザ溶接を適用することができる。
更に、溶接法を適用することにより、接着剤に起因による不具合が発生せず、信頼性の高い半導体装置150を得ることができる。
当該第6の実施の形態の半導体装置160の構成を図18に示す。図18に於いても、図1に示した要素と同一の要素については同一の符号を付し、その説明の詳細は省略する。
導電性接着材61としては、例えば半田ペースト或いは銀(Ag)ペースト等を適用することができる。
当該第7の実施の形態の半導体装置170の構成を図19に示す。図19にあっても、図1に示した要素と同一の要素については同一の符号を付し、その説明の詳細は省略する。
当該第8の実施の形態の半導体装置180の構成を図20に示す。図20にあっても、図1に示した要素と同一の要素については同一の符号を付し、その説明の詳細は省略する。また当該第8の実施の形態の半導体装置180に於ける第2の放熱部材を図21に示す。
当該第2の放熱部材81は、前記第1の実施の形態と同様、その上部平板状部8cを表出して、樹脂9により被覆・封止される。
第9の実施の形態の半導体装置190の構成を図22に示す。図22にあっても、図1に示した要素と同一の要素については同一の符号を付し、その説明の詳細は省略する。
このような構成を有する半導体装置190にあっては、第1の放熱部材92にアンカーホール92aが配設されていることにより、封止用樹脂9は当該アンカーホール92aを介して配線基板91と接することができる。
また、配線基板91と放熱部材92間には接着材が介在しないため,当該接着材に起因する不具合が発生せず、信頼性の高い半導体装置190が得られる。
次いで、前記半導体素子5を覆って第2の放熱部材8を配設し、半田ペースト等の導電性接着材7を用いて、第1の放熱部材92上に固着する。かかる状態を、図27に示す。
次いで、当該第2の放熱部材8の内側及び外側を対象に、封止用樹脂8により気密封止(樹脂封止)処理を行う。
尚、樹脂封止処理の際、前記第1の放熱部材92は、その外周縁部92eが露出されるよう樹脂9により被覆される。かかる状態を、図28に示す。
当該第10の実施の形態の半導体装置200の構成を図29に示す。図29にあっても、前記図1に示した要素と同一の要素については同一の符号を付し、その説明の詳細は省略する。
このような導電性接着材102、放熱用貫通孔(サーマルビア)101b及びサーマルボール103の配置により、当該半導体装置200に於ける放熱性は向上する。
次に、第11の実施の形態について説明する。
当該第11の実施の形態の半導体装置210の構成を図30に示す。図30にあっても、前記図1に示した要素と同一の要素については同一の符号を付し、その説明の詳細は省略する。
このような構成を有する半導体装置210にあっては、第2の放熱部材8の内側に位置する樹脂8、接着材2,4、或いは配線基板111自体に含まれる水分を、当該貫通孔111b,112bを介して外部に放出させることができる。
また、半導体素子5に於いて発生し、第1の放熱部材112に伝導された熱の一部は、第1の放熱部材112と配線基板111に於ける貫通孔111b,112bを介して、当該半導体装置210の外部へ放出される。
尚、貫通孔(VDホール)111b,112bの配設位置並びに個数は、図30に示した形態に限定されない。
本実施形態にあっては、1枚の基板上に複数個の半導体装置を形成し、最終的に個片化処理を行って、複数個の半導体装置を形成する製造方法を開示する。
当該大形(大判)の基板301には、半導体素子搭載部が40個マトリックス状に配列されている。各半導体素子搭載部には、それぞれ端子301aが配設されている。
そして、当該大形(大判)の基板301上、即ち前記一方の主面には、前記端子部301aに対応した開口が形成されるよう、即ち当該端子部301aを除いて液状接着剤或いはフィルム状接着剤からなる接着材302が選択的に配設される。かかる状態を、図32に示す。
しかる後、この様に一方の主面に第1の放熱部材303、半導体素子305、第2の放熱部材308などが固着された基板301を、樹脂モールド処理装置に装着し、当該基板301の一方の主面側に対し樹脂モールド処理を施す。
この時、隣接する断面が台形状の空間を有するドーム状の凸部間は、当該樹脂309によって埋められ被覆される。かかる状態を、図37に示す。
かかる切断処理により個片化された半導体装置350のそれぞれにあっては、外周側面部に第1の放熱部材303、第2の放熱部材308の端面が表出する。かかる状態を、図39に示す。
以上のように、本発明による半導体装置にあっては、配線基板上に第1の放熱部材を配設し、当該第1の放熱部材上に半導体素子を配置し、更に当該半導体素子を覆うように第2の放熱部材を配置する。当該第2の放熱部材は、第1の放熱部材に熱的に結合可能とされる。
尚、前記実施の態様にあっては、第2の放熱部材の内側並びに外側を、封止用樹脂により被覆・封止する構成を示したが、当該第2の放熱部材の内側のみを当該樹脂により封止した構成とすることも可能である。
前記第一の放熱部材上に配置された半導体素子と、
前記半導体素子上を覆い、且つ前記第一の放熱部材と熱的に結合された第二の放熱部材と、
前記半導体素子と第二の放熱部材との間に配設された絶縁部材と、
を有することを特徴とする半導体装置。
(付記3) 前記基板の前記半導体素子が搭載された位置に、放熱用貫通孔を有していることを特徴とする付記2記載の半導体装置。
(付記5) 前記第一の放熱部材には、前記基板に設けられた電極に対応する位置に貫通する孔が設けられていることを特徴とする付記2乃至4のいずれか一項に記載の半導体装置。
(付記7) 前記第二の放熱部材は一部を残して樹脂で封止されていることを特徴とする付記1乃至6のいずれか一項に記載の半導体装置。
(付記9) 前記第一,第二の放熱部材が、溶接されていることを特徴とする付記1乃至6のいずれか一項に記載の半導体装置。
(付記11) 前記第一の放熱部材は、前記半導体素子が配置される部分が、他の部分に対してディプレスされていることを特徴とする付記1乃至10のいずれか一項に記載の半導体装置。
(付記13) 前記基板と前記第一の放熱部材との間の、前記放熱用貫通孔の上に、導電性接着材料が設けられていることを特徴とする付記3記載の半導体装置。
前記第一の放熱部材上に半導体素子を配置する工程と、
前記半導体素子と前記基板とを電気的に接続する工程と、
前記半導体素子を覆う第二の放熱部材を前記第一の放熱部材に接合する工程と、
を有することを特徴とする半導体装置の製造方法。
1,31,91,101,111,120 配線基板
1a,31a,91a,101a,111a,120a 端子
2,5,121,123 接着材料
3,32,41,92,112,122 第1の放熱部材
3a,32a,41a,92b,112b,122a 開口部
3b,21a,32b,41b,92d,112c 縁部
5,124 半導体素子
7,125 ワイヤ
8,61,102,127 導電性接着材料
9,21,33,71,81,126 第2の放熱部材
9a,81a,126a 孔
9b,21b,33a,71a,81c,126b 上面
10,128 樹脂
11,129 半田ボール
71b,111b,112a VDホール
81b,92a アンカーホール
91b 溶接端子
92c レーザ照射ポイント
101b サーマルビア
103 サーマルボール
124a,305a パッド
Claims (10)
- 電極が設けられた基板と、
前記基板上に配置され、前記電極に対応する位置に第一の貫通孔が設けられた第一の放熱部材と、
前記第一の放熱部材上に配置され、前記電極に電気的に接続された半導体素子と、
前記半導体素子上を覆い、前記第一の放熱部材と熱的に接続された第二の放熱部材と、
前記半導体素子と前記第二の放熱部材との間に配設された絶縁部材と、
を有することを特徴とする半導体装置。 - 前記基板の前記半導体素子が搭載された位置に第二の貫通孔が設けられていることを特徴とする請求項1記載の半導体装置。
- 前記基板は、前記半導体素子が搭載された位置に、第三の貫通孔を有し、
前記第一の放熱部材は、前記半導体素子が搭載された位置に、前記第三の貫通孔に連通する第四の貫通孔を有することを特徴とする請求項1記載の半導体装置。 - 前記第二の放熱部材には、前記第二の放熱部材を貫通する第五の貫通孔が設けられていることを特徴とする請求項1記載の半導体装置。
- 前記第二の放熱部材は一部を残して樹脂で封止されていることを特徴とする請求項1乃至4のいずれか一項に記載の半導体装置。
- 前記第一の放熱部材と前記第二の放熱部材とは、導電性接着材料を介して接合されていることを特徴とする請求項1乃至5のいずれか一項に記載の半導体装置。
- 前記第一の放熱部材と前記第二の放熱部材とは、溶接されていることを特徴とする請求項1乃至5のいずれか一項に記載の半導体装置。
- 前記半導体素子と前記電極とは、ボンディングワイヤにより、前記第一の貫通孔を通して電気的に接続されていることを特徴とする請求項1乃至7のいずれか一項に記載の半導体装置。
- 電極が設けられた基板上に、前記電極に対応する位置に貫通孔が設けられた第一の放熱部材を配設する工程と、
前記第一の放熱部材上に半導体素子を配置する工程と、
前記半導体素子と前記電極とを電気的に接続する工程と、
前記半導体素子を覆う第二の放熱部材を前記第一の放熱部材に熱的に接続する工程と、
を有することを特徴とする半導体装置の製造方法。 - 前記半導体素子と前記電極とを電気的に接続する工程は、前記半導体素子と前記電極とを、ボンディングワイヤにより、前記貫通孔を通して電気的に接続する工程を含むことを特徴とする請求項9記載の半導体装置の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006249233A JP5017977B2 (ja) | 2006-09-14 | 2006-09-14 | 半導体装置およびその製造方法 |
TW096127798A TWI371836B (en) | 2006-09-14 | 2007-07-30 | Semiconductor device and method for fabricating the same |
KR1020070082288A KR100930283B1 (ko) | 2006-09-14 | 2007-08-16 | 반도체 장치 및 그 제조 방법 |
US11/843,948 US7692294B2 (en) | 2006-09-14 | 2007-08-23 | Semiconductor device and method for fabricating the same |
CN2007101468682A CN101145546B (zh) | 2006-09-14 | 2007-08-24 | 半导体器件及其制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006249233A JP5017977B2 (ja) | 2006-09-14 | 2006-09-14 | 半導体装置およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008071934A JP2008071934A (ja) | 2008-03-27 |
JP5017977B2 true JP5017977B2 (ja) | 2012-09-05 |
Family
ID=39187734
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006249233A Expired - Fee Related JP5017977B2 (ja) | 2006-09-14 | 2006-09-14 | 半導体装置およびその製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7692294B2 (ja) |
JP (1) | JP5017977B2 (ja) |
KR (1) | KR100930283B1 (ja) |
CN (1) | CN101145546B (ja) |
TW (1) | TWI371836B (ja) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8643147B2 (en) | 2007-11-01 | 2014-02-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Seal ring structure with improved cracking protection and reduced problems |
JP5550225B2 (ja) * | 2008-09-29 | 2014-07-16 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | 回路装置 |
US7906836B2 (en) * | 2008-11-14 | 2011-03-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Heat spreader structures in scribe lines |
JP2010147060A (ja) * | 2008-12-16 | 2010-07-01 | Sharp Corp | 半導体装置 |
KR101027984B1 (ko) * | 2009-05-26 | 2011-04-13 | 우진공업주식회사 | 히트싱크를 갖는 기판보드 어셈블리 |
KR101067980B1 (ko) * | 2009-12-28 | 2011-09-26 | 주식회사 케이이씨 | 전력 반도체 패키지 및 그 제조 방법 |
JP2012004282A (ja) * | 2010-06-16 | 2012-01-05 | Mitsubishi Electric Corp | 半導体装置 |
JP5606273B2 (ja) * | 2010-10-29 | 2014-10-15 | キヤノン株式会社 | 放射線画像撮影装置 |
JP2012164846A (ja) * | 2011-02-08 | 2012-08-30 | Renesas Electronics Corp | 半導体装置、半導体装置の製造方法、及び表示装置 |
US8962393B2 (en) * | 2011-09-23 | 2015-02-24 | Stats Chippac Ltd. | Integrated circuit packaging system with heat shield and method of manufacture thereof |
US20150216074A1 (en) * | 2012-08-02 | 2015-07-30 | Mitsubishi Electric Corporation | Heat dissipation plate |
CN104627438A (zh) * | 2015-03-11 | 2015-05-20 | 南京一擎机械制造有限公司 | 电热丝紧固座、电热丝紧固装置及电热丝紧组件 |
US20170127567A1 (en) * | 2015-10-28 | 2017-05-04 | Stmicroelectronics (Grenoble 2) Sas | Electronic device equipped with a heat sink |
JP6678506B2 (ja) * | 2016-04-28 | 2020-04-08 | 株式会社アムコー・テクノロジー・ジャパン | 半導体パッケージ及び半導体パッケージの製造方法 |
KR102086364B1 (ko) | 2018-03-05 | 2020-03-09 | 삼성전자주식회사 | 반도체 패키지 |
FR3116944A1 (fr) * | 2020-12-02 | 2022-06-03 | Stmicroelectronics (Grenoble 2) Sas | Boîtier de circuit integre |
WO2023203754A1 (ja) * | 2022-04-22 | 2023-10-26 | 三菱電機株式会社 | コンデンサユニットおよび電子機器 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3322429B2 (ja) * | 1992-06-04 | 2002-09-09 | 新光電気工業株式会社 | 半導体装置 |
US5285350A (en) * | 1992-08-28 | 1994-02-08 | Aavid Engineering, Inc. | Heat sink plate for multiple semi-conductors |
KR100201380B1 (ko) * | 1995-11-15 | 1999-06-15 | 김규현 | Bga 반도체 패키지의 열방출 구조 |
JP3535653B2 (ja) * | 1996-02-22 | 2004-06-07 | 株式会社フジクラ | 電子素子の冷却構造 |
KR100474193B1 (ko) * | 1997-08-11 | 2005-07-21 | 삼성전자주식회사 | 비지에이패키지및그제조방법 |
JP3119649B2 (ja) | 1999-03-30 | 2000-12-25 | 大衆電腦股▲ふん▼有限公司 | 両面に放熱構造を具えた半導体装置及びその製造方法 |
JP2001102495A (ja) * | 1999-09-28 | 2001-04-13 | Toshiba Corp | 半導体装置 |
JP3269815B2 (ja) * | 1999-12-13 | 2002-04-02 | 富士通株式会社 | 半導体装置及びその製造方法 |
KR100389920B1 (ko) * | 2000-12-12 | 2003-07-04 | 삼성전자주식회사 | 열팽창에 의한 신뢰성 저하를 개선할 수 있는 반도체 모듈 |
JP4376798B2 (ja) | 2001-07-26 | 2009-12-02 | 株式会社デンソー | 半導体装置 |
KR20030045950A (ko) * | 2001-12-03 | 2003-06-12 | 삼성전자주식회사 | 방열판을 구비한 멀티 칩 패키지 |
KR20040061860A (ko) * | 2002-12-31 | 2004-07-07 | 주식회사 칩팩코리아 | 티이씨에스피 |
US20050051893A1 (en) * | 2003-09-05 | 2005-03-10 | Taiwan Semiconductor Manufacturing Co. | SBGA design for low-k integrated circuits (IC) |
CN100362654C (zh) * | 2003-12-12 | 2008-01-16 | 矽统科技股份有限公司 | 具有散热装置的球栅阵列封装 |
JP2006019340A (ja) * | 2004-06-30 | 2006-01-19 | Tdk Corp | 半導体ic内蔵基板 |
JP5023604B2 (ja) * | 2006-08-09 | 2012-09-12 | 富士電機株式会社 | 半導体装置 |
-
2006
- 2006-09-14 JP JP2006249233A patent/JP5017977B2/ja not_active Expired - Fee Related
-
2007
- 2007-07-30 TW TW096127798A patent/TWI371836B/zh not_active IP Right Cessation
- 2007-08-16 KR KR1020070082288A patent/KR100930283B1/ko not_active IP Right Cessation
- 2007-08-23 US US11/843,948 patent/US7692294B2/en not_active Expired - Fee Related
- 2007-08-24 CN CN2007101468682A patent/CN101145546B/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
TW200818425A (en) | 2008-04-16 |
KR100930283B1 (ko) | 2009-12-09 |
US20080067672A1 (en) | 2008-03-20 |
JP2008071934A (ja) | 2008-03-27 |
TWI371836B (en) | 2012-09-01 |
CN101145546A (zh) | 2008-03-19 |
CN101145546B (zh) | 2010-06-09 |
US7692294B2 (en) | 2010-04-06 |
KR20080024964A (ko) | 2008-03-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5017977B2 (ja) | 半導体装置およびその製造方法 | |
KR100583494B1 (ko) | 반도체패키지 | |
US8067823B2 (en) | Chip scale package having flip chip interconnect on die paddle | |
JP3888439B2 (ja) | 半導体装置の製造方法 | |
KR100374241B1 (ko) | 반도체 장치 및 그 제조 방법 | |
JP2003249607A (ja) | 半導体装置及びその製造方法、回路基板並びに電子機器 | |
JP2008091714A (ja) | 半導体装置 | |
US7705469B2 (en) | Lead frame, semiconductor device using same and manufacturing method thereof | |
JP2006295119A (ja) | 積層型半導体装置 | |
JP3972183B2 (ja) | 半導体装置及びその製造方法、回路基板並びに電子機器 | |
JP2001308258A (ja) | 半導体パッケージ及びその製造方法 | |
JP5397278B2 (ja) | 半導体装置 | |
JP3695458B2 (ja) | 半導体装置、回路基板並びに電子機器 | |
JPH10335577A (ja) | 半導体装置及びその製造方法 | |
JP2005044989A (ja) | 半導体パッケージ及びその製造方法 | |
JPH09330994A (ja) | 半導体装置 | |
JP2007150346A (ja) | 半導体装置及びその製造方法、回路基板並びに電子機器 | |
JP2002124627A (ja) | 半導体装置及びその製造方法 | |
JP7499114B2 (ja) | 半導体装置及びその製造方法 | |
JP2008270511A (ja) | 電子装置 | |
JP2004095612A (ja) | 半導体装置及び配線基板 | |
JP2007234683A (ja) | 半導体装置およびその製造方法 | |
JP2001007255A (ja) | 高効率放熱型チップ寸法パッケージ方法及び装置 | |
TWI286831B (en) | A chip package structure | |
JP2004247669A (ja) | 半導体装置の実装構造 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A712 Effective date: 20080729 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20090623 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20100104 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120228 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120419 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120515 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120528 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150622 Year of fee payment: 3 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
LAPS | Cancellation because of no payment of annual fees |