JP4954580B2 - 半導体装置及びその作製方法、並びに半導体装置の測定方法 - Google Patents
半導体装置及びその作製方法、並びに半導体装置の測定方法 Download PDFInfo
- Publication number
- JP4954580B2 JP4954580B2 JP2006084606A JP2006084606A JP4954580B2 JP 4954580 B2 JP4954580 B2 JP 4954580B2 JP 2006084606 A JP2006084606 A JP 2006084606A JP 2006084606 A JP2006084606 A JP 2006084606A JP 4954580 B2 JP4954580 B2 JP 4954580B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- film
- terminal portion
- element layer
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2607—Circuits therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
- G01R31/2822—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere of microwave or radiofrequency circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68359—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6661—High-frequency adaptations for passive devices
- H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Automation & Control Theory (AREA)
- General Engineering & Computer Science (AREA)
- Thin Film Transistor (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Tests Of Electronic Circuits (AREA)
- Wire Bonding (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
本実施の形態では、可撓性基板上に複数の無線チップを作製すると同時に、TEG用のチップを作製する工程の一例について説明する。
本実施の形態では、可撓性基板上に複数の無線チップを作製すると同時にTEG用のチップを作製し、TEG用のチップの特性評価や不良解析をした後の結果をどのように反映するかについての一例を説明する。
1602 ドレイン(ソース)
1603 ゲート
1604 配線
1605 配線
1606 配線
1607 導電体
1608 導電体
1609 導電体
1610 可撓性を有する配線基板
1611 可撓性を有する配線基板
1621 端子部
1622 端子部
Claims (17)
- 可撓性を有する第1及び第2のフィルムにより封止されている検査素子を有し、
前記検査素子は端子部を有し、
前記端子部上に、異方性導電体を介して可撓性を有する配線基板に電気的に接続させるためのコンタクトホールが設けられていることを特徴とする半導体装置。 - 可撓性を有する第1及び第2のフィルムにより封止されている検査素子を有し、
前記検査素子は端子部を有し、
前記端子部は、当該端子部上に形成されたコンタクトホールに設けられた異方性導電体を介して可撓性を有する配線基板に電気的に接続されていることを特徴とする半導体装置。 - 汚染防止膜と、
前記汚染防止膜上に形成され、端子部を有する検査素子が設けられた素子層と、
前記素子層上に形成された、該素子層の強度を確保する層と、を有し、
前記汚染防止膜、前記検査素子、及び前記素子層の強度を確保する層は、可撓性を有する第1及び第2のフィルムにより封止されており、
前記端子部は、当該端子部上に形成されたコンタクトホールに設けられた異方性導電体を介して可撓性を有する配線基板に電気的に接続されていることを特徴とする半導体装置。 - 請求項3において、前記汚染防止膜は、酸化珪素、窒化珪素、酸化窒化珪素、または窒化酸化珪素からなることを特徴とする半導体装置。
- 請求項3または4において、前記素子層の強度を確保する層は、有機材料または無機材料が用いられていることを特徴とする半導体装置。
- 請求項1乃至5のいずれか一において、前記異方性導電体は、異方性導電ペーストまたは異方性導電フィルムであることを特徴とする半導体装置。
- 基板上に剥離層を形成し、
前記剥離層上に端子部を有する検査素子が設けられた素子層を形成し、
前記剥離層及び前記素子層を選択的に除去して開口部を形成した後、前記基板から前記素子層を分離し、
可撓性を有する第1及び第2のフィルムを用いて前記素子層を封止し、
前記端子部上に形成された前記第1のフィルムを除去して前記端子部に達するコンタクトホールを形成し、
前記コンタクトホールに導電性材料を含有する樹脂を充填し、
前記充填された樹脂上に可撓性を有する配線基板を配置させた後に加熱することにより、前記導電性材料を含有する樹脂を介して前記端子部と前記可撓性を有する配線基板とを電気的に接続することを特徴とする半導体装置の作製方法。 - 基板上に剥離層を形成し、
前記剥離層上に端子部を有する検査素子が設けられた素子層を形成し、
前記剥離層及び前記素子層を選択的に除去して開口部を形成した後、前記基板から前記素子層を分離し、
可撓性を有する第1及び第2のフィルムを用いて前記素子層を封止し、
前記端子部上に形成された前記第1のフィルムを除去して前記端子部を露出させ、
異方性導電フィルムを用いて前記露出された端子部と可撓性を有する配線基板とを電気的に接続することを特徴とする半導体装置の作製方法。 - 請求項7または8において、前記端子部上に形成された前記第1のフィルムをレーザー照射により除去することを特徴とする半導体装置の作製方法。
- 基板上に下地膜を形成し、
前記下地膜上に剥離層を形成し、
前記剥離層上に汚染防止膜を形成し、
前記汚染防止膜上に薄膜トランジスタ、及び端子部を有する検査素子が設けられた素子層を形成し、
前記素子層上に該素子層の強度を確保する層を形成し、
前記剥離層、前記汚染防止膜、前記素子層、及び前記素子層の強度を確保する層を選択的に除去して、開口部を形成した後、前記基板から前記汚染防止膜、前記素子層、及び前記素子層の強度を確保する層を分離し、
可撓性を有する第1及び第2のフィルムを用いて前記汚染防止膜、前記素子層、及び前記素子層の強度を確保する層を封止し、
前記端子部上に形成された前記第1のフィルム及び素子層の強度を確保する層を除去して前記端子部に達するコンタクトホールを形成し、
前記コンタクトホールに導電性材料を含有する樹脂を充填し、
前記充填された樹脂上に可撓性を有する配線基板を配置させた後に加熱することにより、前記導電性材料を含有する樹脂を介して前記端子部と前記可撓性を有する配線基板とを電気的に接続することを特徴とする半導体装置の作製方法。 - 基板上に下地膜を形成し、
前記下地膜上に剥離層を形成し、
前記剥離層上に汚染防止膜を形成し、
前記汚染防止膜上に薄膜トランジスタ、及び端子部を有する検査素子が設けられた素子層を形成し、
前記素子層上に該素子層の強度を確保する層を形成し、
前記剥離層、前記汚染防止膜、前記素子層、及び前記素子層の強度を確保する層を選択的に除去して、開口部を形成した後、前記基板から前記汚染防止膜、前記素子層、及び前記素子層の強度を確保する層を分離し、
可撓性を有する第1及び第2のフィルムを用いて前記汚染防止膜、前記素子層、及び前記素子層の強度を確保する層を封止し、
前記端子部上に形成された前記第1のフィルム及び前記素子層の強度を確保する層を除去して前記端子部を露出させ、
異方性導電フィルムを用いて前記露出された端子部と可撓性を有する配線基板とを電気的に接続することを特徴とする半導体装置の作製方法。 - 請求項10または11において、前記端子部上に形成された前記第1のフィルム及び前記素子層の強度を確保する層をレーザー照射により除去することを特徴とする半導体装置の作製方法。
- 請求項10乃至12のいずれか一において、前記下地膜として、酸化珪素、窒化珪素、酸化窒化珪素、または窒化酸化珪素を用いることを特徴とする半導体装置の作製方法。
- 請求項10乃至13のいずれか一において、前記素子層の強度を確保する層として、有機材料、または無機材料を用いることを特徴とする半導体装置の作製方法。
- 請求項7乃至14のいずれか一において、前記剥離層として、タングステン、モリブデン、ニオブ、チタン、またはシリコンを含んだ金属膜を用いることを特徴とする半導体装置の作製方法。
- 端子部を有する検査素子が設けられた素子層が、可撓性を有する第1及び第2のフィルムにより封止されている半導体装置の測定方法であって、
前記端子部上に形成された前記第1のフィルムを除去して、前記端子部に達するコンタクトホールを形成し、
前記コンタクトホールに導電性材料を含有する樹脂を充填し、
前記充填された樹脂上に可撓性を有する配線基板を配置させた後に加熱することにより、前記導電性材料を含有する樹脂を介して前記端子部と前記可撓性を有する配線基板とを電気的に接続した後に測定を行うことを特徴とする半導体装置の測定方法。 - 端子部を有する検査素子が設けられた素子層が、可撓性を有する第1及び第2のフィルムにより封止されている半導体装置の測定方法であって、
前記端子部上に形成された前記第1のフィルムを除去して、前記端子部を露出させ、
異方性導電フィルムを用いて前記露出された端子部と可撓性を有する配線基板とを電気的に接続した後に測定を行うことを特徴とする半導体装置の測定方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006084606A JP4954580B2 (ja) | 2005-03-28 | 2006-03-27 | 半導体装置及びその作製方法、並びに半導体装置の測定方法 |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005093295 | 2005-03-28 | ||
JP2005093295 | 2005-03-28 | ||
JP2006084606A JP4954580B2 (ja) | 2005-03-28 | 2006-03-27 | 半導体装置及びその作製方法、並びに半導体装置の測定方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006310810A JP2006310810A (ja) | 2006-11-09 |
JP4954580B2 true JP4954580B2 (ja) | 2012-06-20 |
Family
ID=37053276
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006084606A Expired - Fee Related JP4954580B2 (ja) | 2005-03-28 | 2006-03-27 | 半導体装置及びその作製方法、並びに半導体装置の測定方法 |
Country Status (5)
Country | Link |
---|---|
US (2) | US8822272B2 (ja) |
JP (1) | JP4954580B2 (ja) |
CN (1) | CN101151544B (ja) |
TW (2) | TWI591743B (ja) |
WO (1) | WO2006104019A1 (ja) |
Families Citing this family (47)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7456104B2 (en) * | 2005-05-31 | 2008-11-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
US7808253B2 (en) | 2005-12-02 | 2010-10-05 | Semiconductor Energy Laboratory Co., Ltd. | Test method of microstructure body and micromachine |
KR101318946B1 (ko) * | 2007-08-09 | 2013-10-17 | 삼성전자주식회사 | 테스트 장치, 스태틱 메모리 테스트 장치 및 반도체 집적회로 장치 |
US8053253B2 (en) * | 2008-06-06 | 2011-11-08 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing semiconductor device |
WO2010035625A1 (en) * | 2008-09-25 | 2010-04-01 | Semiconductor Energy Laboratory Co., Ltd. | Semi conductor device |
PL2251454T3 (pl) | 2009-05-13 | 2014-12-31 | Sio2 Medical Products Inc | Powlekanie i kontrola pojemnika |
US9545360B2 (en) | 2009-05-13 | 2017-01-17 | Sio2 Medical Products, Inc. | Saccharide protective coating for pharmaceutical package |
US9458536B2 (en) | 2009-07-02 | 2016-10-04 | Sio2 Medical Products, Inc. | PECVD coating methods for capped syringes, cartridges and other articles |
US9142804B2 (en) * | 2010-02-09 | 2015-09-22 | Samsung Display Co., Ltd. | Organic light-emitting device including barrier layer and method of manufacturing the same |
US8519729B2 (en) * | 2010-02-10 | 2013-08-27 | Sunpower Corporation | Chucks for supporting solar cell in hot spot testing |
US11624115B2 (en) | 2010-05-12 | 2023-04-11 | Sio2 Medical Products, Inc. | Syringe with PECVD lubrication |
US9878101B2 (en) | 2010-11-12 | 2018-01-30 | Sio2 Medical Products, Inc. | Cyclic olefin polymer vessels and vessel coating methods |
US8659015B2 (en) * | 2011-03-04 | 2014-02-25 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
US9272095B2 (en) | 2011-04-01 | 2016-03-01 | Sio2 Medical Products, Inc. | Vessels, contact surfaces, and coating and inspection apparatus and methods |
EP2776603B1 (en) | 2011-11-11 | 2019-03-06 | SiO2 Medical Products, Inc. | PASSIVATION, pH PROTECTIVE OR LUBRICITY COATING FOR PHARMACEUTICAL PACKAGE, COATING PROCESS AND APPARATUS |
US11116695B2 (en) | 2011-11-11 | 2021-09-14 | Sio2 Medical Products, Inc. | Blood sample collection tube |
KR101879831B1 (ko) * | 2012-03-21 | 2018-07-20 | 삼성디스플레이 주식회사 | 플렉시블 표시 장치, 유기 발광 표시 장치 및 플렉시블 표시 장치용 원장 기판 |
CN104854257B (zh) | 2012-11-01 | 2018-04-13 | Sio2医药产品公司 | 涂层检查方法 |
US9903782B2 (en) | 2012-11-16 | 2018-02-27 | Sio2 Medical Products, Inc. | Method and apparatus for detecting rapid barrier coating integrity characteristics |
US9764093B2 (en) | 2012-11-30 | 2017-09-19 | Sio2 Medical Products, Inc. | Controlling the uniformity of PECVD deposition |
EP2925903B1 (en) | 2012-11-30 | 2022-04-13 | Si02 Medical Products, Inc. | Controlling the uniformity of pecvd deposition on medical syringes, cartridges, and the like |
US9662450B2 (en) | 2013-03-01 | 2017-05-30 | Sio2 Medical Products, Inc. | Plasma or CVD pre-treatment for lubricated pharmaceutical package, coating process and apparatus |
KR102336796B1 (ko) | 2013-03-11 | 2021-12-10 | 에스아이오2 메디컬 프로덕츠, 인크. | 코팅된 패키징 |
US9937099B2 (en) | 2013-03-11 | 2018-04-10 | Sio2 Medical Products, Inc. | Trilayer coated pharmaceutical packaging with low oxygen transmission rate |
WO2014144926A1 (en) | 2013-03-15 | 2014-09-18 | Sio2 Medical Products, Inc. | Coating method |
CN103730384A (zh) * | 2013-12-13 | 2014-04-16 | 深圳市华星光电技术有限公司 | 一种tft电性量测方法及装置 |
EP3122917B1 (en) | 2014-03-28 | 2020-05-06 | SiO2 Medical Products, Inc. | Antistatic coatings for plastic vessels |
US10199283B1 (en) | 2015-02-03 | 2019-02-05 | Pdf Solutions, Inc. | Method for processing a semiconductor wager using non-contact electrical measurements indicative of a resistance through a stitch, where such measurements are obtained by scanning a pad comprised of at least three parallel conductive stripes using a moving stage with beam deflection to account for motion of the stage |
US9799575B2 (en) | 2015-12-16 | 2017-10-24 | Pdf Solutions, Inc. | Integrated circuit containing DOEs of NCEM-enabled fill cells |
JP2018523538A (ja) | 2015-08-18 | 2018-08-23 | エスアイオーツー・メディカル・プロダクツ・インコーポレイテッド | 低酸素透過速度を有する薬剤包装及び他の包装 |
US10978438B1 (en) | 2015-12-16 | 2021-04-13 | Pdf Solutions, Inc. | IC with test structures and E-beam pads embedded within a contiguous standard cell area |
US10593604B1 (en) | 2015-12-16 | 2020-03-17 | Pdf Solutions, Inc. | Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cells |
US9929063B1 (en) | 2016-04-04 | 2018-03-27 | Pdf Solutions, Inc. | Process for making an integrated circuit that includes NCEM-Enabled, tip-to-side gap-configured fill cells, with NCEM pads formed from at least three conductive stripes positioned between adjacent gates |
US9905553B1 (en) | 2016-04-04 | 2018-02-27 | Pdf Solutions, Inc. | Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, AACNT-short-configured, GATECNT-short-configured, and metal-short-configured, NCEM-enabled fill cells |
US9653446B1 (en) | 2016-04-04 | 2017-05-16 | Pdf Solutions, Inc. | Integrated circuit containing standard logic cells and library-compatible, NCEM-enabled fill cells, including at least via-open-configured, AACNT-short-configured, TS-short-configured, and AA-short-configured, NCEM-enabled fill cells |
US9748153B1 (en) | 2017-03-29 | 2017-08-29 | Pdf Solutions, Inc. | Process for making and using a semiconductor wafer containing first and second does of standard cell compatible, NCEM-enabled fill cells, with the first DOE including side-to-side short configured fill cells, and the second DOE including tip-to-side short configure |
US9773774B1 (en) | 2017-03-30 | 2017-09-26 | Pdf Solutions, Inc. | Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including chamfer short configured fill cells, and the second DOE including corner short configured fill cells |
US9768083B1 (en) | 2017-06-27 | 2017-09-19 | Pdf Solutions, Inc. | Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including merged-via open configured fill cells, and the second DOE including snake open configured fill cells |
US9786649B1 (en) | 2017-06-27 | 2017-10-10 | Pdf Solutions, Inc. | Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including via open configured fill cells, and the second DOE including stitch open configured fill cells |
US10096530B1 (en) | 2017-06-28 | 2018-10-09 | Pdf Solutions, Inc. | Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including merged-via open configured fill cells, and the second DOE including stitch open configured fill cells |
US9865583B1 (en) | 2017-06-28 | 2018-01-09 | Pdf Solutions, Inc. | Process for making and using a semiconductor wafer containing first and second DOEs of standard cell compatible, NCEM-enabled fill cells, with the first DOE including snake open configured fill cells, and the second DOE including stitch open configured fill cells |
KR102493339B1 (ko) * | 2017-10-10 | 2023-01-31 | 삼성디스플레이 주식회사 | 표시 장치 및 그것의 제조 방법 |
CN111736380A (zh) * | 2019-07-26 | 2020-10-02 | 友达光电股份有限公司 | 显示面板及其制造方法 |
CN110501992B (zh) * | 2019-08-07 | 2021-07-20 | 格力电器(武汉)有限公司 | WiFi检测板测试装置 |
NL2023792B1 (en) | 2019-08-16 | 2021-03-24 | Illumina Inc | Method for measuring thermal resistance at interface between consumable and thermocycler |
CN110793679A (zh) * | 2019-12-06 | 2020-02-14 | 联合微电子中心有限责任公司 | 一种柔性集成式阵列传感器及其晶圆级制造工艺 |
TWI760185B (zh) | 2021-04-14 | 2022-04-01 | 愛盛科技股份有限公司 | 漏電流偵測電路與磁通門驅動器 |
Family Cites Families (45)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0574890A (ja) * | 1991-09-18 | 1993-03-26 | Nec Corp | 半導体装置の故障解析方法 |
JP3364081B2 (ja) | 1995-02-16 | 2003-01-08 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
KR0178134B1 (ko) * | 1996-10-01 | 1999-04-15 | 삼성전자주식회사 | 불연속 절연층 영역을 갖는 반도체 집적회로 소자 및 그 제조방법 |
JP4042182B2 (ja) | 1997-07-03 | 2008-02-06 | セイコーエプソン株式会社 | Icカードの製造方法及び薄膜集積回路装置の製造方法 |
EP0925756B8 (en) * | 1997-12-25 | 2008-08-13 | Nihon Kohden Corporation | Biological signal transmission apparatus |
JP4234244B2 (ja) * | 1998-12-28 | 2009-03-04 | 富士通マイクロエレクトロニクス株式会社 | ウエハーレベルパッケージ及びウエハーレベルパッケージを用いた半導体装置の製造方法 |
JP2000215687A (ja) * | 1999-01-21 | 2000-08-04 | Fujitsu Ltd | 冗長セルを有するメモリデバイス |
JP4588139B2 (ja) * | 1999-08-31 | 2010-11-24 | リンテック株式会社 | Icカードの製造方法 |
JP3874054B2 (ja) | 1999-11-30 | 2007-01-31 | セイコーエプソン株式会社 | 半導体回路内蔵構造体 |
WO2001048556A1 (fr) | 1999-12-28 | 2001-07-05 | Toshiba Tec Kabushiki Kaisha | Dispositif pour fixer un revelateur sur un support d'enregistrement par chauffage par induction d'un rouleau chauffant |
US6288558B1 (en) * | 2000-02-15 | 2001-09-11 | Infineon Technologies Ag | Method for probing semiconductor devices for active measuring of electrical characteristics |
TW507258B (en) | 2000-02-29 | 2002-10-21 | Semiconductor Systems Corp | Display device and method for fabricating the same |
JP4884592B2 (ja) | 2000-03-15 | 2012-02-29 | 株式会社半導体エネルギー研究所 | 発光装置の作製方法及び表示装置の作製方法 |
JP4495295B2 (ja) | 2000-03-15 | 2010-06-30 | 株式会社日立製作所 | 有価証券類の不正利用防止方法および有価証券類の不正利用防止システム |
JP2001349905A (ja) | 2000-06-07 | 2001-12-21 | Mitsubishi Materials Corp | コンタクトプローブおよびその製造方法 |
US6909178B2 (en) * | 2000-09-06 | 2005-06-21 | Sanyo Electric Co., Ltd. | Semiconductor device and method of manufacturing the same |
JP2002110751A (ja) * | 2000-10-03 | 2002-04-12 | Hitachi Ltd | 半導体集積回路装置の検査装置および製造方法 |
JP4053231B2 (ja) | 2000-11-09 | 2008-02-27 | 株式会社日立製作所 | 無線通信装置 |
JP2002217258A (ja) * | 2001-01-22 | 2002-08-02 | Hitachi Ltd | 半導体装置およびその測定方法、ならびに半導体装置の製造方法 |
JP3542080B2 (ja) * | 2001-03-30 | 2004-07-14 | リンテック株式会社 | 半導体チップ担持用接着テープ・シート、半導体チップ担持体、半導体チップマウント方法および半導体チップ包装体 |
JP4567282B2 (ja) | 2001-07-16 | 2010-10-20 | 株式会社半導体エネルギー研究所 | 発光装置の作製方法 |
TW564471B (en) | 2001-07-16 | 2003-12-01 | Semiconductor Energy Lab | Semiconductor device and peeling off method and method of manufacturing semiconductor device |
TW558743B (en) | 2001-08-22 | 2003-10-21 | Semiconductor Energy Lab | Peeling method and method of manufacturing semiconductor device |
KR100944886B1 (ko) | 2001-10-30 | 2010-03-03 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치의 제조 방법 |
TWI264121B (en) | 2001-11-30 | 2006-10-11 | Semiconductor Energy Lab | A display device, a method of manufacturing a semiconductor device, and a method of manufacturing a display device |
JP3792635B2 (ja) * | 2001-12-14 | 2006-07-05 | 富士通株式会社 | 電子装置 |
US7098072B2 (en) * | 2002-03-01 | 2006-08-29 | Agng, Llc | Fluxless assembly of chip size semiconductor packages |
US6596569B1 (en) * | 2002-03-15 | 2003-07-22 | Lucent Technologies Inc. | Thin film transistors |
JP3980918B2 (ja) * | 2002-03-28 | 2007-09-26 | 株式会社東芝 | アクティブマトリクス基板及びその製造方法、表示装置 |
JP2003303379A (ja) | 2002-04-11 | 2003-10-24 | Sanrikkusu:Kk | 警備装置および警備システム |
US6794273B2 (en) * | 2002-05-24 | 2004-09-21 | Fujitsu Limited | Semiconductor device and manufacturing method thereof |
TWI272641B (en) | 2002-07-16 | 2007-02-01 | Semiconductor Energy Lab | Method of manufacturing a semiconductor device |
JP4373085B2 (ja) | 2002-12-27 | 2009-11-25 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法、剥離方法及び転写方法 |
JP4151420B2 (ja) | 2003-01-23 | 2008-09-17 | セイコーエプソン株式会社 | デバイスの製造方法 |
US7043830B2 (en) * | 2003-02-20 | 2006-05-16 | Micron Technology, Inc. | Method of forming conductive bumps |
US7973313B2 (en) | 2003-02-24 | 2011-07-05 | Semiconductor Energy Laboratory Co., Ltd. | Thin film integrated circuit device, IC label, container comprising the thin film integrated circuit, manufacturing method of the thin film integrated circuit device, manufacturing method of the container, and management method of product having the container |
JP3783707B2 (ja) | 2003-03-19 | 2006-06-07 | セイコーエプソン株式会社 | 検査素子付基板並びに電気光学装置用基板及び電気光学装置及び電子機器 |
JP3574450B1 (ja) * | 2003-05-16 | 2004-10-06 | 沖電気工業株式会社 | 半導体装置、及び半導体装置の製造方法 |
JP2004359363A (ja) | 2003-06-02 | 2004-12-24 | Nec Corp | 商品管理システムおよび商品管理プログラム |
US7125101B2 (en) * | 2003-07-30 | 2006-10-24 | Hewlett-Packard Development Company, L.P. | Photonically activated fluid ejector apparatus and methods |
US6956386B2 (en) * | 2003-08-01 | 2005-10-18 | Amst Company Limited | Micro-cantilever type probe card |
JP4566527B2 (ja) * | 2003-08-08 | 2010-10-20 | 日東電工株式会社 | 再剥離型粘着シート |
US7271076B2 (en) * | 2003-12-19 | 2007-09-18 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of thin film integrated circuit device and manufacturing method of non-contact type thin film integrated circuit device |
US7417550B2 (en) * | 2004-12-20 | 2008-08-26 | 3M Innovative Properties Company | Environmentally friendly radio frequency identification (RFID) labels and methods of using such labels |
US8224447B2 (en) * | 2005-11-30 | 2012-07-17 | Medtronic, Inc. | Medical device packaging system |
-
2006
- 2006-03-17 WO PCT/JP2006/305889 patent/WO2006104019A1/en active Application Filing
- 2006-03-17 US US11/885,958 patent/US8822272B2/en not_active Expired - Fee Related
- 2006-03-17 CN CN2006800104146A patent/CN101151544B/zh not_active Expired - Fee Related
- 2006-03-27 TW TW103140250A patent/TWI591743B/zh not_active IP Right Cessation
- 2006-03-27 TW TW95110563A patent/TWI471959B/zh not_active IP Right Cessation
- 2006-03-27 JP JP2006084606A patent/JP4954580B2/ja not_active Expired - Fee Related
-
2014
- 2014-08-28 US US14/471,801 patent/US9261554B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
WO2006104019A1 (en) | 2006-10-05 |
CN101151544B (zh) | 2011-08-03 |
TW201521132A (zh) | 2015-06-01 |
US9261554B2 (en) | 2016-02-16 |
US20080277660A1 (en) | 2008-11-13 |
US8822272B2 (en) | 2014-09-02 |
TW200703536A (en) | 2007-01-16 |
TWI471959B (zh) | 2015-02-01 |
CN101151544A (zh) | 2008-03-26 |
TWI591743B (zh) | 2017-07-11 |
JP2006310810A (ja) | 2006-11-09 |
US20140368230A1 (en) | 2014-12-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4954580B2 (ja) | 半導体装置及びその作製方法、並びに半導体装置の測定方法 | |
KR101254277B1 (ko) | 라미네이팅 시스템, ic 시트, ic 시트 두루마리, 및ic 칩의 제조방법 | |
US8338931B2 (en) | Semiconductor device and product tracing system utilizing the semiconductor device having top and bottom fibrous sealing layers | |
US7968427B2 (en) | Manufacturing method of semiconductor device | |
KR101217109B1 (ko) | 아이디 라벨, 아이디 태그 및 아이디 카드 | |
KR101153470B1 (ko) | 박막 집적회로 제작방법 및 소자 기판 | |
JP4836465B2 (ja) | 薄膜集積回路の作製方法及び薄膜集積回路用素子基板 | |
US8698262B2 (en) | Wireless chip and manufacturing method of the same | |
KR20050062412A (ko) | 반도체 집적 회로, 반도체 장치, 및 반도체 집적 회로의제조 방법 | |
KR20080108047A (ko) | 반도체 장치 | |
WO2006033451A1 (en) | Semiconductor device and method for manufacturing the same | |
JP2007109216A (ja) | 半導体装置 | |
JP5030388B2 (ja) | 薄膜集積回路の作製方法 | |
JP5072217B2 (ja) | 半導体装置の作製方法 | |
JP4841807B2 (ja) | 薄膜集積回路及び薄型半導体装置 | |
JP4845461B2 (ja) | 半導体装置及びその作製方法 | |
JP4789696B2 (ja) | 半導体装置 | |
JP2006049877A (ja) | Icチップ及びその作製方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20081209 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20120301 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120313 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120314 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 4954580 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150323 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150323 Year of fee payment: 3 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |