JP4773089B2 - 半導体パッケージおよびその製造方法 - Google Patents

半導体パッケージおよびその製造方法 Download PDF

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Publication number
JP4773089B2
JP4773089B2 JP2004506078A JP2004506078A JP4773089B2 JP 4773089 B2 JP4773089 B2 JP 4773089B2 JP 2004506078 A JP2004506078 A JP 2004506078A JP 2004506078 A JP2004506078 A JP 2004506078A JP 4773089 B2 JP4773089 B2 JP 4773089B2
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JP
Japan
Prior art keywords
silicone
component
sio
composition
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2004506078A
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English (en)
Japanese (ja)
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JP2005526398A5 (https=
JP2005526398A (ja
Inventor
スタントン・デント
リンドン・ラーソン
ロバート・ネルソン
デブラ・ソリズ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dow Silicones Corp
Original Assignee
Dow Corning Corp
Dow Silicones Corp
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Filing date
Publication date
Application filed by Dow Corning Corp, Dow Silicones Corp filed Critical Dow Corning Corp
Publication of JP2005526398A publication Critical patent/JP2005526398A/ja
Publication of JP2005526398A5 publication Critical patent/JP2005526398A5/ja
Application granted granted Critical
Publication of JP4773089B2 publication Critical patent/JP4773089B2/ja
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48—Insulating materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/922—Bond pads being integral with underlying chip-level interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings

Landscapes

  • Compositions Of Macromolecular Compounds (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2004506078A 2002-05-16 2003-03-19 半導体パッケージおよびその製造方法 Expired - Fee Related JP4773089B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/068,755 US6940177B2 (en) 2002-05-16 2002-05-16 Semiconductor package and method of preparing same
US10/068,755 2002-05-16
PCT/US2003/008345 WO2003098682A1 (en) 2002-05-16 2003-03-19 Semiconductor package and method of preparing same

Publications (3)

Publication Number Publication Date
JP2005526398A JP2005526398A (ja) 2005-09-02
JP2005526398A5 JP2005526398A5 (https=) 2006-03-09
JP4773089B2 true JP4773089B2 (ja) 2011-09-14

Family

ID=29418266

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004506078A Expired - Fee Related JP4773089B2 (ja) 2002-05-16 2003-03-19 半導体パッケージおよびその製造方法

Country Status (9)

Country Link
US (1) US6940177B2 (https=)
EP (1) EP1504469B1 (https=)
JP (1) JP4773089B2 (https=)
CN (1) CN1328770C (https=)
AT (1) ATE347737T1 (https=)
AU (1) AU2003230678A1 (https=)
DE (1) DE60310222T2 (https=)
TW (1) TWI265578B (https=)
WO (1) WO2003098682A1 (https=)

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US6870272B2 (en) * 1994-09-20 2005-03-22 Tessera, Inc. Methods of making microelectronic assemblies including compliant interfaces
US6211572B1 (en) 1995-10-31 2001-04-03 Tessera, Inc. Semiconductor chip package with fan-in leads
US6284563B1 (en) 1995-10-31 2001-09-04 Tessera, Inc. Method of making compliant microelectronic assemblies
US20040102022A1 (en) * 2002-11-22 2004-05-27 Tongbi Jiang Methods of fabricating integrated circuitry
JP4193052B2 (ja) * 2003-08-25 2008-12-10 信越化学工業株式会社 高熱伝導性シリコーンゴム組成物並びに定着ロール及び定着ベルト
CN100481415C (zh) * 2004-03-12 2009-04-22 联华电子股份有限公司 芯片封装体及其制造方法
US7190157B2 (en) * 2004-10-25 2007-03-13 Agilent Technologies, Inc. Method and apparatus for layout independent test point placement on a printed circuit board
JP4741230B2 (ja) * 2004-12-28 2011-08-03 東レ・ダウコーニング株式会社 フィルム状シリコーンゴム接着剤
WO2006091793A1 (en) 2005-02-25 2006-08-31 Tessera, Inc. Microelectronic assemblies having compliancy
US7695819B2 (en) * 2005-09-30 2010-04-13 Wacker Chemical Corporation Two piece curable HCR silicone elastomers
JP4993555B2 (ja) * 2005-12-07 2012-08-08 モメンティブ・パフォーマンス・マテリアルズ・ジャパン合同会社 付加反応硬化型シリコーン組成物
TWI296037B (en) * 2006-04-28 2008-04-21 Delta Electronics Inc Light emitting apparatus
GB2444775B (en) * 2006-12-13 2011-06-08 Cambridge Silicon Radio Ltd Chip mounting
US7749886B2 (en) 2006-12-20 2010-07-06 Tessera, Inc. Microelectronic assemblies having compliancy and methods therefor
CN100580914C (zh) * 2007-02-16 2010-01-13 南茂科技股份有限公司 封装导电结构及其形成方法
US20080308932A1 (en) * 2007-06-12 2008-12-18 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor package structures
US7772691B2 (en) * 2007-10-12 2010-08-10 Taiwan Semiconductor Manufacturing Company, Ltd. Thermally enhanced wafer level package
CN101945950A (zh) * 2008-01-17 2011-01-12 陶氏康宁公司 含硅氧烷的成膜组合物
EP2449031B1 (en) 2009-07-03 2014-06-04 Dow Corning Corporation Film forming, silicone containing compositions
US8421226B2 (en) * 2010-02-25 2013-04-16 Infineon Technologies Ag Device including an encapsulated semiconductor chip and manufacturing method thereof
JP5384443B2 (ja) * 2010-07-28 2014-01-08 日東電工株式会社 フリップチップ型半導体裏面用フィルム、ダイシングテープ一体型半導体裏面用フィルム、半導体装置の製造方法、及び、フリップチップ型半導体装置
JP6300218B2 (ja) 2010-12-31 2018-03-28 サムスン エスディアイ カンパニー, リミテッドSamsung Sdi Co., Ltd. 封止材用透光性樹脂組成物、該透光性樹脂を含む封止材および電子素子
TWI575684B (zh) * 2011-06-13 2017-03-21 矽品精密工業股份有限公司 晶片尺寸封裝件
JP2013095809A (ja) * 2011-10-31 2013-05-20 Nitto Denko Corp シリコーン樹脂組成物、シリコーン樹脂シート、光半導体素子装置、および、シリコーン樹脂シートの製造方法。
JP5563695B2 (ja) * 2013-04-17 2014-07-30 株式会社カネカ 半導体のパッケージ用硬化性樹脂組成物および半導体
TW201601358A (zh) * 2014-06-19 2016-01-01 道康寧公司 用於晶圓級ｚ軸熱中介層的可光圖案化聚矽氧
JP6203986B2 (ja) * 2015-05-27 2017-09-27 京セラ株式会社 太陽電池素子およびその製造方法
US9812414B1 (en) 2016-06-17 2017-11-07 Nanya Technology Corporation Chip package and a manufacturing method thereof
US11518883B2 (en) 2016-12-30 2022-12-06 Elkem Silicones Shanghai Co., Ltd. Curable silicone compositions
CN108165014A (zh) * 2017-12-23 2018-06-15 苏州赛源微电子有限公司 一种集成电路芯片的封装方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5171716A (en) 1986-12-19 1992-12-15 North American Philips Corp. Method of manufacturing semiconductor device with reduced packaging stress
US5907190A (en) * 1994-11-24 1999-05-25 Dow Corning Toray Silicone Co., Ltd. Semiconductor device having a cured silicone coating with non uniformly dispersed filler
US6284563B1 (en) * 1995-10-31 2001-09-04 Tessera, Inc. Method of making compliant microelectronic assemblies
JPH09286971A (ja) * 1996-04-19 1997-11-04 Toray Dow Corning Silicone Co Ltd シリコーン系ダイボンディング剤、半導体装置の製造方法および半導体装置
CN1244038A (zh) * 1998-08-04 2000-02-09 长兴化学工业股份有限公司 半导体封装用树脂组合物
US6103552A (en) 1998-08-10 2000-08-15 Lin; Mou-Shiung Wafer scale packaging scheme
AU2497600A (en) * 1999-01-07 2000-07-24 Allied-Signal Inc. Dielectric films from organohydridosiloxane resins
US6239378B1 (en) * 1999-02-02 2001-05-29 Dow Corning Corporation Flame resistant silicone rubber wire and cable coating composition
US6197613B1 (en) 1999-03-23 2001-03-06 Industrial Technology Research Institute Wafer level packaging method and devices formed
US6369185B1 (en) * 1999-03-31 2002-04-09 Dow Corning Toray Silicone Co., Ltd. Curable organopolysiloxane composition, cured products formed therefrom and unified articles
US6277669B1 (en) 1999-09-15 2001-08-21 Industrial Technology Research Institute Wafer level packaging method and packages formed
EP1375553A4 (en) * 2001-01-25 2009-07-29 Sanyo Chemical Ind Ltd HARDENABLE RESIN, HARD RESISTANT RESIN, HARDENABLE FILM AND ISOLATOR

Also Published As

Publication number Publication date
WO2003098682A1 (en) 2003-11-27
CN1666326A (zh) 2005-09-07
EP1504469B1 (en) 2006-12-06
EP1504469A1 (en) 2005-02-09
ATE347737T1 (de) 2006-12-15
TWI265578B (en) 2006-11-01
TW200308030A (en) 2003-12-16
DE60310222D1 (de) 2007-01-18
US20030214051A1 (en) 2003-11-20
AU2003230678A1 (en) 2003-12-02
DE60310222T2 (de) 2007-09-13
JP2005526398A (ja) 2005-09-02
CN1328770C (zh) 2007-07-25
US6940177B2 (en) 2005-09-06

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