JP4418254B2 - 半導体集積回路 - Google Patents

半導体集積回路 Download PDF

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Publication number
JP4418254B2
JP4418254B2 JP2004047508A JP2004047508A JP4418254B2 JP 4418254 B2 JP4418254 B2 JP 4418254B2 JP 2004047508 A JP2004047508 A JP 2004047508A JP 2004047508 A JP2004047508 A JP 2004047508A JP 4418254 B2 JP4418254 B2 JP 4418254B2
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JP
Japan
Prior art keywords
transistor
potential
bit line
read
write
Prior art date
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Expired - Fee Related
Application number
JP2004047508A
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English (en)
Japanese (ja)
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JP2005243059A (ja
JP2005243059A5 (enExample
Inventor
ブライアン・アトウッド
▲隆▼夫 渡部
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
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Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2004047508A priority Critical patent/JP4418254B2/ja
Priority to TW093132384A priority patent/TW200529228A/zh
Priority to KR1020040113742A priority patent/KR20050086362A/ko
Priority to CN2004100615591A priority patent/CN1661723A/zh
Priority to US11/033,157 priority patent/US7139214B2/en
Publication of JP2005243059A publication Critical patent/JP2005243059A/ja
Priority to US11/550,735 priority patent/US7391667B2/en
Publication of JP2005243059A5 publication Critical patent/JP2005243059A5/ja
Application granted granted Critical
Publication of JP4418254B2 publication Critical patent/JP4418254B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Dram (AREA)
  • Thin Film Transistor (AREA)
JP2004047508A 2004-02-24 2004-02-24 半導体集積回路 Expired - Fee Related JP4418254B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2004047508A JP4418254B2 (ja) 2004-02-24 2004-02-24 半導体集積回路
TW093132384A TW200529228A (en) 2004-02-24 2004-10-26 Semiconductor integrated circuit
KR1020040113742A KR20050086362A (ko) 2004-02-24 2004-12-28 반도체 집적회로
CN2004100615591A CN1661723A (zh) 2004-02-24 2004-12-30 半导体集成电路
US11/033,157 US7139214B2 (en) 2004-02-24 2005-01-12 Semiconductor integrated circuit
US11/550,735 US7391667B2 (en) 2004-02-24 2006-10-18 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004047508A JP4418254B2 (ja) 2004-02-24 2004-02-24 半導体集積回路

Publications (3)

Publication Number Publication Date
JP2005243059A JP2005243059A (ja) 2005-09-08
JP2005243059A5 JP2005243059A5 (enExample) 2007-04-05
JP4418254B2 true JP4418254B2 (ja) 2010-02-17

Family

ID=34858171

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004047508A Expired - Fee Related JP4418254B2 (ja) 2004-02-24 2004-02-24 半導体集積回路

Country Status (5)

Country Link
US (2) US7139214B2 (enExample)
JP (1) JP4418254B2 (enExample)
KR (1) KR20050086362A (enExample)
CN (1) CN1661723A (enExample)
TW (1) TW200529228A (enExample)

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US6839258B2 (en) * 2003-05-12 2005-01-04 Micron Technology, Inc. Folded DRAM CAM cell
JP4418254B2 (ja) * 2004-02-24 2010-02-17 株式会社ルネサステクノロジ 半導体集積回路
US7272061B2 (en) * 2005-01-24 2007-09-18 Intel Corporation Dynamic pre-charge level control in semiconductor devices
JP2006228261A (ja) * 2005-02-15 2006-08-31 Micron Technology Inc デジット線絶縁ゲートの負電圧駆動
US7286432B2 (en) * 2005-07-22 2007-10-23 Infineon Technologies Ag Temperature update masking to ensure correct measurement of temperature when references become unstable
JP4335862B2 (ja) * 2005-11-08 2009-09-30 富士通マイクロエレクトロニクス株式会社 半導体集積回路の特性抽出方法及び特性抽出装置
JP2007133927A (ja) * 2005-11-08 2007-05-31 Toshiba Corp 半導体記憶装置及びその制御方法
JP2007193928A (ja) * 2005-12-19 2007-08-02 Matsushita Electric Ind Co Ltd 半導体記憶装置
US7839697B2 (en) * 2006-12-21 2010-11-23 Panasonic Corporation Semiconductor memory device
CN101359505B (zh) * 2008-09-02 2011-04-20 北京芯技佳易微电子科技有限公司 一种读隔离可编程存储器单元及其编程和读取方法
KR101566403B1 (ko) 2008-11-10 2015-11-13 삼성전자주식회사 반도체 소자의 동작 방법
KR101515468B1 (ko) * 2008-12-12 2015-05-06 삼성전자주식회사 표시장치 및 그 동작방법
US7894254B2 (en) * 2009-07-15 2011-02-22 Macronix International Co., Ltd. Refresh circuitry for phase change memory
KR101788521B1 (ko) 2009-10-30 2017-10-19 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR101752348B1 (ko) * 2009-10-30 2017-06-29 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR101761432B1 (ko) * 2009-11-06 2017-07-25 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
CN104600074A (zh) * 2009-11-06 2015-05-06 株式会社半导体能源研究所 半导体装置
KR101928723B1 (ko) 2009-11-20 2018-12-13 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
KR101662359B1 (ko) * 2009-11-24 2016-10-04 가부시키가이샤 한도오따이 에네루기 켄큐쇼 메모리 셀을 포함하는 반도체 장치
KR101811204B1 (ko) * 2010-02-12 2017-12-22 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 그 구동 방법
US8422272B2 (en) * 2010-08-06 2013-04-16 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and driving method thereof
US8634228B2 (en) * 2010-09-02 2014-01-21 Semiconductor Energy Laboratory Co., Ltd. Driving method of semiconductor device
US8406073B1 (en) * 2010-12-22 2013-03-26 Intel Corporation Hierarchical DRAM sensing
US9443984B2 (en) * 2010-12-28 2016-09-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
CN103247331B (zh) * 2012-02-13 2016-01-20 中国科学院微电子研究所 半导体存储器件及其访问方法
JP2013191265A (ja) * 2012-02-17 2013-09-26 Semiconductor Energy Lab Co Ltd 記憶装置、記憶装置の駆動方法、及び該記憶装置を備えた電子機器
CN103503228B (zh) * 2012-02-28 2016-04-06 株式会社村田制作所 高频模块
KR102107591B1 (ko) * 2012-07-18 2020-05-07 가부시키가이샤 한도오따이 에네루기 켄큐쇼 기억 소자 및 프로그래머블 로직 디바이스
KR20140092537A (ko) 2013-01-16 2014-07-24 삼성전자주식회사 메모리 셀 및 이를 포함하는 메모리 장치
JP6076208B2 (ja) * 2013-06-21 2017-02-08 株式会社日本マイクロニクス 配線基板の検査装置および配線基板の検査方法
JP6516978B2 (ja) 2013-07-17 2019-05-22 株式会社半導体エネルギー研究所 半導体装置
KR102168652B1 (ko) 2013-12-16 2020-10-23 삼성전자주식회사 감지 증폭기, 그것을 포함하는 반도체 메모리 장치 및 그것의 읽기 방법
CN104916647A (zh) * 2015-06-18 2015-09-16 中山大学 一种非挥发性无浮栅晶体场效应管存储器
US10614875B2 (en) 2018-01-30 2020-04-07 Micron Technology, Inc. Logical operations using memory cells
JP7332343B2 (ja) * 2019-05-28 2023-08-23 キオクシア株式会社 半導体記憶装置

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Publication number Priority date Publication date Assignee Title
JPH04355297A (ja) * 1991-05-31 1992-12-09 Sanyo Electric Co Ltd 半導体メモリ
US5831896A (en) * 1996-12-17 1998-11-03 International Business Machines Corporation Memory cell
US5995433A (en) * 1998-05-22 1999-11-30 Taiwan Semiconductor Manufacturing Co., Ltd. Three-transistor type DRAM with a refresh circuit
JP2000011642A (ja) 1998-06-24 2000-01-14 Sony Corp ３トランジスタ型ｄｒａｍ
JP3955409B2 (ja) * 1999-03-17 2007-08-08 株式会社ルネサステクノロジ 半導体記憶装置
US6452834B1 (en) * 2001-02-13 2002-09-17 Silicon Access Networks 2T dual-port DRAM in a pure logic process with non-destructive read capability
JP2002269975A (ja) * 2001-03-07 2002-09-20 Hitachi Ltd 半導体記憶装置
US6787835B2 (en) * 2002-06-11 2004-09-07 Hitachi, Ltd. Semiconductor memories
JP2004265944A (ja) * 2003-02-21 2004-09-24 Handotai Rikougaku Kenkyu Center:Kk 半導体記憶装置
US6809979B1 (en) * 2003-03-04 2004-10-26 Fernandez & Associates, Llp Complete refresh scheme for 3T dynamic random access memory cells
JP2004362695A (ja) * 2003-06-05 2004-12-24 Renesas Technology Corp 半導体記憶装置
JP4418254B2 (ja) * 2004-02-24 2010-02-17 株式会社ルネサステクノロジ 半導体集積回路

Also Published As

Publication number Publication date
US7139214B2 (en) 2006-11-21
US20050185474A1 (en) 2005-08-25
JP2005243059A (ja) 2005-09-08
KR20050086362A (ko) 2005-08-30
US7391667B2 (en) 2008-06-24
US20070081380A1 (en) 2007-04-12
TW200529228A (en) 2005-09-01
CN1661723A (zh) 2005-08-31

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