JP4295922B2 - 小型集積回路の作製における用途に適したガス浸漬レーザアニーリング方法 - Google Patents

小型集積回路の作製における用途に適したガス浸漬レーザアニーリング方法 Download PDF

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JP4295922B2
JP4295922B2 JP2000568107A JP2000568107A JP4295922B2 JP 4295922 B2 JP4295922 B2 JP 4295922B2 JP 2000568107 A JP2000568107 A JP 2000568107A JP 2000568107 A JP2000568107 A JP 2000568107A JP 4295922 B2 JP4295922 B2 JP 4295922B2
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silicon
layer
mosfets
metallic material
depth
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JP2002524846A (ja
JP2002524846A5 (https=
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ソミット タルワー，
カート ウェイナー，
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ウルトラテック ステッパー インコーポレイテッド
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P34/00—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices
    • H10P34/40—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation
    • H10P34/42—Irradiation with electromagnetic or particle radiation of wafers, substrates or parts of devices with high-energy radiation with electromagnetic radiation, e.g. laser annealing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist
    • Y10S438/952—Utilizing antireflective layer

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Recrystallisation Techniques (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2000568107A 1998-08-27 1998-11-25 小型集積回路の作製における用途に適したガス浸漬レーザアニーリング方法 Expired - Fee Related JP4295922B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/141,842 US5956603A (en) 1998-08-27 1998-08-27 Gas immersion laser annealing method suitable for use in the fabrication of reduced-dimension integrated circuits
US09/141,842 1998-08-27
PCT/US1998/025264 WO2000013213A1 (en) 1998-08-27 1998-11-25 Gas immersion laser annealing method suitable for use in the fabrication of reduced-dimension integrated circuits

Publications (3)

Publication Number Publication Date
JP2002524846A JP2002524846A (ja) 2002-08-06
JP2002524846A5 JP2002524846A5 (https=) 2006-01-19
JP4295922B2 true JP4295922B2 (ja) 2009-07-15

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JP2000568107A Expired - Fee Related JP4295922B2 (ja) 1998-08-27 1998-11-25 小型集積回路の作製における用途に適したガス浸漬レーザアニーリング方法

Country Status (7)

Country Link
US (1) US5956603A (https=)
EP (1) EP1121713B1 (https=)
JP (1) JP4295922B2 (https=)
KR (1) KR100582484B1 (https=)
DE (1) DE69837054T2 (https=)
TW (1) TW409293B (https=)
WO (1) WO2000013213A1 (https=)

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US6335253B1 (en) 2000-07-12 2002-01-01 Chartered Semiconductor Manufacturing Ltd. Method to form MOS transistors with shallow junctions using laser annealing
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US6391695B1 (en) * 2000-08-07 2002-05-21 Advanced Micro Devices, Inc. Double-gate transistor formed in a thermal process
US6635541B1 (en) * 2000-09-11 2003-10-21 Ultratech Stepper, Inc. Method for annealing using partial absorber layer exposed to radiant energy and article made with partial absorber layer
US6479821B1 (en) * 2000-09-11 2002-11-12 Ultratech Stepper, Inc. Thermally induced phase switch for laser thermal processing
JP2002184984A (ja) * 2000-10-26 2002-06-28 Hynix Semiconductor Inc 半導体素子の製造方法
US6365476B1 (en) 2000-10-27 2002-04-02 Ultratech Stepper, Inc. Laser thermal process for fabricating field-effect transistors
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US6720241B2 (en) * 2001-06-18 2004-04-13 Matsushita Electric Industrial Co., Ltd. Method for manufacturing semiconductor device
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TWI282126B (en) * 2001-08-30 2007-06-01 Semiconductor Energy Lab Method for manufacturing semiconductor device
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US6734081B1 (en) * 2001-10-24 2004-05-11 Lsi Logic Corporation Shallow trench isolation structure for laser thermal processing
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Also Published As

Publication number Publication date
EP1121713A1 (en) 2001-08-08
DE69837054D1 (de) 2007-03-22
EP1121713B1 (en) 2007-02-07
WO2000013213A1 (en) 2000-03-09
TW409293B (en) 2000-10-21
US5956603A (en) 1999-09-21
DE69837054T2 (de) 2007-06-06
JP2002524846A (ja) 2002-08-06
EP1121713A4 (en) 2003-07-16
KR100582484B1 (ko) 2006-05-24
KR20010074629A (ko) 2001-08-04

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