JP4282616B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP4282616B2 JP4282616B2 JP2005029454A JP2005029454A JP4282616B2 JP 4282616 B2 JP4282616 B2 JP 4282616B2 JP 2005029454 A JP2005029454 A JP 2005029454A JP 2005029454 A JP2005029454 A JP 2005029454A JP 4282616 B2 JP4282616 B2 JP 4282616B2
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- Prior art keywords
- dry
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- oxide film
- etching
- contact hole
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- 239000004065 semiconductor Substances 0.000 title claims description 21
- 238000004519 manufacturing process Methods 0.000 title claims description 18
- 238000000034 method Methods 0.000 claims description 42
- 238000005530 etching Methods 0.000 claims description 26
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 23
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 23
- 239000007789 gas Substances 0.000 claims description 21
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 18
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 17
- 238000010438 heat treatment Methods 0.000 claims description 16
- 238000012545 processing Methods 0.000 claims description 16
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 12
- 238000005108 dry cleaning Methods 0.000 claims description 11
- 230000001590 oxidative effect Effects 0.000 claims description 5
- 229910019044 CoSix Inorganic materials 0.000 claims description 2
- 229910005889 NiSix Inorganic materials 0.000 claims description 2
- 238000001312 dry etching Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 77
- 229910005883 NiSi Inorganic materials 0.000 description 20
- 238000004380 ashing Methods 0.000 description 17
- 239000002184 metal Substances 0.000 description 14
- 229910052751 metal Inorganic materials 0.000 description 14
- KRHYYFGTRYWZRS-UHFFFAOYSA-N hydrofluoric acid Substances F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 13
- 230000004888 barrier function Effects 0.000 description 11
- 238000001035 drying Methods 0.000 description 9
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 9
- 229910018553 Ni—O Inorganic materials 0.000 description 8
- 229910021332 silicide Inorganic materials 0.000 description 7
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 7
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 6
- 238000001020 plasma etching Methods 0.000 description 5
- 239000000758 substrate Substances 0.000 description 5
- 238000001941 electron spectroscopy Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 229910018557 Si O Inorganic materials 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- OEYIOHPDSNJKLS-UHFFFAOYSA-N choline Chemical compound C[N+](C)(C)CCO OEYIOHPDSNJKLS-UHFFFAOYSA-N 0.000 description 2
- 229960001231 choline Drugs 0.000 description 2
- 238000004140 cleaning Methods 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000006185 dispersion Substances 0.000 description 2
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Inorganic materials [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 229910019001 CoSi Inorganic materials 0.000 description 1
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- 229910018098 Ni-Si Inorganic materials 0.000 description 1
- 229910018529 Ni—Si Inorganic materials 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000010924 continuous production Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000002365 multiple layer Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
- H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Drying Of Semiconductors (AREA)
Description
図1(a)−(e)は、第1の実施形態に係る半導体装置の製造方法を示している。第1の実施形態は、例えばシリサイド層にメタルコンタクトを形成する例を示している。
第1の実施形態は、コンタクトホール内のダメージ層、エッチング生成物及び自然酸化膜を除去した。第1の実施形態の処理は、例えばエッチングの選択比が異なる複数の絶縁膜内に形成されたコンタクトホールの段差を緩和するためにも適用できる。
Claims (5)
- 導電層上に形成された絶縁膜をドライエッチングすることにより、前記絶縁膜に前記導電層を露出する接続孔を形成し、
露出した前記導電層上に酸化性ガスから励起されるプラズマを供給して、前記接続孔内に生成されたダメージ層をドライ洗浄し、
前記ドライ洗浄により前記接続孔内に生成された生成物をウェット処理により除去し、
NF3、HFのいずれかを含むガスを用いたドライ処理により、前記ウェット処理により前記接続孔内に形成された酸化膜をエッチングし、
前記エッチングにより生成された生成物を熱処理により除去する
ことを特徴とする半導体装置の製造方法。 - 前記導電層は、CoSix、NiSix、ErSix、PtSix、Pd2Sixのいずれかであることを特徴とする請求項1記載の半導体装置の製造方法。
- 前記ウェット処理は、過酸化水素を含む溶液が用いられることを特徴とする請求項1記載の半導体装置の製造方法。
- 導電層上に順次積層されたシリコン窒化膜とシリコン酸化膜をドライエッチングすることにより、前記シリコン窒化膜とシリコン酸化膜に前記導電層を露出する接続孔を形成し、
露出した前記導電層上に酸化性ガスから励起されるプラズマを供給して、前記接続孔内に生成されたダメージ層をドライ洗浄し、
前記ドライ洗浄により前記接続孔内に生成された生成物をウェット処理により除去し、
NF3、HFのいずれかを含むガスを用いたドライ処理により、前記ウェット処理により前記シリコン窒化膜が過剰にエッチングされて前記接続孔内に形成された前記シリコン窒化膜とシリコン酸化膜との段差のうちシリコン酸化膜をエッチングし、
前記エッチングにより生成された生成物を熱処理により除去する
ことを特徴とする半導体装置の製造方法。 - 前記ドライ処理と熱処理は真空断絶なしに行なわれることを特徴とする請求項1又は4に記載の半導体装置の製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005029454A JP4282616B2 (ja) | 2005-02-04 | 2005-02-04 | 半導体装置の製造方法 |
CNB2006100030515A CN100414684C (zh) | 2005-02-04 | 2006-01-26 | 除去了连接孔内的损伤层、自然氧化膜的半导体装置的制造方法 |
US11/346,236 US7605076B2 (en) | 2005-02-04 | 2006-02-03 | Method of manufacturing a semiconductor device from which damage layers and native oxide films in connection holes have been removed |
US12/585,238 US8232197B2 (en) | 2005-02-04 | 2009-09-09 | Method of manufacturing a semiconductor device from which damage layers and native oxide films in connection holes have been removed |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005029454A JP4282616B2 (ja) | 2005-02-04 | 2005-02-04 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006216854A JP2006216854A (ja) | 2006-08-17 |
JP4282616B2 true JP4282616B2 (ja) | 2009-06-24 |
Family
ID=36913321
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005029454A Expired - Fee Related JP4282616B2 (ja) | 2005-02-04 | 2005-02-04 | 半導体装置の製造方法 |
Country Status (3)
Country | Link |
---|---|
US (2) | US7605076B2 (ja) |
JP (1) | JP4282616B2 (ja) |
CN (1) | CN100414684C (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20210035740A (ko) | 2019-09-24 | 2021-04-01 | 도쿄엘렉트론가부시키가이샤 | 에칭 방법, 대미지층의 제거 방법, 및 기억 매체 |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5110885B2 (ja) * | 2007-01-19 | 2012-12-26 | キヤノン株式会社 | 複数の導電性の領域を有する構造体 |
JP4776575B2 (ja) * | 2007-03-28 | 2011-09-21 | 株式会社東芝 | 表面処理方法、エッチング処理方法および電子デバイスの製造方法 |
US20100151677A1 (en) * | 2007-04-12 | 2010-06-17 | Freescale Semiconductor, Inc. | Etch method in the manufacture of a semiconductor device |
KR101330707B1 (ko) | 2007-07-19 | 2013-11-19 | 삼성전자주식회사 | 반도체 장치의 형성 방법 |
JP2009278053A (ja) * | 2008-05-19 | 2009-11-26 | Renesas Technology Corp | 半導体装置およびその製造方法 |
TW201216366A (en) * | 2010-06-28 | 2012-04-16 | Ulvac Inc | Method for removal of oxide film |
CN105101715B (zh) * | 2014-04-25 | 2019-04-26 | 华为技术有限公司 | 防腐镁合金通讯设备及其制备方法 |
US9368394B1 (en) * | 2015-03-31 | 2016-06-14 | Taiwan Semiconductor Manufacturing Company Ltd. | Dry etching gas and method of manufacturing semiconductor device |
CN106571289B (zh) * | 2015-10-13 | 2020-01-03 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制备方法、电子装置 |
CN107731843A (zh) * | 2017-08-29 | 2018-02-23 | 长江存储科技有限责任公司 | 一种提高seg生长高度均一性方法 |
CN107731841A (zh) * | 2017-08-29 | 2018-02-23 | 长江存储科技有限责任公司 | 一种改善3d nand闪存seg生长质量的方法 |
CN108493104A (zh) * | 2018-04-10 | 2018-09-04 | 睿力集成电路有限公司 | 等离子体刻蚀方法及等离子体刻蚀后处理方法 |
JP7372073B2 (ja) * | 2019-08-02 | 2023-10-31 | 東京エレクトロン株式会社 | 基板処理方法、基板処理装置及びクリーニング装置 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2872522B2 (ja) | 1993-03-26 | 1999-03-17 | シャープ株式会社 | 半導体装置のドライエッチング方法 |
CN1107338A (zh) | 1994-02-23 | 1995-08-30 | 马水旺 | 浴用药酒 |
JPH11162876A (ja) * | 1997-11-28 | 1999-06-18 | Nec Corp | 半導体装置の製造装置及び製造方法 |
US6235640B1 (en) | 1998-09-01 | 2001-05-22 | Lam Research Corporation | Techniques for forming contact holes through to a silicon layer of a substrate |
KR100322545B1 (ko) | 1999-02-10 | 2002-03-18 | 윤종용 | 건식 세정 공정을 전 공정으로 이용하는 반도체 장치의콘택홀 채움 방법 |
JP4108310B2 (ja) * | 2001-09-28 | 2008-06-25 | 富士通株式会社 | シリコン含有絶縁膜を有する半導体装置の製造方法 |
US6884736B2 (en) * | 2002-10-07 | 2005-04-26 | Taiwan Semiconductor Manufacturing Co, Ltd. | Method of forming contact plug on silicide structure |
US6838381B2 (en) * | 2002-12-26 | 2005-01-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods for improving sheet resistance of silicide layer after removal of etch stop layer |
-
2005
- 2005-02-04 JP JP2005029454A patent/JP4282616B2/ja not_active Expired - Fee Related
-
2006
- 2006-01-26 CN CNB2006100030515A patent/CN100414684C/zh not_active Expired - Fee Related
- 2006-02-03 US US11/346,236 patent/US7605076B2/en active Active
-
2009
- 2009-09-09 US US12/585,238 patent/US8232197B2/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20210035740A (ko) | 2019-09-24 | 2021-04-01 | 도쿄엘렉트론가부시키가이샤 | 에칭 방법, 대미지층의 제거 방법, 및 기억 매체 |
US11557486B2 (en) | 2019-09-24 | 2023-01-17 | Tokyo Electron Limited | Etching method, damage layer removal method, and storage medium |
Also Published As
Publication number | Publication date |
---|---|
US20100003816A1 (en) | 2010-01-07 |
US7605076B2 (en) | 2009-10-20 |
CN100414684C (zh) | 2008-08-27 |
US8232197B2 (en) | 2012-07-31 |
US20060189145A1 (en) | 2006-08-24 |
JP2006216854A (ja) | 2006-08-17 |
CN1819140A (zh) | 2006-08-16 |
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