JP4212299B2 - 不揮発性半導体記憶装置 - Google Patents

不揮発性半導体記憶装置 Download PDF

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Publication number
JP4212299B2
JP4212299B2 JP2002134177A JP2002134177A JP4212299B2 JP 4212299 B2 JP4212299 B2 JP 4212299B2 JP 2002134177 A JP2002134177 A JP 2002134177A JP 2002134177 A JP2002134177 A JP 2002134177A JP 4212299 B2 JP4212299 B2 JP 4212299B2
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JP
Japan
Prior art keywords
memory cell
region
cell region
film
memory device
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Expired - Lifetime
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JP2002134177A
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English (en)
Japanese (ja)
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JP2003332468A (ja
JP2003332468A5 (enExample
Inventor
一雄 斎藤
昌吾 高村
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Toshiba Corp
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Toshiba Corp
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Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2002134177A priority Critical patent/JP4212299B2/ja
Priority to US10/430,372 priority patent/US7145200B2/en
Priority to KR10-2003-0028891A priority patent/KR100533302B1/ko
Publication of JP2003332468A publication Critical patent/JP2003332468A/ja
Publication of JP2003332468A5 publication Critical patent/JP2003332468A5/ja
Priority to US11/530,821 priority patent/US7422932B2/en
Application granted granted Critical
Publication of JP4212299B2 publication Critical patent/JP4212299B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/564Details not otherwise provided for, e.g. protection against moisture
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/41Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region of a memory region comprising a cell select transistor, e.g. NAND
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2002134177A 2002-05-09 2002-05-09 不揮発性半導体記憶装置 Expired - Lifetime JP4212299B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2002134177A JP4212299B2 (ja) 2002-05-09 2002-05-09 不揮発性半導体記憶装置
US10/430,372 US7145200B2 (en) 2002-05-09 2003-05-06 Nonvolatile semiconductor memory device
KR10-2003-0028891A KR100533302B1 (ko) 2002-05-09 2003-05-07 불휘발성 반도체 기억 장치 및 그 제조 방법
US11/530,821 US7422932B2 (en) 2002-05-09 2006-09-11 Nonvolatile semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002134177A JP4212299B2 (ja) 2002-05-09 2002-05-09 不揮発性半導体記憶装置

Publications (3)

Publication Number Publication Date
JP2003332468A JP2003332468A (ja) 2003-11-21
JP2003332468A5 JP2003332468A5 (enExample) 2005-09-02
JP4212299B2 true JP4212299B2 (ja) 2009-01-21

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002134177A Expired - Lifetime JP4212299B2 (ja) 2002-05-09 2002-05-09 不揮発性半導体記憶装置

Country Status (3)

Country Link
US (2) US7145200B2 (enExample)
JP (1) JP4212299B2 (enExample)
KR (1) KR100533302B1 (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006032489A (ja) * 2004-07-13 2006-02-02 Nec Electronics Corp 不揮発性半導体記憶装置及びその製造方法
KR100519170B1 (ko) * 2004-07-13 2005-10-05 주식회사 하이닉스반도체 반도체 소자의 패시베이션막 형성방법 및 반도체 소자의패시베이션막 구조
JP2006060138A (ja) * 2004-08-23 2006-03-02 Toshiba Corp 半導体集積回路装置
KR100629357B1 (ko) * 2004-11-29 2006-09-29 삼성전자주식회사 퓨즈 및 부하저항을 갖는 낸드 플래시메모리소자 형성방법
KR100607193B1 (ko) * 2004-12-24 2006-08-01 삼성전자주식회사 게이트 패턴의 상부에 적어도 하나의 저항 패턴을 갖는플레시 메모리들 및 그 형성방법들
JP4559866B2 (ja) 2005-01-17 2010-10-13 パナソニック株式会社 半導体装置の製造方法
JP2006302950A (ja) 2005-04-15 2006-11-02 Renesas Technology Corp 不揮発性半導体装置および不揮発性半導体装置の製造方法
JP5061480B2 (ja) * 2006-03-22 2012-10-31 富士通株式会社 半導体記憶装置、および半導体記憶装置の製造方法
KR100822806B1 (ko) * 2006-10-20 2008-04-18 삼성전자주식회사 비휘발성 메모리 장치 및 그 형성 방법
US7879718B2 (en) * 2006-12-27 2011-02-01 Spansion Llc Local interconnect having increased misalignment tolerance
JP2008166518A (ja) * 2006-12-28 2008-07-17 Toshiba Corp 不揮発性半導体記憶装置
US8368137B2 (en) * 2007-06-26 2013-02-05 Sandisk Technologies Inc. Dual bit line metal layers for non-volatile memory
US8097504B2 (en) * 2007-06-26 2012-01-17 Sandisk Technologies Inc. Method for forming dual bit line metal layers for non-volatile memory
JP5159289B2 (ja) 2007-12-20 2013-03-06 株式会社東芝 不揮発性半導体記憶装置
KR101660491B1 (ko) 2010-04-09 2016-09-27 삼성전자주식회사 반도체 장치 및 그 제조 방법
TWI572009B (zh) * 2011-01-14 2017-02-21 半導體能源研究所股份有限公司 半導體記憶裝置
JP6120738B2 (ja) * 2013-09-17 2017-04-26 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
JP6410004B1 (ja) * 2017-10-16 2018-10-24 Tdk株式会社 トンネル磁気抵抗効果素子、磁気メモリ、及び内蔵型メモリ
CN117096010A (zh) * 2020-01-02 2023-11-21 长江存储科技有限责任公司 存储器的制作方法及存储器

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2229575B (en) 1989-03-22 1993-05-12 Intel Corp Method of reducing hot-electron degradation in semiconductor devices
US5229311A (en) 1989-03-22 1993-07-20 Intel Corporation Method of reducing hot-electron degradation in semiconductor devices
JP2000315395A (ja) 1990-07-12 2000-11-14 Hitachi Ltd 半導体集積回路装置
JPH06334050A (ja) 1993-05-25 1994-12-02 Mitsubishi Electric Corp 半導体装置
KR960015322B1 (ko) 1993-07-23 1996-11-07 현대전자산업 주식회사 차폐용 플레이트를 갖는 반도체소자 제조방법
JP2917916B2 (ja) 1996-06-12 1999-07-12 日本電気株式会社 強誘電体を用いた半導体集積回路とその製造方法
TW468253B (en) 1997-01-13 2001-12-11 Hitachi Ltd Semiconductor memory device
JPH118355A (ja) 1997-06-16 1999-01-12 Nec Corp 強誘電体メモリ
JPH1154731A (ja) * 1997-07-31 1999-02-26 Nec Corp 半導体装置
US6291886B1 (en) * 1998-02-18 2001-09-18 Kabushiki Kaisha Toshiba Semiconductor device having wirings with reflection preventing film and method of manufacturing the same
JP3459355B2 (ja) 1998-03-27 2003-10-20 株式会社東芝 半導体装置およびその製造方法
US6353242B1 (en) * 1998-03-30 2002-03-05 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory
JP3276007B2 (ja) 1999-07-02 2002-04-22 日本電気株式会社 混載lsi半導体装置
JP3837258B2 (ja) 1999-07-13 2006-10-25 三洋電機株式会社 不揮発性半導体記憶装置とその製造方法
JP4031158B2 (ja) 1999-09-27 2008-01-09 株式会社東芝 半導体装置
JP2001274365A (ja) * 2000-03-28 2001-10-05 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
JP2002124585A (ja) * 2000-10-17 2002-04-26 Hitachi Ltd 不揮発性半導体記憶装置およびその製造方法
US6587372B2 (en) * 2001-01-11 2003-07-01 Micron Technology, Inc. Memory device with multi-level storage cells and apparatuses, systems and methods including same

Also Published As

Publication number Publication date
JP2003332468A (ja) 2003-11-21
KR20030087945A (ko) 2003-11-15
US7145200B2 (en) 2006-12-05
KR100533302B1 (ko) 2005-12-05
US20030222302A1 (en) 2003-12-04
US20070004143A1 (en) 2007-01-04
US7422932B2 (en) 2008-09-09

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