KR100533302B1 - 불휘발성 반도체 기억 장치 및 그 제조 방법 - Google Patents

불휘발성 반도체 기억 장치 및 그 제조 방법 Download PDF

Info

Publication number
KR100533302B1
KR100533302B1 KR10-2003-0028891A KR20030028891A KR100533302B1 KR 100533302 B1 KR100533302 B1 KR 100533302B1 KR 20030028891 A KR20030028891 A KR 20030028891A KR 100533302 B1 KR100533302 B1 KR 100533302B1
Authority
KR
South Korea
Prior art keywords
memory cell
film
region
cell region
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR10-2003-0028891A
Other languages
English (en)
Korean (ko)
Other versions
KR20030087945A (ko
Inventor
사이또가즈오
다까무라쇼고
Original Assignee
가부시끼가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시끼가이샤 도시바 filed Critical 가부시끼가이샤 도시바
Publication of KR20030087945A publication Critical patent/KR20030087945A/ko
Application granted granted Critical
Publication of KR100533302B1 publication Critical patent/KR100533302B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
    • H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204—Conductive materials
    • H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
    • H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/564—Details not otherwise provided for, e.g. protection against moisture
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/41—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region of a memory region comprising a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR10-2003-0028891A 2002-05-09 2003-05-07 불휘발성 반도체 기억 장치 및 그 제조 방법 Expired - Fee Related KR100533302B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2002-00134177 2002-05-09
JP2002134177A JP4212299B2 (ja) 2002-05-09 2002-05-09 不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
KR20030087945A KR20030087945A (ko) 2003-11-15
KR100533302B1 true KR100533302B1 (ko) 2005-12-05

Family

ID=29561166

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-2003-0028891A Expired - Fee Related KR100533302B1 (ko) 2002-05-09 2003-05-07 불휘발성 반도체 기억 장치 및 그 제조 방법

Country Status (3)

Country Link
US (2) US7145200B2 (enExample)
JP (1) JP4212299B2 (enExample)
KR (1) KR100533302B1 (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006032489A (ja) * 2004-07-13 2006-02-02 Nec Electronics Corp 不揮発性半導体記憶装置及びその製造方法
KR100519170B1 (ko) * 2004-07-13 2005-10-05 주식회사 하이닉스반도체 반도체 소자의 패시베이션막 형성방법 및 반도체 소자의패시베이션막 구조
JP2006060138A (ja) * 2004-08-23 2006-03-02 Toshiba Corp 半導体集積回路装置
KR100629357B1 (ko) * 2004-11-29 2006-09-29 삼성전자주식회사 퓨즈 및 부하저항을 갖는 낸드 플래시메모리소자 형성방법
KR100607193B1 (ko) * 2004-12-24 2006-08-01 삼성전자주식회사 게이트 패턴의 상부에 적어도 하나의 저항 패턴을 갖는플레시 메모리들 및 그 형성방법들
JP4559866B2 (ja) 2005-01-17 2010-10-13 パナソニック株式会社 半導体装置の製造方法
JP2006302950A (ja) * 2005-04-15 2006-11-02 Renesas Technology Corp 不揮発性半導体装置および不揮発性半導体装置の製造方法
JP5061480B2 (ja) * 2006-03-22 2012-10-31 富士通株式会社 半導体記憶装置、および半導体記憶装置の製造方法
KR100822806B1 (ko) * 2006-10-20 2008-04-18 삼성전자주식회사 비휘발성 메모리 장치 및 그 형성 방법
US7879718B2 (en) * 2006-12-27 2011-02-01 Spansion Llc Local interconnect having increased misalignment tolerance
JP2008166518A (ja) * 2006-12-28 2008-07-17 Toshiba Corp 不揮発性半導体記憶装置
US8368137B2 (en) * 2007-06-26 2013-02-05 Sandisk Technologies Inc. Dual bit line metal layers for non-volatile memory
US8097504B2 (en) * 2007-06-26 2012-01-17 Sandisk Technologies Inc. Method for forming dual bit line metal layers for non-volatile memory
JP5159289B2 (ja) 2007-12-20 2013-03-06 株式会社東芝 不揮発性半導体記憶装置
KR101660491B1 (ko) * 2010-04-09 2016-09-27 삼성전자주식회사 반도체 장치 및 그 제조 방법
TWI619230B (zh) 2011-01-14 2018-03-21 半導體能源研究所股份有限公司 半導體記憶裝置
JP6120738B2 (ja) * 2013-09-17 2017-04-26 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
CN109937475B (zh) * 2017-10-16 2023-07-18 Tdk株式会社 隧道磁阻效应元件、磁存储器及内置型存储器
CN111162002B (zh) * 2020-01-02 2023-05-09 长江存储科技有限责任公司 存储器的制作方法及存储器

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2229575B (en) 1989-03-22 1993-05-12 Intel Corp Method of reducing hot-electron degradation in semiconductor devices
US5229311A (en) 1989-03-22 1993-07-20 Intel Corporation Method of reducing hot-electron degradation in semiconductor devices
JP2000315395A (ja) 1990-07-12 2000-11-14 Hitachi Ltd 半導体集積回路装置
JPH06334050A (ja) 1993-05-25 1994-12-02 Mitsubishi Electric Corp 半導体装置
KR960015322B1 (ko) 1993-07-23 1996-11-07 현대전자산업 주식회사 차폐용 플레이트를 갖는 반도체소자 제조방법
JP2917916B2 (ja) 1996-06-12 1999-07-12 日本電気株式会社 強誘電体を用いた半導体集積回路とその製造方法
TW468253B (en) * 1997-01-13 2001-12-11 Hitachi Ltd Semiconductor memory device
JPH118355A (ja) 1997-06-16 1999-01-12 Nec Corp 強誘電体メモリ
JPH1154731A (ja) * 1997-07-31 1999-02-26 Nec Corp 半導体装置
US6291886B1 (en) * 1998-02-18 2001-09-18 Kabushiki Kaisha Toshiba Semiconductor device having wirings with reflection preventing film and method of manufacturing the same
JP3459355B2 (ja) 1998-03-27 2003-10-20 株式会社東芝 半導体装置およびその製造方法
US6353242B1 (en) * 1998-03-30 2002-03-05 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory
JP3276007B2 (ja) 1999-07-02 2002-04-22 日本電気株式会社 混載ｌｓｉ半導体装置
JP3837258B2 (ja) 1999-07-13 2006-10-25 三洋電機株式会社 不揮発性半導体記憶装置とその製造方法
JP4031158B2 (ja) 1999-09-27 2008-01-09 株式会社東芝 半導体装置
JP2001274365A (ja) * 2000-03-28 2001-10-05 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
JP2002124585A (ja) * 2000-10-17 2002-04-26 Hitachi Ltd 不揮発性半導体記憶装置およびその製造方法
US6587372B2 (en) * 2001-01-11 2003-07-01 Micron Technology, Inc. Memory device with multi-level storage cells and apparatuses, systems and methods including same

Also Published As

Publication number Publication date
US7145200B2 (en) 2006-12-05
US7422932B2 (en) 2008-09-09
US20030222302A1 (en) 2003-12-04
US20070004143A1 (en) 2007-01-04
JP2003332468A (ja) 2003-11-21
KR20030087945A (ko) 2003-11-15
JP4212299B2 (ja) 2009-01-21

Similar Documents

Publication Publication Date Title
KR100533302B1 (ko) 불휘발성 반도체 기억 장치 및 그 제조 방법
US7781823B2 (en) Nonvolatile semiconductor memory
EP1204989B1 (en) Nand type flash memory device
KR100559282B1 (ko) 반도체 장치 및 그 제조 방법
US6891262B2 (en) Semiconductor device and method of producing the same
US6380033B1 (en) Process to improve read disturb for NAND flash memory devices
US20060231884A1 (en) Nonvolatile semiconductor device and method of manufacturing nonvolatile semiconductor device
US6469339B1 (en) Semiconductor memory with voids for suppressing crystal defects
US7745884B2 (en) Nonvolatile semiconductor memory
US6204159B1 (en) Method of forming select gate to improve reliability and performance for NAND type flash memory devices
JP3389112B2 (ja) 不揮発性半導体記憶装置及びその製造方法
US20070034929A1 (en) Flash memory device and method of manufacturing the same
JP2009231621A (ja) 不揮発性半導体メモリ
US6211074B1 (en) Methods and arrangements for reducing stress and preventing cracking in a silicide layer
US6284602B1 (en) Process to reduce post cycling program VT dispersion for NAND flash memory devices
KR101099958B1 (ko) 반도체 소자의 금속 배선 형성 방법
US20230046783A1 (en) Semiconductor memory device and method of manufacturing semiconductor memory device
JP2011009447A (ja) 不揮発性半導体記憶装置及びその製造方法
KR100888202B1 (ko) 반도체 소자 제조방법
US20250294745A1 (en) Semiconductor device and manufacturing method thereof
JP2009124103A (ja) 半導体素子及びその製造方法
US20060046386A1 (en) Method of manufacturing a flash memory device
JP4843521B2 (ja) 半導体記憶装置の製造方法
KR20090052067A (ko) 반도체 소자의 금속 배선 형성 방법
KR20070000598A (ko) 불휘발성 반도체 메모리 장치 및 그 제조 방법

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

D13-X000 Search requested

St.27 status event code: A-1-2-D10-D13-srh-X000

D14-X000 Search report completed

St.27 status event code: A-1-2-D10-D14-srh-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

FPAY Annual fee payment

Payment date: 20081027

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

R17-X000 Change to representative recorded

St.27 status event code: A-5-5-R10-R17-oth-X000

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20091129

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20091129

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

R18 Changes to party contact information recorded

Free format text: ST27 STATUS EVENT CODE: A-5-5-R10-R18-OTH-X000 (AS PROVIDED BY THE NATIONAL OFFICE)

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000