JP4123027B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP4123027B2
JP4123027B2 JP2003095975A JP2003095975A JP4123027B2 JP 4123027 B2 JP4123027 B2 JP 4123027B2 JP 2003095975 A JP2003095975 A JP 2003095975A JP 2003095975 A JP2003095975 A JP 2003095975A JP 4123027 B2 JP4123027 B2 JP 4123027B2
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JP
Japan
Prior art keywords
semiconductor chip
semiconductor
back surface
conductive wire
insulating resin
Prior art date
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Expired - Fee Related
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JP2003095975A
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English (en)
Japanese (ja)
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JP2004303992A5 (enExample
JP2004303992A (ja
Inventor
義春 尾形
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Seiko Epson Corp
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Seiko Epson Corp
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Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2003095975A priority Critical patent/JP4123027B2/ja
Priority to US10/812,346 priority patent/US20040245652A1/en
Publication of JP2004303992A publication Critical patent/JP2004303992A/ja
Publication of JP2004303992A5 publication Critical patent/JP2004303992A5/ja
Application granted granted Critical
Publication of JP4123027B2 publication Critical patent/JP4123027B2/ja
Anticipated expiration legal-status Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H10W72/019—
    • H10W90/00—
    • H10W72/073—
    • H10W72/075—
    • H10W72/242—
    • H10W72/29—
    • H10W72/5522—
    • H10W72/5524—
    • H10W72/59—
    • H10W72/884—
    • H10W72/923—
    • H10W72/931—
    • H10W74/00—
    • H10W90/20—
    • H10W90/291—
    • H10W90/724—
    • H10W90/732—
    • H10W90/734—
    • H10W90/736—
    • H10W90/754—
    • H10W90/756—

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  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2003095975A 2003-03-31 2003-03-31 半導体装置の製造方法 Expired - Fee Related JP4123027B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2003095975A JP4123027B2 (ja) 2003-03-31 2003-03-31 半導体装置の製造方法
US10/812,346 US20040245652A1 (en) 2003-03-31 2004-03-29 Semiconductor device, electronic device, electronic appliance, and method of manufacturing a semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003095975A JP4123027B2 (ja) 2003-03-31 2003-03-31 半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2004303992A JP2004303992A (ja) 2004-10-28
JP2004303992A5 JP2004303992A5 (enExample) 2005-06-23
JP4123027B2 true JP4123027B2 (ja) 2008-07-23

Family

ID=33408173

Family Applications (1)

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JP2003095975A Expired - Fee Related JP4123027B2 (ja) 2003-03-31 2003-03-31 半導体装置の製造方法

Country Status (2)

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US (1) US20040245652A1 (enExample)
JP (1) JP4123027B2 (enExample)

Families Citing this family (37)

* Cited by examiner, † Cited by third party
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US7116002B2 (en) * 2004-05-10 2006-10-03 Taiwan Semiconductor Manufacturing Company, Ltd. Overhang support for a stacked semiconductor device, and method of forming thereof
US7588963B2 (en) * 2004-06-30 2009-09-15 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming overhang support for a stacked semiconductor device
US7067927B1 (en) * 2005-01-31 2006-06-27 National Semiconductor Corporation Die with integral pedestal having insulated walls
US7675153B2 (en) 2005-02-02 2010-03-09 Kabushiki Kaisha Toshiba Semiconductor device having semiconductor chips stacked and mounted thereon and manufacturing method thereof
US20070152314A1 (en) * 2005-12-30 2007-07-05 Intel Corporation Low stress stacked die packages
JP4577228B2 (ja) 2006-02-09 2010-11-10 セイコーエプソン株式会社 半導体装置および半導体装置の製造方法
JP4876618B2 (ja) 2006-02-21 2012-02-15 セイコーエプソン株式会社 半導体装置および半導体装置の製造方法
JP4719042B2 (ja) * 2006-03-16 2011-07-06 株式会社東芝 半導体装置の製造方法
TWI305400B (en) * 2006-08-11 2009-01-11 Advanced Semiconductor Eng Chip package
US20080128879A1 (en) * 2006-12-01 2008-06-05 Hem Takiar Film-on-wire bond semiconductor device
US20080131998A1 (en) * 2006-12-01 2008-06-05 Hem Takiar Method of fabricating a film-on-wire bond semiconductor device
SG149724A1 (en) * 2007-07-24 2009-02-27 Micron Technology Inc Semicoductor dies with recesses, associated leadframes, and associated systems and methods
JP5301126B2 (ja) * 2007-08-21 2013-09-25 スパンション エルエルシー 半導体装置及びその製造方法
JP5486772B2 (ja) * 2008-02-04 2014-05-07 リンテック株式会社 半導体ウエハ及びその製造方法
KR20100056247A (ko) * 2008-11-19 2010-05-27 삼성전자주식회사 접착층을 구비하는 반도체 패키지
US8174131B2 (en) * 2009-05-27 2012-05-08 Globalfoundries Inc. Semiconductor device having a filled trench structure and methods for fabricating the same
US8058706B2 (en) * 2009-09-08 2011-11-15 Texas Instruments Incorporated Delamination resistant packaged die having support and shaped die having protruding lip on support
US8687378B2 (en) * 2011-10-17 2014-04-01 Murata Manufacturing Co., Ltd. High-frequency module
US20130157414A1 (en) * 2011-12-20 2013-06-20 Nxp B. V. Stacked-die package and method therefor
KR20130090173A (ko) * 2012-02-03 2013-08-13 삼성전자주식회사 반도체 패키지
JP2014007228A (ja) * 2012-06-22 2014-01-16 Ps4 Luxco S A R L 半導体装置及びその製造方法
KR102116987B1 (ko) * 2013-10-15 2020-05-29 삼성전자 주식회사 반도체 패키지
US9524942B2 (en) * 2013-12-18 2016-12-20 Taiwan Semiconductor Manufacturing Company, Ltd. Chip-on-substrate packaging on carrier
CN105023877B (zh) * 2014-04-28 2019-12-24 联华电子股份有限公司 半导体晶片、封装结构与其制作方法
TWI591707B (zh) * 2014-06-05 2017-07-11 東琳精密股份有限公司 薄型化晶片之封裝結構及其製造方法
JP6560496B2 (ja) * 2015-01-26 2019-08-14 株式会社ジェイデバイス 半導体装置
US9893058B2 (en) * 2015-09-17 2018-02-13 Semiconductor Components Industries, Llc Method of manufacturing a semiconductor device having reduced on-state resistance and structure
CN106683984A (zh) * 2017-01-22 2017-05-17 合肥中感微电子有限公司 电池保护控制晶片的制作方法以及电池保护控制芯片以及用户设备
KR102442622B1 (ko) * 2017-08-03 2022-09-13 삼성전자주식회사 반도체 소자 패키지
JP2020021908A (ja) * 2018-08-03 2020-02-06 キオクシア株式会社 半導体装置およびその製造方法
JP7243016B2 (ja) * 2019-01-30 2023-03-22 日清紡マイクロデバイス株式会社 半導体装置およびその製造方法
KR102751537B1 (ko) * 2019-11-13 2025-01-10 삼성전자주식회사 반도체 패키지
JP2022129462A (ja) * 2021-02-25 2022-09-06 キオクシア株式会社 半導体装置および半導体装置の製造方法
CN112978393B (zh) * 2021-04-13 2022-12-20 山东省科学院自动化研究所 烧结砖自动卸垛的辅助系统及方法
KR20230000679A (ko) 2021-06-25 2023-01-03 삼성전자주식회사 비전도성 필름을 갖는 반도체 패키지 및 그 형성 방법
US20240363465A1 (en) * 2023-04-28 2024-10-31 Texas Instruments Incorporated Die isolation with conformal coating
CN118841359B (zh) * 2024-07-26 2025-04-15 沈阳工业大学 一种用于半导体无膜划切的吸附装置及其吸附方法

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US5068712A (en) * 1988-09-20 1991-11-26 Hitachi, Ltd. Semiconductor device
US5323060A (en) * 1993-06-02 1994-06-21 Micron Semiconductor, Inc. Multichip module having a stacked chip arrangement
US6784541B2 (en) * 2000-01-27 2004-08-31 Hitachi, Ltd. Semiconductor module and mounting method for same
US6340846B1 (en) * 2000-12-06 2002-01-22 Amkor Technology, Inc. Making semiconductor packages with stacked dies and reinforced wire bonds
US20020096754A1 (en) * 2001-01-24 2002-07-25 Chen Wen Chuan Stacked structure of integrated circuits
US7169685B2 (en) * 2002-02-25 2007-01-30 Micron Technology, Inc. Wafer back side coating to balance stress from passivation layer on front of wafer and be used as die attach adhesive
US20040026768A1 (en) * 2002-08-08 2004-02-12 Taar Reginald T. Semiconductor dice with edge cavities

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US20040245652A1 (en) 2004-12-09
JP2004303992A (ja) 2004-10-28

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