TWI591707B - 薄型化晶片之封裝結構及其製造方法 - Google Patents

薄型化晶片之封裝結構及其製造方法 Download PDF

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Publication number
TWI591707B
TWI591707B TW103119499A TW103119499A TWI591707B TW I591707 B TWI591707 B TW I591707B TW 103119499 A TW103119499 A TW 103119499A TW 103119499 A TW103119499 A TW 103119499A TW I591707 B TWI591707 B TW I591707B
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Taiwan
Prior art keywords
thinned wafer
substrate
package structure
reinforcing layer
sealant
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TW103119499A
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English (en)
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TW201546889A (zh
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林殿方
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東琳精密股份有限公司
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Priority to TW103119499A priority Critical patent/TWI591707B/zh
Priority to US14/457,356 priority patent/US9646937B2/en
Publication of TW201546889A publication Critical patent/TW201546889A/zh
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Publication of TWI591707B publication Critical patent/TWI591707B/zh

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Description

薄型化晶片之封裝結構及其製造方法
本發明有關一種封裝結構及其製造方法，特別關於一種薄型化晶片之封裝結構及其製造方法。
晶片的封裝結構目的，除了在於能使晶片容易與電路板連接外，還能保護晶片不會被外力所破壞，以及避免水氣或灰塵等影響到得晶片的效能；另外，有些封裝結構能提供晶片較佳的散熱路徑。
隨著時代的演進，晶片上的電子元件越來越密集，封裝結構也越來越複雜。此外，在現今隨身電子裝置、穿戴式電子裝置盛行的趨勢下，晶片及晶片的封裝結構也有小型化的趨勢。然而，但若將晶片的厚度減小(即薄型化)，現有的封裝結構卻難以對薄型化的晶片進行封裝。這是因為薄型化的晶片的結構強度明顯不足，晶片容易在封裝過程破裂。
舉例而言，在晶片封裝的過程中，有一步驟是使用封裝膠體來包覆晶片。在此步驟中，膠體於注模時會壓迫晶片，而晶片往往無法承受而破裂。此外，膠體注模後通常會經過一加熱程序，以使膠體加速固化；然而，基板或膠體於熱膨冷縮時會擠壓晶片，易使晶片損壞。
有鑑於此，如何改善至少一種上述缺失，乃為此業界待解決 的問題。
本發明之一目的在於提供一種薄型化晶片的封裝結構及其製造方法，其解決的技術問題至少為：使薄型化晶片於封裝的過程中不易受到破壞。
為達上述目的，本發明揭露的薄型化晶片的封裝結構包含一基板、一薄型化晶片、一強化層及一密封膠體。薄型化晶片設置於基板上且與基板電性連接；強化層設置於該薄型化晶片上；密封膠體形成於基板上且包覆薄型化晶片及強化層。強化層承受形成密封膠體的壓力或應力，以保護薄型化晶片。
為達上述目的，本發明所揭露的薄型化晶片的封裝結構的製造方法包含：提供一基板；設置一薄型化晶片於該基板上，且電性連接該薄型化晶片與該基板；設置一強化層於該薄型化晶片上；以及形成一密封膠體於該基板上，且使該密封膠體包覆該薄型化晶片及該強化層。其中強化層承受形成該密封膠體的壓力或應力，以保護該薄型化晶片。
為讓上述目的、技術特徵及優點能更明顯易懂，下文係以較佳之實施例配合所附圖式進行詳細說明。
【0042】
1、2、3、4‧‧‧封裝結構
110、210、310、410、510‧‧‧基板
112、122‧‧‧焊墊
120、220、320、420、520‧‧‧薄型化晶片
121、421、521‧‧‧打線
130、230、330、430、530‧‧‧強化層
140、240、340、440、540‧‧‧密封膠體
250、350、450、550‧‧‧黏著層
451、551‧‧‧覆線膠層
260、360、560‧‧‧金屬層
261、361、561‧‧‧圖案化結構
362、562‧‧‧被動元件
第1圖為根據本發明之第一實施例之封裝結構之側視圖；第2A圖為根據本發明之第二實施例之封裝結構之側視圖； 第2B圖為根據本發明之第二實施例之封裝結構之俯視圖； 第2C圖為根據本發明之第二實施例之封裝結構之另一俯視圖； 第3A圖為根據本發明之第三實施例之封裝結構之側視圖； 第3B圖為根據本發明之第三實施例之封裝結構之俯視圖； 第4A圖為根據本發明之第四實施例之封裝結構之側視圖； 第4B圖為根據本發明之第四實施例之封裝結構之側視圖； 第5A圖為根據本發明之第五實施例之封裝結構之製造方法之步驟示意圖； 第5B圖為根據本發明之第五實施例之封裝結構之製造方法之步驟示意圖； 第5C圖為根據本發明之第五實施例之封裝結構之製造方法之步驟示意圖； 第5D圖為根據本發明之第五實施例之封裝結構之製造方法之步驟示意圖； 第5E圖為根據本發明之第五實施例之封裝結構之製造方法之步驟示意圖；
【0011】
首先請參考第1圖，其為根據本發明之第一實施例之封裝結構之側視圖。本發明提供一種薄型化晶片之封裝結構，於第一實施例中，封裝結構1包含：一基板110、一薄型化晶片120、一強化層130及密封膠體140。
【0012】
薄型化晶片120係指厚度較小之晶片，其厚度例如可小於80微米，而較佳的是小於35微米。薄型化晶片120可設置於基板110上並與基板110電性連接，電性連接之方法可為覆晶方式或透過打線方式與基板110電性連接，但不以此為限。而下文即以打線121將薄型化晶片120與基板110形成電性連接為示例性說明。
【0013】
強化層130可設置於薄型化晶片120上，且於本實施例中，強化層130的寬度小於薄型化晶片120；因此，強化層130設置於薄型化晶片120後，薄型化晶片120的上表面的一部分仍會露出，使位於薄型化晶片120上表面的焊墊122不會被強化層130遮蔽。如此，焊墊122能透過打線121與基板110的焊墊112形成電性連接。
【0014】
密封膠體140則是形成於基板110上，且包覆薄型化晶片120及強化層130。
【0015】
依據前述，薄型化晶片120具有較小的厚度，因此薄型化晶片120相應地也較容易被破壞；然而，設置於薄型化晶片120上的強化層130可承受或抵擋原本薄型化晶片120所應直接承受之外力，而使薄型化晶片120不會被破壞。也就是，強化層130可承受形成密封膠體140的壓力或應力，以保護薄型化晶片120。
【0016】
此處所指的壓力或應力包含：密封膠體140於注模時所產生之注模壓力；或於加熱固化密封膠體140時，密封膠體140或基板110因受熱而產生之水平方向脹縮應力導致薄型化晶片120表面相應產生應力。後者具體而言係指：密封膠體140於注模後的一加熱程序中，密封膠體140的各部分的固化時間不完全一致，導致薄型化晶片120各部分相應地受到不同的外力，或是在加熱及隨後的冷卻程序中，因基板110與薄型化晶片120熱膨脹係數不同而產生之水平方向脹縮應力。
【0017】
為使強化層130可承受上述的壓力或應力，強化層130的結構強度會較佳。而較佳地，強化層130可包含軟板材料（例如以PI，聚亞醯胺為材料）、硬板材料（例如以樹脂為材料）、熱固型材料、含矽材料或空白晶片(Dummy Die)。
【0018】
於本實施例中，強化層130係以熱固型材料製成，如熱塑性塑膠；熱固型材料加熱後能直接塗敷於薄型化晶片120上，然後固化後形成強化層130。因此，強化層130與薄型化晶片120之間不須有黏著材料，更進一步減小封裝結構1的厚度。
【0019】
另一方面，強化層130亦可能薄型化，以使薄型化晶片120之厚度大於強化層130之厚度，進而使整個封裝結構1的厚度更薄。此外，強化層130的材料可依封裝結構1的目標厚度進行選擇，例如封裝結構1的目標厚度較薄時，即選用結構強度較高的材料，以使較薄的強化層130仍足以保護薄型化晶片120。
【0020】
接著請參考第2A及2B圖，第2A及2B圖為根據本發明之第二實施例之封裝結構之側視圖及俯視圖。第二實施例之封裝結構2具有與封裝結構1相似的技術特徵，如同樣包含一基板210、一薄型化晶片220、一強化層230及一密封膠體240，其差異至少在於：封裝結構2更包含一黏著層250，設置於強化層230與薄型化晶片220間，用以將強化層230黏固於薄型化晶片220上。
【0021】
具體而言，當強化層230為非熱固化材料時(例如空白晶片)，強化層230不易直接地故地於薄型化晶片220上，而此時黏著層250能幫助強化層230固定於薄型化晶片220上。黏著層250亦可幫助薄型化晶片220黏固於基板210上。
【0022】
封裝結構2與封裝結構1的另一差異在於，封裝結構2更包含一金屬層260，而該金屬層260可設置於強化層230上。金屬層260可設置於強化層230的上表面的全部，以作為一屏蔽結構；也就是，金屬層260可產生一屏蔽效應（Shielding effect），使薄型化晶片220的運作不易受到外界電場變化的影響。
【0023】
如第2C圖所示，第2C圖為根據本發明之第二實施例之封裝結構之另一俯視圖。金屬層260亦可設置於強化層230的上表面的部分，即金屬層260可具有一圖案化結構261，以形成一電感或一天線。形成有電感或天線的金屬層260可跟薄型化晶片220電性連接（例如透過基板210來耦接至薄型化晶片220），以使薄型化晶片220可利用金屬層260的電感或天線。
【0024】
接著請參考第3A及3B圖，第3A及3B圖為根據本發明之第三實施例之封裝結構之側視圖及俯視圖。第三實施例之封裝結構3具有與封裝結構2相似的技術特徵，如同樣包含一基板310、一薄型化晶片320、一強化層330、密封膠體340、一黏著層350及一金屬層360。同樣地，金屬層360亦可具有一圖案化結構361。
【0025】
封裝結構3具有與封裝結構2的差異至少在於：金屬層360部分地設置於強化層330上，因此部分地露出強化層330的上表面；此外，封裝結構3更包含至少一被動元件362（例如電阻、電容等），被動元件362設置於強化層330上之未被金屬層360覆蓋的部分，且被動元件362與薄型化晶片320相互電性連接（(例如透過打線方式或藉由強化層330與薄型化晶片320電性連接)）。如此，薄型化晶片320可利用該被動元件362而實現一特定功能。
【0026】
接著請參考第4A及4B圖，第4A及4B圖為根據本發明之第四實施例之封裝結構之俯視圖。第四實施例之封裝結構4具有與封裝結構2相似的技術特徵，如同樣包含一基板410、一薄型化晶片420、一強化層430、一密封膠體440及一黏著層450。兩者的差異在於：黏著層450之材料為覆線膠層451（Film OverWire，FOW）。
【0027】
由於覆線膠層451於未凝固前的流動性較高，因此將覆線膠層451塗敷於已設置有打線421的薄型化晶片420時，或將塗敷有覆線膠層451的強化層430覆蓋於已設置有打線421的薄型化晶片420時，並不會壓迫打線421導致打線421變形或使打線421自焊墊422脫落。
【0028】
換言之，透過覆線膠層451的黏接，強化層440能覆蓋部分的打線421。因此，即使強化層430寬度不小於薄型化晶片420之寬度，如第4A圖（強化層430寬度大於薄型化晶片420之寬度）及第4B圖（強化層430寬度等於薄型化晶片420之寬度）所示，強化層430仍可設置於薄型化晶片420上。
【0029】
上述段落說明了依據本發明之實施例的封裝結構1-4，而從上述段落應可知悉到，封裝結構1-4透過強化層230-430，有效阻絕了密封膠體140-440的注模壓力及密封膠體凝固的產生的脹縮應力直接作用至薄型化晶片120-420上，進而使薄型化晶片120-420於封裝過程不易損壞。
【0030】
接著請參閱第5A-5C圖，其為依據本發明之第五實施例之薄型化晶片封裝結構之製造方法之步驟示意圖。於第五實施例中，提出一封裝結構之製造方法（以下簡稱為製造方法），該製造方法可製造例如上述的封裝結構1-4，因此該製造方法的技術內容可與封裝結構 1-4的技術內容相互參考。此外，以下的步驟中，各步驟的順序原則上可置換，不以說明的順序為限。該製造方法可包含以下步驟：
【0031】
於步驟S1中，提供一基板510，接著設置一薄型化晶片520於基板510上。接著，進行步驟S2，即設置一強化層530於薄型化晶片520上，最後，進行步驟S3，即形成一密封膠體540於基板510上，並使密封膠體540包覆薄型化晶片520及強化層530。
【0032】
以下便詳述各步驟之細節。
【0033】
首先，在步驟S1中，先提供一基板510，接著設置一薄型化晶片520於基板510上，並將薄型化晶片520與基板510電性連接。電性連接的方式，可於薄型化晶片520設置於基板510後，再電性連接薄型化晶片520與基板510，或在薄型化晶片520設置於基板510上的同時，一併電性連接薄型化晶片520與基板510。但若欲以打線方式將薄型化晶片520與基板510電性連接，較佳的時間點是，完成設置強化層530於薄型化晶片510之後（即步驟S2後），且在形成密封膠體540於基板510之前（即步驟S3前）。
【0034】
步驟S2為設置一強化層530於薄型化晶片520上。為了設置一強化層530於薄型化晶片520上，可黏固一黏著層550於強化層530之一表面，再將該表面貼附於薄型化晶片520上，以使黏著層550黏固於薄型化晶片520上。當然，亦可將黏著層550先塗敷於薄型化晶片520之一表面，再將強化層530放置於該表面上，也能達到相同的目的。然而，若強化層530係以熱固型材料製成時，則塗敷黏著層550可從步驟S2中省略。
【0035】
此外，在步驟S2中，在將強化層530層設置於薄型化晶片520後，更可再設置一金屬層560於強化層530上，且可透過電鍍方式、焊接方式或是黏著方式使金屬層560固著於強化層530上。於本實施例中，係以黏著層550黏固金屬層560為示例性說明。而在設置金屬層560於強化層530 前，可使金屬層560形成圖案化結構561，再設置於強化層530。其中圖案化結構561可形成一電感或一天線。
【0036】
最後，在步驟S3中形成一密封膠體540於基板510上，並使密封膠體540包覆薄型化晶片520及強化層530。在形成密封膠體540的同時，強化層530承受形成密封膠體540的壓力或應力，以保護薄型化晶片520 。其中壓力或應力包含：密封膠體540於注模時所產生之注模壓力，或於加熱固化密封膠體540時，密封膠體540或基板510因受熱而產生之水平方向脹縮應力。
【0037】
另外，在其他實施例中，參考第5D圖，若黏著層550之材料為覆線膠層551時，則步驟S1後將執行步驟S2’，即將塗敷有覆線膠層551的強化層530放置於薄型化晶片520，使強化層530及覆線膠層551覆蓋於薄型化晶片520及部分的打線521上。
【0038】
於其他實施例中，參考第5E圖，該製造方法於步驟S2與S3間（或是S2’與S3間），更可包含一次步驟S2-1。次步驟S2-1係為設置至少一被動元件562於強化層530上且使被動元件562與金屬層560相分隔。而在此具有次步驟S2-1的態樣中，設置金屬層560於強化層530上係為部分地設置金屬層560於強化層530上，因此部分地露出強化層530的上表面。
【0039】
次步驟S2-1更包含電性連接被動元件562與薄型化晶片520，且可於設置被動元件562於強化層530的同時進行電性連接，亦可於完成設置被動元件562於強化層530後再進行電性連接。
【0040】
綜合上述，本發明之各實施例所揭露的薄型化晶片的封裝結構及其製造方法所具有的特點為：強化層承受形成密封膠體的壓力或應力，以保護薄型化晶片，避免薄型化晶片於封裝的過程中損壞。
【0041】
上述之實施例僅用來例舉本發明之實施態樣，以及闡釋本發明之技術特徵，並非用來限制本發明之保護範疇。任何熟悉此技術者可輕易完成之改變或均等性之安排均屬於本發明所主張之範圍，本發明之權利保護範圍應以申請專利範圍為準。
1‧‧‧封裝結構
110‧‧‧基板
112、122‧‧‧焊墊
120‧‧‧薄型化晶片
121‧‧‧打線
130‧‧‧強化層
140‧‧‧密封膠體

Claims (9)

  1. 一種薄型化晶片之封裝結構，包含：一基板；一薄型化晶片，設置於該基板上，且與該基板電性連接；一強化層，係以一熱固型材料製成，直接地設置於該薄型化晶片上；以及一密封膠體，形成於該基板上，且包覆該薄型化晶片及該強化層，其中該強化層之一上表面亦被該密封膠體包覆，該強化層承受形成該密封膠體的壓力或應力，以保護該薄型化晶片。
  2. 如請求項1所述之封裝結構，其中「該強化層承受形成該密封膠體的壓力或應力」所指的壓力或應力包含：該密封膠體於注模時所產生之注模壓力，或於加熱固化該密封膠體時，該密封膠體或該基板因受熱而產生之水平方向脹縮應力。
  3. 如請求項1所述之封裝結構，其中該薄型化晶片之厚度小於80微米。
  4. 如請求項3所述之封裝結構，其中該薄型化晶片之厚度小於45微米。
  5. 如請求項1所述之封裝結構，其中該薄型化晶片之厚度大於該強化層之厚度。
  6. 如請求項1所述之封裝結構，其中該薄型化晶片係以打線方式與該基板電性連接。
  7. 一種薄型化晶片封裝結構之製造方法，包含：提供一基板；設置一薄型化晶片於該基板上，且電性連接該薄型化晶片與該基板；直接地設置一強化層於該薄型化晶片上，該強化層係以一熱固型材料製成；以及形成一密封膠體於該基板上，且使該密封膠體包覆該薄型化晶片、該強化層及該強化層之一上表面，其中該強化層承受形成該密封膠體的壓力或應力，以保護該薄型化晶片。
  8. 如請求項7所述之製造方法，其中「設置一薄型化晶片於該基板上，且電性連接該薄型化晶片與該基板」之步驟中，係以打線方式將該薄型化晶片與該基板電性連接。
  9. 如請求項7所述之製造方法，其中「該強化層承受形成該密封膠體的壓力或應力」之步驟中所指之壓力或應力包含：該密封膠體於注模時所產生之注模壓力，或於加熱固化該密封膠體時，該密封膠體或該基板因受熱而產生之水平方向脹縮應力。
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