JP3932345B2 - 象嵌技法を利用した微細金属パターン形成方法 - Google Patents

象嵌技法を利用した微細金属パターン形成方法 Download PDF

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Publication number
JP3932345B2
JP3932345B2 JP34687699A JP34687699A JP3932345B2 JP 3932345 B2 JP3932345 B2 JP 3932345B2 JP 34687699 A JP34687699 A JP 34687699A JP 34687699 A JP34687699 A JP 34687699A JP 3932345 B2 JP3932345 B2 JP 3932345B2
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Japan
Prior art keywords
film
pattern
forming
metal
insulating film
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Expired - Fee Related
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JP34687699A
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Japanese (ja)
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JP2000195867A (ja
Inventor
▲ヒ▼ 龍 尹
成 根 長
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SK Hynix Inc
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Hynix Semiconductor Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP34687699A 1998-12-24 1999-12-06 象嵌技法を利用した微細金属パターン形成方法 Expired - Fee Related JP3932345B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1019980058559A KR100316017B1 (ko) 1998-12-24 1998-12-24 상감기법을이용한미세금속패턴형성방법
KR1998/P58559 1998-12-24

Publications (2)

Publication Number Publication Date
JP2000195867A JP2000195867A (ja) 2000-07-14
JP3932345B2 true JP3932345B2 (ja) 2007-06-20

Family

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JP34687699A Expired - Fee Related JP3932345B2 (ja) 1998-12-24 1999-12-06 象嵌技法を利用した微細金属パターン形成方法

Country Status (3)

Country Link
US (1) US6348414B1 (ko)
JP (1) JP3932345B2 (ko)
KR (1) KR100316017B1 (ko)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000216264A (ja) * 1999-01-22 2000-08-04 Mitsubishi Electric Corp Ｃｍｏｓ論理回路素子、半導体装置とその製造方法およびその製造方法において用いる半導体回路設計方法
US20090200668A1 (en) * 2008-02-07 2009-08-13 International Business Machines Corporation Interconnect structure with high leakage resistance
KR102014197B1 (ko) 2012-10-25 2019-08-26 삼성전자주식회사 반도체 장치 및 이의 형성 방법
US9153483B2 (en) * 2013-10-30 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Method of semiconductor integrated circuit fabrication
US20160329213A1 (en) * 2015-05-04 2016-11-10 Lam Research Corporation Highly selective deposition of amorphous carbon as a metal diffusion barrier layer
US10340141B2 (en) * 2017-04-28 2019-07-02 Taiwan Semiconductor Manufacturing Company, Ltd. Patterning method for semiconductor device and structures resulting therefrom
US10170307B1 (en) * 2017-06-30 2019-01-01 Taiwan Semiconductor Manufacturing Company, Ltd. Method for patterning semiconductor device using masking layer

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0827187A (ja) 1994-07-22 1996-01-30 Mitsui Toatsu Chem Inc 糖タンパク質
JPH095833A (ja) 1995-06-22 1997-01-10 Canon Inc 光学機器
JP3305921B2 (ja) 1995-07-10 2002-07-24 日野自動車株式会社 自動車のピラー上部構造
JP3161503B2 (ja) 1995-08-25 2001-04-25 日本電信電話株式会社 音声メッセージの通信装置および通信システム
JPH0998284A (ja) 1995-09-29 1997-04-08 Nec Corp ファクシミリ装置
JPH09204408A (ja) 1996-01-26 1997-08-05 Nec Eng Ltd コンピュータ診断処理システム
US5882996A (en) 1997-10-14 1999-03-16 Industrial Technology Research Institute Method of self-aligned dual damascene patterning using developer soluble arc interstitial layer
US5877076A (en) 1997-10-14 1999-03-02 Industrial Technology Research Institute Opposed two-layered photoresist process for dual damascene patterning
US5935762A (en) 1997-10-14 1999-08-10 Industrial Technology Research Institute Two-layered TSI process for dual damascene patterning
US5877075A (en) 1997-10-14 1999-03-02 Industrial Technology Research Institute Dual damascene process using single photoresist process
US5946567A (en) 1998-03-20 1999-08-31 Taiwan Semiconductor Manufacturing Company, Ltd. Method for making metal capacitors for deep submicrometer processes for semiconductor integrated circuits
TW396524B (en) * 1998-06-26 2000-07-01 United Microelectronics Corp A method for fabricating dual damascene
TW430946B (en) * 1998-07-22 2001-04-21 United Microelectronics Corp Dual damascene process

Also Published As

Publication number Publication date
KR100316017B1 (ko) 2002-02-19
JP2000195867A (ja) 2000-07-14
US6348414B1 (en) 2002-02-19
KR20000042394A (ko) 2000-07-15

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